1bdd229abSDerek Fang /* SPDX-License-Identifier: GPL-2.0-only */ 2bdd229abSDerek Fang /* 3bdd229abSDerek Fang * linux/sound/rt5682s.h -- Platform data for RT5682I-VS 4bdd229abSDerek Fang * 5bdd229abSDerek Fang * Copyright 2021 Realtek Microelectronics 6bdd229abSDerek Fang */ 7bdd229abSDerek Fang 8bdd229abSDerek Fang #ifndef __LINUX_SND_RT5682S_H 9bdd229abSDerek Fang #define __LINUX_SND_RT5682S_H 10bdd229abSDerek Fang 11bdd229abSDerek Fang enum rt5682s_dmic1_data_pin { 12bdd229abSDerek Fang RT5682S_DMIC1_DATA_NULL, 13bdd229abSDerek Fang RT5682S_DMIC1_DATA_GPIO2, 14bdd229abSDerek Fang RT5682S_DMIC1_DATA_GPIO5, 15bdd229abSDerek Fang }; 16bdd229abSDerek Fang 17bdd229abSDerek Fang enum rt5682s_dmic1_clk_pin { 18bdd229abSDerek Fang RT5682S_DMIC1_CLK_NULL, 19bdd229abSDerek Fang RT5682S_DMIC1_CLK_GPIO1, 20bdd229abSDerek Fang RT5682S_DMIC1_CLK_GPIO3, 21bdd229abSDerek Fang }; 22bdd229abSDerek Fang 23bdd229abSDerek Fang enum rt5682s_jd_src { 24bdd229abSDerek Fang RT5682S_JD_NULL, 25bdd229abSDerek Fang RT5682S_JD1, 26bdd229abSDerek Fang }; 27bdd229abSDerek Fang 28bdd229abSDerek Fang enum rt5682s_dai_clks { 29bdd229abSDerek Fang RT5682S_DAI_WCLK_IDX, 30bdd229abSDerek Fang RT5682S_DAI_BCLK_IDX, 31bdd229abSDerek Fang RT5682S_DAI_NUM_CLKS, 32bdd229abSDerek Fang }; 33bdd229abSDerek Fang 34bdd229abSDerek Fang struct rt5682s_platform_data { 35bdd229abSDerek Fang enum rt5682s_dmic1_data_pin dmic1_data_pin; 36bdd229abSDerek Fang enum rt5682s_dmic1_clk_pin dmic1_clk_pin; 37bdd229abSDerek Fang enum rt5682s_jd_src jd_src; 38bdd229abSDerek Fang unsigned int dmic_clk_rate; 39bdd229abSDerek Fang unsigned int dmic_delay; 40*7cfa3d00SShuming Fan unsigned int amic_delay; 41bdd229abSDerek Fang bool dmic_clk_driving_high; 42bdd229abSDerek Fang 43bdd229abSDerek Fang const char *dai_clk_names[RT5682S_DAI_NUM_CLKS]; 44bdd229abSDerek Fang }; 45bdd229abSDerek Fang 46bdd229abSDerek Fang #endif 47