1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 20ddce71cSBard Liao /* 30ddce71cSBard Liao * linux/sound/rt5682.h -- Platform data for RT5682 40ddce71cSBard Liao * 50ddce71cSBard Liao * Copyright 2018 Realtek Microelectronics 60ddce71cSBard Liao */ 70ddce71cSBard Liao 80ddce71cSBard Liao #ifndef __LINUX_SND_RT5682_H 90ddce71cSBard Liao #define __LINUX_SND_RT5682_H 100ddce71cSBard Liao 110ddce71cSBard Liao enum rt5682_dmic1_data_pin { 120ddce71cSBard Liao RT5682_DMIC1_NULL, 130ddce71cSBard Liao RT5682_DMIC1_DATA_GPIO2, 140ddce71cSBard Liao RT5682_DMIC1_DATA_GPIO5, 150ddce71cSBard Liao }; 160ddce71cSBard Liao 170ddce71cSBard Liao enum rt5682_dmic1_clk_pin { 180ddce71cSBard Liao RT5682_DMIC1_CLK_GPIO1, 190ddce71cSBard Liao RT5682_DMIC1_CLK_GPIO3, 200ddce71cSBard Liao }; 210ddce71cSBard Liao 220ddce71cSBard Liao enum rt5682_jd_src { 230ddce71cSBard Liao RT5682_JD_NULL, 240ddce71cSBard Liao RT5682_JD1, 250ddce71cSBard Liao }; 260ddce71cSBard Liao 27ebbfabc1SDerek Fang enum rt5682_dai_clks { 28ebbfabc1SDerek Fang RT5682_DAI_WCLK_IDX, 29ebbfabc1SDerek Fang RT5682_DAI_BCLK_IDX, 30ebbfabc1SDerek Fang RT5682_DAI_NUM_CLKS, 31ebbfabc1SDerek Fang }; 32ebbfabc1SDerek Fang 330ddce71cSBard Liao struct rt5682_platform_data { 340ddce71cSBard Liao 350ddce71cSBard Liao int ldo1_en; /* GPIO for LDO1_EN */ 360ddce71cSBard Liao 370ddce71cSBard Liao enum rt5682_dmic1_data_pin dmic1_data_pin; 380ddce71cSBard Liao enum rt5682_dmic1_clk_pin dmic1_clk_pin; 390ddce71cSBard Liao enum rt5682_jd_src jd_src; 40e2264458SShuming Fan unsigned int btndet_delay; 419a74c44aSOder Chiou unsigned int dmic_clk_rate; 428b15ee0bSOder Chiou unsigned int dmic_delay; 43*7416f6bcSOder Chiou bool dmic_clk_driving_high; 44ebbfabc1SDerek Fang 45ebbfabc1SDerek Fang const char *dai_clk_names[RT5682_DAI_NUM_CLKS]; 460ddce71cSBard Liao }; 470ddce71cSBard Liao 480ddce71cSBard Liao #endif 490ddce71cSBard Liao 50