182a5a936SPeter Hsiang /* 282a5a936SPeter Hsiang * Platform data for MAX98095 382a5a936SPeter Hsiang * 482a5a936SPeter Hsiang * Copyright 2011 Maxim Integrated Products 582a5a936SPeter Hsiang * 682a5a936SPeter Hsiang * This program is free software; you can redistribute it and/or modify it 782a5a936SPeter Hsiang * under the terms of the GNU General Public License as published by the 882a5a936SPeter Hsiang * Free Software Foundation; either version 2 of the License, or (at your 982a5a936SPeter Hsiang * option) any later version. 1082a5a936SPeter Hsiang * 1182a5a936SPeter Hsiang */ 1282a5a936SPeter Hsiang 1382a5a936SPeter Hsiang #ifndef __SOUND_MAX98095_PDATA_H__ 1482a5a936SPeter Hsiang #define __SOUND_MAX98095_PDATA_H__ 1582a5a936SPeter Hsiang 16dad31ec1SPeter Hsiang /* Equalizer filter response configuration */ 17dad31ec1SPeter Hsiang struct max98095_eq_cfg { 18dad31ec1SPeter Hsiang const char *name; 19dad31ec1SPeter Hsiang unsigned int rate; 20dad31ec1SPeter Hsiang u16 band1[5]; 21dad31ec1SPeter Hsiang u16 band2[5]; 22dad31ec1SPeter Hsiang u16 band3[5]; 23dad31ec1SPeter Hsiang u16 band4[5]; 24dad31ec1SPeter Hsiang u16 band5[5]; 25dad31ec1SPeter Hsiang }; 26dad31ec1SPeter Hsiang 27dad31ec1SPeter Hsiang /* Biquad filter response configuration */ 28dad31ec1SPeter Hsiang struct max98095_biquad_cfg { 29dad31ec1SPeter Hsiang const char *name; 30dad31ec1SPeter Hsiang unsigned int rate; 31dad31ec1SPeter Hsiang u16 band1[5]; 32dad31ec1SPeter Hsiang u16 band2[5]; 33dad31ec1SPeter Hsiang }; 34dad31ec1SPeter Hsiang 3582a5a936SPeter Hsiang /* codec platform data */ 3682a5a936SPeter Hsiang struct max98095_pdata { 37dad31ec1SPeter Hsiang 38dad31ec1SPeter Hsiang /* Equalizers for DAI1 and DAI2 */ 39dad31ec1SPeter Hsiang struct max98095_eq_cfg *eq_cfg; 40dad31ec1SPeter Hsiang unsigned int eq_cfgcnt; 41dad31ec1SPeter Hsiang 42dad31ec1SPeter Hsiang /* Biquad filter for DAI1 and DAI2 */ 43dad31ec1SPeter Hsiang struct max98095_biquad_cfg *bq_cfg; 44dad31ec1SPeter Hsiang unsigned int bq_cfgcnt; 45dad31ec1SPeter Hsiang 4682a5a936SPeter Hsiang /* Analog/digital microphone configuration: 4782a5a936SPeter Hsiang * 0 = analog microphone input (normal setting) 4882a5a936SPeter Hsiang * 1 = digital microphone input 4982a5a936SPeter Hsiang */ 5082a5a936SPeter Hsiang unsigned int digmic_left_mode:1; 5182a5a936SPeter Hsiang unsigned int digmic_right_mode:1; 5282a5a936SPeter Hsiang }; 5382a5a936SPeter Hsiang 5482a5a936SPeter Hsiang #endif 55