1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * HD-audio core stuff 4 */ 5 6 #ifndef __SOUND_HDAUDIO_H 7 #define __SOUND_HDAUDIO_H 8 9 #include <linux/device.h> 10 #include <linux/interrupt.h> 11 #include <linux/io.h> 12 #include <linux/io-64-nonatomic-lo-hi.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/timecounter.h> 15 #include <sound/core.h> 16 #include <sound/pcm.h> 17 #include <sound/memalloc.h> 18 #include <sound/hda_verbs.h> 19 #include <drm/i915_component.h> 20 21 /* codec node id */ 22 typedef u16 hda_nid_t; 23 24 struct hdac_bus; 25 struct hdac_stream; 26 struct hdac_device; 27 struct hdac_driver; 28 struct hdac_widget_tree; 29 struct hda_device_id; 30 31 /* 32 * exported bus type 33 */ 34 extern struct bus_type snd_hda_bus_type; 35 36 /* 37 * generic arrays 38 */ 39 struct snd_array { 40 unsigned int used; 41 unsigned int alloced; 42 unsigned int elem_size; 43 unsigned int alloc_align; 44 void *list; 45 }; 46 47 /* 48 * HD-audio codec base device 49 */ 50 struct hdac_device { 51 struct device dev; 52 int type; 53 struct hdac_bus *bus; 54 unsigned int addr; /* codec address */ 55 struct list_head list; /* list point for bus codec_list */ 56 57 hda_nid_t afg; /* AFG node id */ 58 hda_nid_t mfg; /* MFG node id */ 59 60 /* ids */ 61 unsigned int vendor_id; 62 unsigned int subsystem_id; 63 unsigned int revision_id; 64 unsigned int afg_function_id; 65 unsigned int mfg_function_id; 66 unsigned int afg_unsol:1; 67 unsigned int mfg_unsol:1; 68 69 unsigned int power_caps; /* FG power caps */ 70 71 const char *vendor_name; /* codec vendor name */ 72 const char *chip_name; /* codec chip name */ 73 74 /* verb exec op override */ 75 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 76 unsigned int flags, unsigned int *res); 77 78 /* widgets */ 79 unsigned int num_nodes; 80 hda_nid_t start_nid, end_nid; 81 82 /* misc flags */ 83 atomic_t in_pm; /* suspend/resume being performed */ 84 85 /* sysfs */ 86 struct mutex widget_lock; 87 struct hdac_widget_tree *widgets; 88 89 /* regmap */ 90 struct regmap *regmap; 91 struct mutex regmap_lock; 92 struct snd_array vendor_verbs; 93 bool lazy_cache:1; /* don't wake up for writes */ 94 bool caps_overwriting:1; /* caps overwrite being in process */ 95 bool cache_coef:1; /* cache COEF read/write too */ 96 }; 97 98 /* device/driver type used for matching */ 99 enum { 100 HDA_DEV_CORE, 101 HDA_DEV_LEGACY, 102 HDA_DEV_ASOC, 103 }; 104 105 enum { 106 SND_SKL_PCI_BIND_AUTO, /* automatic selection based on pci class */ 107 SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */ 108 SND_SKL_PCI_BIND_ASOC /* bind only with ASoC driver */ 109 }; 110 111 /* direction */ 112 enum { 113 HDA_INPUT, HDA_OUTPUT 114 }; 115 116 #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 117 118 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 119 const char *name, unsigned int addr); 120 void snd_hdac_device_exit(struct hdac_device *dev); 121 int snd_hdac_device_register(struct hdac_device *codec); 122 void snd_hdac_device_unregister(struct hdac_device *codec); 123 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); 124 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size); 125 126 int snd_hdac_refresh_widgets(struct hdac_device *codec); 127 128 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 129 unsigned int verb, unsigned int parm, unsigned int *res); 130 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 131 unsigned int *res); 132 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 133 int parm); 134 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 135 unsigned int parm, unsigned int val); 136 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 137 hda_nid_t *conn_list, int max_conns); 138 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 139 hda_nid_t *start_id); 140 unsigned int snd_hdac_calc_stream_format(unsigned int rate, 141 unsigned int channels, 142 snd_pcm_format_t format, 143 unsigned int maxbps, 144 unsigned short spdif_ctls); 145 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 146 u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 147 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 148 unsigned int format); 149 150 int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, 151 int flags, unsigned int verb, unsigned int parm); 152 int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, 153 int flags, unsigned int verb, unsigned int parm); 154 bool snd_hdac_check_power_state(struct hdac_device *hdac, 155 hda_nid_t nid, unsigned int target_state); 156 unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac, 157 hda_nid_t nid, unsigned int target_state); 158 /** 159 * snd_hdac_read_parm - read a codec parameter 160 * @codec: the codec object 161 * @nid: NID to read a parameter 162 * @parm: parameter to read 163 * 164 * Returns -1 for error. If you need to distinguish the error more 165 * strictly, use _snd_hdac_read_parm() directly. 166 */ 167 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 168 int parm) 169 { 170 unsigned int val; 171 172 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 173 } 174 175 #ifdef CONFIG_PM 176 int snd_hdac_power_up(struct hdac_device *codec); 177 int snd_hdac_power_down(struct hdac_device *codec); 178 int snd_hdac_power_up_pm(struct hdac_device *codec); 179 int snd_hdac_power_down_pm(struct hdac_device *codec); 180 int snd_hdac_keep_power_up(struct hdac_device *codec); 181 182 /* call this at entering into suspend/resume callbacks in codec driver */ 183 static inline void snd_hdac_enter_pm(struct hdac_device *codec) 184 { 185 atomic_inc(&codec->in_pm); 186 } 187 188 /* call this at leaving from suspend/resume callbacks in codec driver */ 189 static inline void snd_hdac_leave_pm(struct hdac_device *codec) 190 { 191 atomic_dec(&codec->in_pm); 192 } 193 194 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) 195 { 196 return atomic_read(&codec->in_pm); 197 } 198 199 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) 200 { 201 return !pm_runtime_suspended(&codec->dev); 202 } 203 #else 204 static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 205 static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 206 static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 207 static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 208 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } 209 static inline void snd_hdac_enter_pm(struct hdac_device *codec) {} 210 static inline void snd_hdac_leave_pm(struct hdac_device *codec) {} 211 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; } 212 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; } 213 #endif 214 215 /* 216 * HD-audio codec base driver 217 */ 218 struct hdac_driver { 219 struct device_driver driver; 220 int type; 221 const struct hda_device_id *id_table; 222 int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 223 void (*unsol_event)(struct hdac_device *dev, unsigned int event); 224 225 /* fields used by ext bus APIs */ 226 int (*probe)(struct hdac_device *dev); 227 int (*remove)(struct hdac_device *dev); 228 void (*shutdown)(struct hdac_device *dev); 229 }; 230 231 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 232 233 const struct hda_device_id * 234 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 235 236 /* 237 * Bus verb operators 238 */ 239 struct hdac_bus_ops { 240 /* send a single command */ 241 int (*command)(struct hdac_bus *bus, unsigned int cmd); 242 /* get a response from the last command */ 243 int (*get_response)(struct hdac_bus *bus, unsigned int addr, 244 unsigned int *res); 245 /* notify of codec link power-up/down */ 246 void (*link_power)(struct hdac_device *hdev, bool enable); 247 }; 248 249 /* 250 * ops used for ASoC HDA codec drivers 251 */ 252 struct hdac_ext_bus_ops { 253 int (*hdev_attach)(struct hdac_device *hdev); 254 int (*hdev_detach)(struct hdac_device *hdev); 255 }; 256 257 #define HDA_UNSOL_QUEUE_SIZE 64 258 #define HDA_MAX_CODECS 8 /* limit by controller side */ 259 260 /* 261 * CORB/RIRB 262 * 263 * Each CORB entry is 4byte, RIRB is 8byte 264 */ 265 struct hdac_rb { 266 __le32 *buf; /* virtual address of CORB/RIRB buffer */ 267 dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 268 unsigned short rp, wp; /* RIRB read/write pointers */ 269 int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 270 u32 res[HDA_MAX_CODECS]; /* last read value */ 271 }; 272 273 /* 274 * HD-audio bus base driver 275 * 276 * @ppcap: pp capabilities pointer 277 * @spbcap: SPIB capabilities pointer 278 * @mlcap: MultiLink capabilities pointer 279 * @gtscap: gts capabilities pointer 280 * @drsmcap: dma resume capabilities pointer 281 * @num_streams: streams supported 282 * @idx: HDA link index 283 * @hlink_list: link list of HDA links 284 * @lock: lock for link and display power mgmt 285 * @cmd_dma_state: state of cmd DMAs: CORB and RIRB 286 */ 287 struct hdac_bus { 288 struct device *dev; 289 const struct hdac_bus_ops *ops; 290 const struct hdac_ext_bus_ops *ext_ops; 291 292 /* h/w resources */ 293 unsigned long addr; 294 void __iomem *remap_addr; 295 int irq; 296 297 void __iomem *ppcap; 298 void __iomem *spbcap; 299 void __iomem *mlcap; 300 void __iomem *gtscap; 301 void __iomem *drsmcap; 302 303 /* codec linked list */ 304 struct list_head codec_list; 305 unsigned int num_codecs; 306 307 /* link caddr -> codec */ 308 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 309 310 /* unsolicited event queue */ 311 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 312 unsigned int unsol_rp, unsol_wp; 313 struct work_struct unsol_work; 314 315 /* bit flags of detected codecs */ 316 unsigned long codec_mask; 317 318 /* bit flags of powered codecs */ 319 unsigned long codec_powered; 320 321 /* CORB/RIRB */ 322 struct hdac_rb corb; 323 struct hdac_rb rirb; 324 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 325 wait_queue_head_t rirb_wq; 326 327 /* CORB/RIRB and position buffers */ 328 struct snd_dma_buffer rb; 329 struct snd_dma_buffer posbuf; 330 int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */ 331 332 /* hdac_stream linked list */ 333 struct list_head stream_list; 334 335 /* operation state */ 336 bool chip_init:1; /* h/w initialized */ 337 338 /* behavior flags */ 339 bool aligned_mmio:1; /* aligned MMIO access */ 340 bool sync_write:1; /* sync after verb write */ 341 bool use_posbuf:1; /* use position buffer */ 342 bool snoop:1; /* enable snooping */ 343 bool align_bdle_4k:1; /* BDLE align 4K boundary */ 344 bool reverse_assign:1; /* assign devices in reverse order */ 345 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 346 bool polling_mode:1; 347 bool needs_damn_long_delay:1; 348 349 int poll_count; 350 351 int bdl_pos_adj; /* BDL position adjustment */ 352 353 /* delay time in us for dma stop */ 354 unsigned int dma_stop_delay; 355 356 /* locks */ 357 spinlock_t reg_lock; 358 struct mutex cmd_mutex; 359 struct mutex lock; 360 361 /* DRM component interface */ 362 struct drm_audio_component *audio_component; 363 long display_power_status; 364 unsigned long display_power_active; 365 366 /* parameters required for enhanced capabilities */ 367 int num_streams; 368 int idx; 369 370 /* link management */ 371 struct list_head hlink_list; 372 bool cmd_dma_state; 373 374 /* factor used to derive STRIPE control value */ 375 unsigned int sdo_limit; 376 }; 377 378 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 379 const struct hdac_bus_ops *ops); 380 void snd_hdac_bus_exit(struct hdac_bus *bus); 381 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 382 unsigned int cmd, unsigned int *res); 383 384 void snd_hdac_codec_link_up(struct hdac_device *codec); 385 void snd_hdac_codec_link_down(struct hdac_device *codec); 386 387 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 388 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 389 unsigned int *res); 390 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus); 391 392 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 393 void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 394 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 395 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 396 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 397 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 398 int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset); 399 void snd_hdac_bus_link_power(struct hdac_device *hdev, bool enable); 400 401 void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 402 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 403 void (*ack)(struct hdac_bus *, 404 struct hdac_stream *)); 405 406 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 407 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 408 409 #ifdef CONFIG_SND_HDA_ALIGNED_MMIO 410 unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask); 411 void snd_hdac_aligned_write(unsigned int val, void __iomem *addr, 412 unsigned int mask); 413 #define snd_hdac_aligned_mmio(bus) (bus)->aligned_mmio 414 #else 415 #define snd_hdac_aligned_mmio(bus) false 416 #define snd_hdac_aligned_read(addr, mask) 0 417 #define snd_hdac_aligned_write(val, addr, mask) do {} while (0) 418 #endif 419 420 static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr, 421 u8 val) 422 { 423 if (snd_hdac_aligned_mmio(bus)) 424 snd_hdac_aligned_write(val, addr, 0xff); 425 else 426 writeb(val, addr); 427 } 428 429 static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr, 430 u16 val) 431 { 432 if (snd_hdac_aligned_mmio(bus)) 433 snd_hdac_aligned_write(val, addr, 0xffff); 434 else 435 writew(val, addr); 436 } 437 438 static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr) 439 { 440 return snd_hdac_aligned_mmio(bus) ? 441 snd_hdac_aligned_read(addr, 0xff) : readb(addr); 442 } 443 444 static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr) 445 { 446 return snd_hdac_aligned_mmio(bus) ? 447 snd_hdac_aligned_read(addr, 0xffff) : readw(addr); 448 } 449 450 #define snd_hdac_reg_writel(bus, addr, val) writel(val, addr) 451 #define snd_hdac_reg_readl(bus, addr) readl(addr) 452 #define snd_hdac_reg_writeq(bus, addr, val) writeq(val, addr) 453 #define snd_hdac_reg_readq(bus, addr) readq(addr) 454 455 /* 456 * macros for easy use 457 */ 458 #define _snd_hdac_chip_writeb(chip, reg, value) \ 459 snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value) 460 #define _snd_hdac_chip_readb(chip, reg) \ 461 snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg)) 462 #define _snd_hdac_chip_writew(chip, reg, value) \ 463 snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value) 464 #define _snd_hdac_chip_readw(chip, reg) \ 465 snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg)) 466 #define _snd_hdac_chip_writel(chip, reg, value) \ 467 snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value) 468 #define _snd_hdac_chip_readl(chip, reg) \ 469 snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg)) 470 471 /* read/write a register, pass without AZX_REG_ prefix */ 472 #define snd_hdac_chip_writel(chip, reg, value) \ 473 _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value) 474 #define snd_hdac_chip_writew(chip, reg, value) \ 475 _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value) 476 #define snd_hdac_chip_writeb(chip, reg, value) \ 477 _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value) 478 #define snd_hdac_chip_readl(chip, reg) \ 479 _snd_hdac_chip_readl(chip, AZX_REG_ ## reg) 480 #define snd_hdac_chip_readw(chip, reg) \ 481 _snd_hdac_chip_readw(chip, AZX_REG_ ## reg) 482 #define snd_hdac_chip_readb(chip, reg) \ 483 _snd_hdac_chip_readb(chip, AZX_REG_ ## reg) 484 485 /* update a register, pass without AZX_REG_ prefix */ 486 #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 487 snd_hdac_chip_writel(chip, reg, \ 488 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 489 #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 490 snd_hdac_chip_writew(chip, reg, \ 491 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 492 #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 493 snd_hdac_chip_writeb(chip, reg, \ 494 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 495 496 /* 497 * HD-audio stream 498 */ 499 struct hdac_stream { 500 struct hdac_bus *bus; 501 struct snd_dma_buffer bdl; /* BDL buffer */ 502 __le32 *posbuf; /* position buffer pointer */ 503 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 504 505 unsigned int bufsize; /* size of the play buffer in bytes */ 506 unsigned int period_bytes; /* size of the period in bytes */ 507 unsigned int frags; /* number for period in the play buffer */ 508 unsigned int fifo_size; /* FIFO size */ 509 510 void __iomem *sd_addr; /* stream descriptor pointer */ 511 512 u32 sd_int_sta_mask; /* stream int status mask */ 513 514 /* pcm support */ 515 struct snd_pcm_substream *substream; /* assigned substream, 516 * set in PCM open 517 */ 518 struct snd_compr_stream *cstream; 519 unsigned int format_val; /* format value to be set in the 520 * controller and the codec 521 */ 522 unsigned char stream_tag; /* assigned stream */ 523 unsigned char index; /* stream index */ 524 int assigned_key; /* last device# key assigned to */ 525 526 bool opened:1; 527 bool running:1; 528 bool prepared:1; 529 bool no_period_wakeup:1; 530 bool locked:1; 531 bool stripe:1; /* apply stripe control */ 532 533 u64 curr_pos; 534 /* timestamp */ 535 unsigned long start_wallclk; /* start + minimum wallclk */ 536 unsigned long period_wallclk; /* wallclk for period */ 537 struct timecounter tc; 538 struct cyclecounter cc; 539 int delay_negative_threshold; 540 541 struct list_head list; 542 #ifdef CONFIG_SND_HDA_DSP_LOADER 543 /* DSP access mutex */ 544 struct mutex dsp_mutex; 545 #endif 546 }; 547 548 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 549 int idx, int direction, int tag); 550 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 551 struct snd_pcm_substream *substream); 552 void snd_hdac_stream_release(struct hdac_stream *azx_dev); 553 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 554 int dir, int stream_tag); 555 556 int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 557 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 558 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 559 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 560 unsigned int format_val); 561 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); 562 void snd_hdac_stream_clear(struct hdac_stream *azx_dev); 563 void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 564 void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus); 565 void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 566 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 567 unsigned int streams, unsigned int reg); 568 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 569 unsigned int streams); 570 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 571 unsigned int streams); 572 int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus, 573 struct snd_pcm_substream *substream); 574 575 /* 576 * macros for easy use 577 */ 578 /* read/write a register, pass without AZX_REG_ prefix */ 579 #define snd_hdac_stream_writel(dev, reg, value) \ 580 snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 581 #define snd_hdac_stream_writew(dev, reg, value) \ 582 snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 583 #define snd_hdac_stream_writeb(dev, reg, value) \ 584 snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 585 #define snd_hdac_stream_readl(dev, reg) \ 586 snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 587 #define snd_hdac_stream_readw(dev, reg) \ 588 snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 589 #define snd_hdac_stream_readb(dev, reg) \ 590 snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 591 592 /* update a register, pass without AZX_REG_ prefix */ 593 #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 594 snd_hdac_stream_writel(dev, reg, \ 595 (snd_hdac_stream_readl(dev, reg) & \ 596 ~(mask)) | (val)) 597 #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 598 snd_hdac_stream_writew(dev, reg, \ 599 (snd_hdac_stream_readw(dev, reg) & \ 600 ~(mask)) | (val)) 601 #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 602 snd_hdac_stream_writeb(dev, reg, \ 603 (snd_hdac_stream_readb(dev, reg) & \ 604 ~(mask)) | (val)) 605 606 #ifdef CONFIG_SND_HDA_DSP_LOADER 607 /* DSP lock helpers */ 608 #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 609 #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 610 #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 611 #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 612 /* DSP loader helpers */ 613 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 614 unsigned int byte_size, struct snd_dma_buffer *bufp); 615 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 616 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 617 struct snd_dma_buffer *dmab); 618 #else /* CONFIG_SND_HDA_DSP_LOADER */ 619 #define snd_hdac_dsp_lock_init(dev) do {} while (0) 620 #define snd_hdac_dsp_lock(dev) do {} while (0) 621 #define snd_hdac_dsp_unlock(dev) do {} while (0) 622 #define snd_hdac_stream_is_locked(dev) 0 623 624 static inline int 625 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 626 unsigned int byte_size, struct snd_dma_buffer *bufp) 627 { 628 return 0; 629 } 630 631 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 632 { 633 } 634 635 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 636 struct snd_dma_buffer *dmab) 637 { 638 } 639 #endif /* CONFIG_SND_HDA_DSP_LOADER */ 640 641 642 /* 643 * generic array helpers 644 */ 645 void *snd_array_new(struct snd_array *array); 646 void snd_array_free(struct snd_array *array); 647 static inline void snd_array_init(struct snd_array *array, unsigned int size, 648 unsigned int align) 649 { 650 array->elem_size = size; 651 array->alloc_align = align; 652 } 653 654 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 655 { 656 return array->list + idx * array->elem_size; 657 } 658 659 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 660 { 661 return (unsigned long)(ptr - array->list) / array->elem_size; 662 } 663 664 /* a helper macro to iterate for each snd_array element */ 665 #define snd_array_for_each(array, idx, ptr) \ 666 for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \ 667 (ptr) = snd_array_elem(array, ++(idx))) 668 669 #endif /* __SOUND_HDAUDIO_H */ 670