xref: /openbmc/linux/include/sound/hdaudio.h (revision c0e297dc)
1 /*
2  * HD-audio core stuff
3  */
4 
5 #ifndef __SOUND_HDAUDIO_H
6 #define __SOUND_HDAUDIO_H
7 
8 #include <linux/device.h>
9 #include <linux/interrupt.h>
10 #include <linux/timecounter.h>
11 #include <sound/core.h>
12 #include <sound/memalloc.h>
13 #include <sound/hda_verbs.h>
14 #include <drm/i915_component.h>
15 
16 /* codec node id */
17 typedef u16 hda_nid_t;
18 
19 struct hdac_bus;
20 struct hdac_stream;
21 struct hdac_device;
22 struct hdac_driver;
23 struct hdac_widget_tree;
24 
25 /*
26  * exported bus type
27  */
28 extern struct bus_type snd_hda_bus_type;
29 
30 /*
31  * HDA device table
32  */
33 struct hda_device_id {
34 	__u32 vendor_id;
35 	__u32 rev_id;
36 	const char *name;
37 	unsigned long driver_data;
38 };
39 
40 /*
41  * generic arrays
42  */
43 struct snd_array {
44 	unsigned int used;
45 	unsigned int alloced;
46 	unsigned int elem_size;
47 	unsigned int alloc_align;
48 	void *list;
49 };
50 
51 /*
52  * HD-audio codec base device
53  */
54 struct hdac_device {
55 	struct device dev;
56 	int type;
57 	struct hdac_bus *bus;
58 	unsigned int addr;		/* codec address */
59 	struct list_head list;		/* list point for bus codec_list */
60 
61 	hda_nid_t afg;			/* AFG node id */
62 	hda_nid_t mfg;			/* MFG node id */
63 
64 	/* ids */
65 	unsigned int vendor_id;
66 	unsigned int subsystem_id;
67 	unsigned int revision_id;
68 	unsigned int afg_function_id;
69 	unsigned int mfg_function_id;
70 	unsigned int afg_unsol:1;
71 	unsigned int mfg_unsol:1;
72 
73 	unsigned int power_caps;	/* FG power caps */
74 
75 	const char *vendor_name;	/* codec vendor name */
76 	const char *chip_name;		/* codec chip name */
77 
78 	/* verb exec op override */
79 	int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
80 			 unsigned int flags, unsigned int *res);
81 
82 	/* widgets */
83 	unsigned int num_nodes;
84 	hda_nid_t start_nid, end_nid;
85 
86 	/* misc flags */
87 	atomic_t in_pm;		/* suspend/resume being performed */
88 	bool  link_power_control:1;
89 
90 	/* sysfs */
91 	struct hdac_widget_tree *widgets;
92 
93 	/* regmap */
94 	struct regmap *regmap;
95 	struct snd_array vendor_verbs;
96 	bool lazy_cache:1;	/* don't wake up for writes */
97 	bool caps_overwriting:1; /* caps overwrite being in process */
98 	bool cache_coef:1;	/* cache COEF read/write too */
99 };
100 
101 /* device/driver type used for matching */
102 enum {
103 	HDA_DEV_CORE,
104 	HDA_DEV_LEGACY,
105 	HDA_DEV_ASOC,
106 };
107 
108 /* direction */
109 enum {
110 	HDA_INPUT, HDA_OUTPUT
111 };
112 
113 #define dev_to_hdac_dev(_dev)	container_of(_dev, struct hdac_device, dev)
114 
115 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
116 			 const char *name, unsigned int addr);
117 void snd_hdac_device_exit(struct hdac_device *dev);
118 int snd_hdac_device_register(struct hdac_device *codec);
119 void snd_hdac_device_unregister(struct hdac_device *codec);
120 
121 int snd_hdac_refresh_widgets(struct hdac_device *codec);
122 
123 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
124 			       unsigned int verb, unsigned int parm);
125 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
126 		       unsigned int flags, unsigned int *res);
127 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
128 		  unsigned int verb, unsigned int parm, unsigned int *res);
129 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
130 			unsigned int *res);
131 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
132 				int parm);
133 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
134 			   unsigned int parm, unsigned int val);
135 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
136 			     hda_nid_t *conn_list, int max_conns);
137 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
138 			   hda_nid_t *start_id);
139 unsigned int snd_hdac_calc_stream_format(unsigned int rate,
140 					 unsigned int channels,
141 					 unsigned int format,
142 					 unsigned int maxbps,
143 					 unsigned short spdif_ctls);
144 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
145 				u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
146 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
147 				  unsigned int format);
148 
149 /**
150  * snd_hdac_read_parm - read a codec parameter
151  * @codec: the codec object
152  * @nid: NID to read a parameter
153  * @parm: parameter to read
154  *
155  * Returns -1 for error.  If you need to distinguish the error more
156  * strictly, use _snd_hdac_read_parm() directly.
157  */
158 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
159 				     int parm)
160 {
161 	unsigned int val;
162 
163 	return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
164 }
165 
166 #ifdef CONFIG_PM
167 void snd_hdac_power_up(struct hdac_device *codec);
168 void snd_hdac_power_down(struct hdac_device *codec);
169 void snd_hdac_power_up_pm(struct hdac_device *codec);
170 void snd_hdac_power_down_pm(struct hdac_device *codec);
171 #else
172 static inline void snd_hdac_power_up(struct hdac_device *codec) {}
173 static inline void snd_hdac_power_down(struct hdac_device *codec) {}
174 static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
175 static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
176 #endif
177 
178 /*
179  * HD-audio codec base driver
180  */
181 struct hdac_driver {
182 	struct device_driver driver;
183 	int type;
184 	const struct hda_device_id *id_table;
185 	int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
186 	void (*unsol_event)(struct hdac_device *dev, unsigned int event);
187 };
188 
189 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
190 
191 const struct hda_device_id *
192 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
193 
194 /*
195  * Bus verb operators
196  */
197 struct hdac_bus_ops {
198 	/* send a single command */
199 	int (*command)(struct hdac_bus *bus, unsigned int cmd);
200 	/* get a response from the last command */
201 	int (*get_response)(struct hdac_bus *bus, unsigned int addr,
202 			    unsigned int *res);
203 	/* control the link power  */
204 	int (*link_power)(struct hdac_bus *bus, bool enable);
205 };
206 
207 /*
208  * Lowlevel I/O operators
209  */
210 struct hdac_io_ops {
211 	/* mapped register accesses */
212 	void (*reg_writel)(u32 value, u32 __iomem *addr);
213 	u32 (*reg_readl)(u32 __iomem *addr);
214 	void (*reg_writew)(u16 value, u16 __iomem *addr);
215 	u16 (*reg_readw)(u16 __iomem *addr);
216 	void (*reg_writeb)(u8 value, u8 __iomem *addr);
217 	u8 (*reg_readb)(u8 __iomem *addr);
218 	/* Allocation ops */
219 	int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
220 			       struct snd_dma_buffer *buf);
221 	void (*dma_free_pages)(struct hdac_bus *bus,
222 			       struct snd_dma_buffer *buf);
223 };
224 
225 #define HDA_UNSOL_QUEUE_SIZE	64
226 #define HDA_MAX_CODECS		8	/* limit by controller side */
227 
228 /* HD Audio class code */
229 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO	0x0403
230 
231 /*
232  * CORB/RIRB
233  *
234  * Each CORB entry is 4byte, RIRB is 8byte
235  */
236 struct hdac_rb {
237 	__le32 *buf;		/* virtual address of CORB/RIRB buffer */
238 	dma_addr_t addr;	/* physical address of CORB/RIRB buffer */
239 	unsigned short rp, wp;	/* RIRB read/write pointers */
240 	int cmds[HDA_MAX_CODECS];	/* number of pending requests */
241 	u32 res[HDA_MAX_CODECS];	/* last read value */
242 };
243 
244 /*
245  * HD-audio bus base driver
246  */
247 struct hdac_bus {
248 	struct device *dev;
249 	const struct hdac_bus_ops *ops;
250 	const struct hdac_io_ops *io_ops;
251 
252 	/* h/w resources */
253 	unsigned long addr;
254 	void __iomem *remap_addr;
255 	int irq;
256 
257 	/* codec linked list */
258 	struct list_head codec_list;
259 	unsigned int num_codecs;
260 
261 	/* link caddr -> codec */
262 	struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
263 
264 	/* unsolicited event queue */
265 	u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
266 	unsigned int unsol_rp, unsol_wp;
267 	struct work_struct unsol_work;
268 
269 	/* bit flags of detected codecs */
270 	unsigned long codec_mask;
271 
272 	/* bit flags of powered codecs */
273 	unsigned long codec_powered;
274 
275 	/* CORB/RIRB */
276 	struct hdac_rb corb;
277 	struct hdac_rb rirb;
278 	unsigned int last_cmd[HDA_MAX_CODECS];	/* last sent command */
279 
280 	/* CORB/RIRB and position buffers */
281 	struct snd_dma_buffer rb;
282 	struct snd_dma_buffer posbuf;
283 
284 	/* hdac_stream linked list */
285 	struct list_head stream_list;
286 
287 	/* operation state */
288 	bool chip_init:1;		/* h/w initialized */
289 
290 	/* behavior flags */
291 	bool sync_write:1;		/* sync after verb write */
292 	bool use_posbuf:1;		/* use position buffer */
293 	bool snoop:1;			/* enable snooping */
294 	bool align_bdle_4k:1;		/* BDLE align 4K boundary */
295 	bool reverse_assign:1;		/* assign devices in reverse order */
296 	bool corbrp_self_clear:1;	/* CORBRP clears itself after reset */
297 
298 	int bdl_pos_adj;		/* BDL position adjustment */
299 
300 	/* locks */
301 	spinlock_t reg_lock;
302 	struct mutex cmd_mutex;
303 
304 	/* i915 component interface */
305 	struct i915_audio_component *audio_component;
306 	int i915_power_refcount;
307 };
308 
309 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
310 		      const struct hdac_bus_ops *ops,
311 		      const struct hdac_io_ops *io_ops);
312 void snd_hdac_bus_exit(struct hdac_bus *bus);
313 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
314 			   unsigned int cmd, unsigned int *res);
315 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
316 				    unsigned int cmd, unsigned int *res);
317 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
318 
319 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
320 void snd_hdac_bus_remove_device(struct hdac_bus *bus,
321 				struct hdac_device *codec);
322 
323 static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
324 {
325 	set_bit(codec->addr, &codec->bus->codec_powered);
326 }
327 
328 static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
329 {
330 	clear_bit(codec->addr, &codec->bus->codec_powered);
331 }
332 
333 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
334 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
335 			      unsigned int *res);
336 int snd_hdac_link_power(struct hdac_device *codec, bool enable);
337 
338 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
339 void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
340 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
341 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
342 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
343 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
344 
345 void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
346 void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
347 				    void (*ack)(struct hdac_bus *,
348 						struct hdac_stream *));
349 
350 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
351 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
352 
353 /*
354  * macros for easy use
355  */
356 #define _snd_hdac_chip_write(type, chip, reg, value) \
357 	((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
358 #define _snd_hdac_chip_read(type, chip, reg) \
359 	((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
360 
361 /* read/write a register, pass without AZX_REG_ prefix */
362 #define snd_hdac_chip_writel(chip, reg, value) \
363 	_snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
364 #define snd_hdac_chip_writew(chip, reg, value) \
365 	_snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
366 #define snd_hdac_chip_writeb(chip, reg, value) \
367 	_snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
368 #define snd_hdac_chip_readl(chip, reg) \
369 	_snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
370 #define snd_hdac_chip_readw(chip, reg) \
371 	_snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
372 #define snd_hdac_chip_readb(chip, reg) \
373 	_snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
374 
375 /* update a register, pass without AZX_REG_ prefix */
376 #define snd_hdac_chip_updatel(chip, reg, mask, val) \
377 	snd_hdac_chip_writel(chip, reg, \
378 			     (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
379 #define snd_hdac_chip_updatew(chip, reg, mask, val) \
380 	snd_hdac_chip_writew(chip, reg, \
381 			     (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
382 #define snd_hdac_chip_updateb(chip, reg, mask, val) \
383 	snd_hdac_chip_writeb(chip, reg, \
384 			     (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
385 
386 /*
387  * HD-audio stream
388  */
389 struct hdac_stream {
390 	struct hdac_bus *bus;
391 	struct snd_dma_buffer bdl; /* BDL buffer */
392 	__le32 *posbuf;		/* position buffer pointer */
393 	int direction;		/* playback / capture (SNDRV_PCM_STREAM_*) */
394 
395 	unsigned int bufsize;	/* size of the play buffer in bytes */
396 	unsigned int period_bytes; /* size of the period in bytes */
397 	unsigned int frags;	/* number for period in the play buffer */
398 	unsigned int fifo_size;	/* FIFO size */
399 
400 	void __iomem *sd_addr;	/* stream descriptor pointer */
401 
402 	u32 sd_int_sta_mask;	/* stream int status mask */
403 
404 	/* pcm support */
405 	struct snd_pcm_substream *substream;	/* assigned substream,
406 						 * set in PCM open
407 						 */
408 	unsigned int format_val;	/* format value to be set in the
409 					 * controller and the codec
410 					 */
411 	unsigned char stream_tag;	/* assigned stream */
412 	unsigned char index;		/* stream index */
413 	int assigned_key;		/* last device# key assigned to */
414 
415 	bool opened:1;
416 	bool running:1;
417 	bool prepared:1;
418 	bool no_period_wakeup:1;
419 	bool locked:1;
420 
421 	/* timestamp */
422 	unsigned long start_wallclk;	/* start + minimum wallclk */
423 	unsigned long period_wallclk;	/* wallclk for period */
424 	struct timecounter  tc;
425 	struct cyclecounter cc;
426 	int delay_negative_threshold;
427 
428 	struct list_head list;
429 #ifdef CONFIG_SND_HDA_DSP_LOADER
430 	/* DSP access mutex */
431 	struct mutex dsp_mutex;
432 #endif
433 };
434 
435 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
436 			  int idx, int direction, int tag);
437 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
438 					   struct snd_pcm_substream *substream);
439 void snd_hdac_stream_release(struct hdac_stream *azx_dev);
440 
441 int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
442 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
443 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
444 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
445 				unsigned int format_val);
446 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
447 void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
448 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
449 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
450 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
451 				  unsigned int streams, unsigned int reg);
452 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
453 			  unsigned int streams);
454 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
455 				      unsigned int streams);
456 /*
457  * macros for easy use
458  */
459 #define _snd_hdac_stream_write(type, dev, reg, value)			\
460 	((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
461 #define _snd_hdac_stream_read(type, dev, reg)				\
462 	((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
463 
464 /* read/write a register, pass without AZX_REG_ prefix */
465 #define snd_hdac_stream_writel(dev, reg, value) \
466 	_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
467 #define snd_hdac_stream_writew(dev, reg, value) \
468 	_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
469 #define snd_hdac_stream_writeb(dev, reg, value) \
470 	_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
471 #define snd_hdac_stream_readl(dev, reg) \
472 	_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
473 #define snd_hdac_stream_readw(dev, reg) \
474 	_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
475 #define snd_hdac_stream_readb(dev, reg) \
476 	_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
477 
478 /* update a register, pass without AZX_REG_ prefix */
479 #define snd_hdac_stream_updatel(dev, reg, mask, val) \
480 	snd_hdac_stream_writel(dev, reg, \
481 			       (snd_hdac_stream_readl(dev, reg) & \
482 				~(mask)) | (val))
483 #define snd_hdac_stream_updatew(dev, reg, mask, val) \
484 	snd_hdac_stream_writew(dev, reg, \
485 			       (snd_hdac_stream_readw(dev, reg) & \
486 				~(mask)) | (val))
487 #define snd_hdac_stream_updateb(dev, reg, mask, val) \
488 	snd_hdac_stream_writeb(dev, reg, \
489 			       (snd_hdac_stream_readb(dev, reg) & \
490 				~(mask)) | (val))
491 
492 #ifdef CONFIG_SND_HDA_DSP_LOADER
493 /* DSP lock helpers */
494 #define snd_hdac_dsp_lock_init(dev)	mutex_init(&(dev)->dsp_mutex)
495 #define snd_hdac_dsp_lock(dev)		mutex_lock(&(dev)->dsp_mutex)
496 #define snd_hdac_dsp_unlock(dev)	mutex_unlock(&(dev)->dsp_mutex)
497 #define snd_hdac_stream_is_locked(dev)	((dev)->locked)
498 /* DSP loader helpers */
499 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
500 			 unsigned int byte_size, struct snd_dma_buffer *bufp);
501 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
502 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
503 			  struct snd_dma_buffer *dmab);
504 #else /* CONFIG_SND_HDA_DSP_LOADER */
505 #define snd_hdac_dsp_lock_init(dev)	do {} while (0)
506 #define snd_hdac_dsp_lock(dev)		do {} while (0)
507 #define snd_hdac_dsp_unlock(dev)	do {} while (0)
508 #define snd_hdac_stream_is_locked(dev)	0
509 
510 static inline int
511 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
512 		     unsigned int byte_size, struct snd_dma_buffer *bufp)
513 {
514 	return 0;
515 }
516 
517 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
518 {
519 }
520 
521 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
522 					struct snd_dma_buffer *dmab)
523 {
524 }
525 #endif /* CONFIG_SND_HDA_DSP_LOADER */
526 
527 
528 /*
529  * generic array helpers
530  */
531 void *snd_array_new(struct snd_array *array);
532 void snd_array_free(struct snd_array *array);
533 static inline void snd_array_init(struct snd_array *array, unsigned int size,
534 				  unsigned int align)
535 {
536 	array->elem_size = size;
537 	array->alloc_align = align;
538 }
539 
540 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
541 {
542 	return array->list + idx * array->elem_size;
543 }
544 
545 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
546 {
547 	return (unsigned long)(ptr - array->list) / array->elem_size;
548 }
549 
550 #endif /* __SOUND_HDAUDIO_H */
551