1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * HD-audio core stuff 4 */ 5 6 #ifndef __SOUND_HDAUDIO_H 7 #define __SOUND_HDAUDIO_H 8 9 #include <linux/device.h> 10 #include <linux/interrupt.h> 11 #include <linux/io.h> 12 #include <linux/io-64-nonatomic-lo-hi.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/timecounter.h> 15 #include <sound/core.h> 16 #include <sound/pcm.h> 17 #include <sound/memalloc.h> 18 #include <sound/hda_verbs.h> 19 #include <drm/i915_component.h> 20 21 /* codec node id */ 22 typedef u16 hda_nid_t; 23 24 struct hdac_bus; 25 struct hdac_stream; 26 struct hdac_device; 27 struct hdac_driver; 28 struct hdac_widget_tree; 29 struct hda_device_id; 30 31 /* 32 * exported bus type 33 */ 34 extern struct bus_type snd_hda_bus_type; 35 36 /* 37 * generic arrays 38 */ 39 struct snd_array { 40 unsigned int used; 41 unsigned int alloced; 42 unsigned int elem_size; 43 unsigned int alloc_align; 44 void *list; 45 }; 46 47 /* 48 * HD-audio codec base device 49 */ 50 struct hdac_device { 51 struct device dev; 52 int type; 53 struct hdac_bus *bus; 54 unsigned int addr; /* codec address */ 55 struct list_head list; /* list point for bus codec_list */ 56 57 hda_nid_t afg; /* AFG node id */ 58 hda_nid_t mfg; /* MFG node id */ 59 60 /* ids */ 61 unsigned int vendor_id; 62 unsigned int subsystem_id; 63 unsigned int revision_id; 64 unsigned int afg_function_id; 65 unsigned int mfg_function_id; 66 unsigned int afg_unsol:1; 67 unsigned int mfg_unsol:1; 68 69 unsigned int power_caps; /* FG power caps */ 70 71 const char *vendor_name; /* codec vendor name */ 72 const char *chip_name; /* codec chip name */ 73 74 /* verb exec op override */ 75 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 76 unsigned int flags, unsigned int *res); 77 78 /* widgets */ 79 unsigned int num_nodes; 80 hda_nid_t start_nid, end_nid; 81 82 /* misc flags */ 83 atomic_t in_pm; /* suspend/resume being performed */ 84 85 /* sysfs */ 86 struct mutex widget_lock; 87 struct hdac_widget_tree *widgets; 88 89 /* regmap */ 90 struct regmap *regmap; 91 struct mutex regmap_lock; 92 struct snd_array vendor_verbs; 93 bool lazy_cache:1; /* don't wake up for writes */ 94 bool caps_overwriting:1; /* caps overwrite being in process */ 95 bool cache_coef:1; /* cache COEF read/write too */ 96 unsigned int registered:1; /* codec was registered */ 97 }; 98 99 /* device/driver type used for matching */ 100 enum { 101 HDA_DEV_CORE, 102 HDA_DEV_LEGACY, 103 HDA_DEV_ASOC, 104 }; 105 106 enum { 107 SND_SKL_PCI_BIND_AUTO, /* automatic selection based on pci class */ 108 SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */ 109 SND_SKL_PCI_BIND_ASOC /* bind only with ASoC driver */ 110 }; 111 112 /* direction */ 113 enum { 114 HDA_INPUT, HDA_OUTPUT 115 }; 116 117 #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 118 119 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 120 const char *name, unsigned int addr); 121 void snd_hdac_device_exit(struct hdac_device *dev); 122 int snd_hdac_device_register(struct hdac_device *codec); 123 void snd_hdac_device_unregister(struct hdac_device *codec); 124 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); 125 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size); 126 127 int snd_hdac_refresh_widgets(struct hdac_device *codec); 128 129 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 130 unsigned int verb, unsigned int parm, unsigned int *res); 131 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 132 unsigned int *res); 133 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 134 int parm); 135 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 136 unsigned int parm, unsigned int val); 137 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 138 hda_nid_t *conn_list, int max_conns); 139 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 140 hda_nid_t *start_id); 141 unsigned int snd_hdac_calc_stream_format(unsigned int rate, 142 unsigned int channels, 143 snd_pcm_format_t format, 144 unsigned int maxbps, 145 unsigned short spdif_ctls); 146 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 147 u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 148 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 149 unsigned int format); 150 151 int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, 152 int flags, unsigned int verb, unsigned int parm); 153 int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, 154 int flags, unsigned int verb, unsigned int parm); 155 bool snd_hdac_check_power_state(struct hdac_device *hdac, 156 hda_nid_t nid, unsigned int target_state); 157 unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac, 158 hda_nid_t nid, unsigned int target_state); 159 /** 160 * snd_hdac_read_parm - read a codec parameter 161 * @codec: the codec object 162 * @nid: NID to read a parameter 163 * @parm: parameter to read 164 * 165 * Returns -1 for error. If you need to distinguish the error more 166 * strictly, use _snd_hdac_read_parm() directly. 167 */ 168 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 169 int parm) 170 { 171 unsigned int val; 172 173 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 174 } 175 176 #ifdef CONFIG_PM 177 int snd_hdac_power_up(struct hdac_device *codec); 178 int snd_hdac_power_down(struct hdac_device *codec); 179 int snd_hdac_power_up_pm(struct hdac_device *codec); 180 int snd_hdac_power_down_pm(struct hdac_device *codec); 181 int snd_hdac_keep_power_up(struct hdac_device *codec); 182 183 /* call this at entering into suspend/resume callbacks in codec driver */ 184 static inline void snd_hdac_enter_pm(struct hdac_device *codec) 185 { 186 atomic_inc(&codec->in_pm); 187 } 188 189 /* call this at leaving from suspend/resume callbacks in codec driver */ 190 static inline void snd_hdac_leave_pm(struct hdac_device *codec) 191 { 192 atomic_dec(&codec->in_pm); 193 } 194 195 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) 196 { 197 return atomic_read(&codec->in_pm); 198 } 199 200 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) 201 { 202 return !pm_runtime_suspended(&codec->dev); 203 } 204 #else 205 static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 206 static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 207 static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 208 static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 209 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } 210 static inline void snd_hdac_enter_pm(struct hdac_device *codec) {} 211 static inline void snd_hdac_leave_pm(struct hdac_device *codec) {} 212 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; } 213 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; } 214 #endif 215 216 /* 217 * HD-audio codec base driver 218 */ 219 struct hdac_driver { 220 struct device_driver driver; 221 int type; 222 const struct hda_device_id *id_table; 223 int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 224 void (*unsol_event)(struct hdac_device *dev, unsigned int event); 225 226 /* fields used by ext bus APIs */ 227 int (*probe)(struct hdac_device *dev); 228 int (*remove)(struct hdac_device *dev); 229 void (*shutdown)(struct hdac_device *dev); 230 }; 231 232 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 233 234 const struct hda_device_id * 235 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 236 237 /* 238 * Bus verb operators 239 */ 240 struct hdac_bus_ops { 241 /* send a single command */ 242 int (*command)(struct hdac_bus *bus, unsigned int cmd); 243 /* get a response from the last command */ 244 int (*get_response)(struct hdac_bus *bus, unsigned int addr, 245 unsigned int *res); 246 /* notify of codec link power-up/down */ 247 void (*link_power)(struct hdac_device *hdev, bool enable); 248 }; 249 250 /* 251 * ops used for ASoC HDA codec drivers 252 */ 253 struct hdac_ext_bus_ops { 254 int (*hdev_attach)(struct hdac_device *hdev); 255 int (*hdev_detach)(struct hdac_device *hdev); 256 }; 257 258 #define HDA_UNSOL_QUEUE_SIZE 64 259 #define HDA_MAX_CODECS 8 /* limit by controller side */ 260 261 /* 262 * CORB/RIRB 263 * 264 * Each CORB entry is 4byte, RIRB is 8byte 265 */ 266 struct hdac_rb { 267 __le32 *buf; /* virtual address of CORB/RIRB buffer */ 268 dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 269 unsigned short rp, wp; /* RIRB read/write pointers */ 270 int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 271 u32 res[HDA_MAX_CODECS]; /* last read value */ 272 }; 273 274 /* 275 * HD-audio bus base driver 276 * 277 * @ppcap: pp capabilities pointer 278 * @spbcap: SPIB capabilities pointer 279 * @mlcap: MultiLink capabilities pointer 280 * @gtscap: gts capabilities pointer 281 * @drsmcap: dma resume capabilities pointer 282 * @num_streams: streams supported 283 * @idx: HDA link index 284 * @hlink_list: link list of HDA links 285 * @lock: lock for link and display power mgmt 286 * @cmd_dma_state: state of cmd DMAs: CORB and RIRB 287 */ 288 struct hdac_bus { 289 struct device *dev; 290 const struct hdac_bus_ops *ops; 291 const struct hdac_ext_bus_ops *ext_ops; 292 293 /* h/w resources */ 294 unsigned long addr; 295 void __iomem *remap_addr; 296 int irq; 297 298 void __iomem *ppcap; 299 void __iomem *spbcap; 300 void __iomem *mlcap; 301 void __iomem *gtscap; 302 void __iomem *drsmcap; 303 304 /* codec linked list */ 305 struct list_head codec_list; 306 unsigned int num_codecs; 307 308 /* link caddr -> codec */ 309 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 310 311 /* unsolicited event queue */ 312 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 313 unsigned int unsol_rp, unsol_wp; 314 struct work_struct unsol_work; 315 316 /* bit flags of detected codecs */ 317 unsigned long codec_mask; 318 319 /* bit flags of powered codecs */ 320 unsigned long codec_powered; 321 322 /* CORB/RIRB */ 323 struct hdac_rb corb; 324 struct hdac_rb rirb; 325 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 326 wait_queue_head_t rirb_wq; 327 328 /* CORB/RIRB and position buffers */ 329 struct snd_dma_buffer rb; 330 struct snd_dma_buffer posbuf; 331 int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */ 332 333 /* hdac_stream linked list */ 334 struct list_head stream_list; 335 336 /* operation state */ 337 bool chip_init:1; /* h/w initialized */ 338 339 /* behavior flags */ 340 bool aligned_mmio:1; /* aligned MMIO access */ 341 bool sync_write:1; /* sync after verb write */ 342 bool use_posbuf:1; /* use position buffer */ 343 bool snoop:1; /* enable snooping */ 344 bool align_bdle_4k:1; /* BDLE align 4K boundary */ 345 bool reverse_assign:1; /* assign devices in reverse order */ 346 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 347 bool polling_mode:1; 348 bool needs_damn_long_delay:1; 349 350 int poll_count; 351 352 int bdl_pos_adj; /* BDL position adjustment */ 353 354 /* delay time in us for dma stop */ 355 unsigned int dma_stop_delay; 356 357 /* locks */ 358 spinlock_t reg_lock; 359 struct mutex cmd_mutex; 360 struct mutex lock; 361 362 /* DRM component interface */ 363 struct drm_audio_component *audio_component; 364 long display_power_status; 365 unsigned long display_power_active; 366 367 /* parameters required for enhanced capabilities */ 368 int num_streams; 369 int idx; 370 371 /* link management */ 372 struct list_head hlink_list; 373 bool cmd_dma_state; 374 375 /* factor used to derive STRIPE control value */ 376 unsigned int sdo_limit; 377 }; 378 379 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 380 const struct hdac_bus_ops *ops); 381 void snd_hdac_bus_exit(struct hdac_bus *bus); 382 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 383 unsigned int cmd, unsigned int *res); 384 385 void snd_hdac_codec_link_up(struct hdac_device *codec); 386 void snd_hdac_codec_link_down(struct hdac_device *codec); 387 388 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 389 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 390 unsigned int *res); 391 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus); 392 393 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 394 void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 395 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 396 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 397 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 398 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 399 int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset); 400 void snd_hdac_bus_link_power(struct hdac_device *hdev, bool enable); 401 402 void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 403 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 404 void (*ack)(struct hdac_bus *, 405 struct hdac_stream *)); 406 407 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 408 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 409 410 #ifdef CONFIG_SND_HDA_ALIGNED_MMIO 411 unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask); 412 void snd_hdac_aligned_write(unsigned int val, void __iomem *addr, 413 unsigned int mask); 414 #define snd_hdac_aligned_mmio(bus) (bus)->aligned_mmio 415 #else 416 #define snd_hdac_aligned_mmio(bus) false 417 #define snd_hdac_aligned_read(addr, mask) 0 418 #define snd_hdac_aligned_write(val, addr, mask) do {} while (0) 419 #endif 420 421 static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr, 422 u8 val) 423 { 424 if (snd_hdac_aligned_mmio(bus)) 425 snd_hdac_aligned_write(val, addr, 0xff); 426 else 427 writeb(val, addr); 428 } 429 430 static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr, 431 u16 val) 432 { 433 if (snd_hdac_aligned_mmio(bus)) 434 snd_hdac_aligned_write(val, addr, 0xffff); 435 else 436 writew(val, addr); 437 } 438 439 static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr) 440 { 441 return snd_hdac_aligned_mmio(bus) ? 442 snd_hdac_aligned_read(addr, 0xff) : readb(addr); 443 } 444 445 static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr) 446 { 447 return snd_hdac_aligned_mmio(bus) ? 448 snd_hdac_aligned_read(addr, 0xffff) : readw(addr); 449 } 450 451 #define snd_hdac_reg_writel(bus, addr, val) writel(val, addr) 452 #define snd_hdac_reg_readl(bus, addr) readl(addr) 453 #define snd_hdac_reg_writeq(bus, addr, val) writeq(val, addr) 454 #define snd_hdac_reg_readq(bus, addr) readq(addr) 455 456 /* 457 * macros for easy use 458 */ 459 #define _snd_hdac_chip_writeb(chip, reg, value) \ 460 snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value) 461 #define _snd_hdac_chip_readb(chip, reg) \ 462 snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg)) 463 #define _snd_hdac_chip_writew(chip, reg, value) \ 464 snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value) 465 #define _snd_hdac_chip_readw(chip, reg) \ 466 snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg)) 467 #define _snd_hdac_chip_writel(chip, reg, value) \ 468 snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value) 469 #define _snd_hdac_chip_readl(chip, reg) \ 470 snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg)) 471 472 /* read/write a register, pass without AZX_REG_ prefix */ 473 #define snd_hdac_chip_writel(chip, reg, value) \ 474 _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value) 475 #define snd_hdac_chip_writew(chip, reg, value) \ 476 _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value) 477 #define snd_hdac_chip_writeb(chip, reg, value) \ 478 _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value) 479 #define snd_hdac_chip_readl(chip, reg) \ 480 _snd_hdac_chip_readl(chip, AZX_REG_ ## reg) 481 #define snd_hdac_chip_readw(chip, reg) \ 482 _snd_hdac_chip_readw(chip, AZX_REG_ ## reg) 483 #define snd_hdac_chip_readb(chip, reg) \ 484 _snd_hdac_chip_readb(chip, AZX_REG_ ## reg) 485 486 /* update a register, pass without AZX_REG_ prefix */ 487 #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 488 snd_hdac_chip_writel(chip, reg, \ 489 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 490 #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 491 snd_hdac_chip_writew(chip, reg, \ 492 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 493 #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 494 snd_hdac_chip_writeb(chip, reg, \ 495 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 496 497 /* 498 * HD-audio stream 499 */ 500 struct hdac_stream { 501 struct hdac_bus *bus; 502 struct snd_dma_buffer bdl; /* BDL buffer */ 503 __le32 *posbuf; /* position buffer pointer */ 504 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 505 506 unsigned int bufsize; /* size of the play buffer in bytes */ 507 unsigned int period_bytes; /* size of the period in bytes */ 508 unsigned int frags; /* number for period in the play buffer */ 509 unsigned int fifo_size; /* FIFO size */ 510 511 void __iomem *sd_addr; /* stream descriptor pointer */ 512 513 u32 sd_int_sta_mask; /* stream int status mask */ 514 515 /* pcm support */ 516 struct snd_pcm_substream *substream; /* assigned substream, 517 * set in PCM open 518 */ 519 struct snd_compr_stream *cstream; 520 unsigned int format_val; /* format value to be set in the 521 * controller and the codec 522 */ 523 unsigned char stream_tag; /* assigned stream */ 524 unsigned char index; /* stream index */ 525 int assigned_key; /* last device# key assigned to */ 526 527 bool opened:1; 528 bool running:1; 529 bool prepared:1; 530 bool no_period_wakeup:1; 531 bool locked:1; 532 bool stripe:1; /* apply stripe control */ 533 534 u64 curr_pos; 535 /* timestamp */ 536 unsigned long start_wallclk; /* start + minimum wallclk */ 537 unsigned long period_wallclk; /* wallclk for period */ 538 struct timecounter tc; 539 struct cyclecounter cc; 540 int delay_negative_threshold; 541 542 struct list_head list; 543 #ifdef CONFIG_SND_HDA_DSP_LOADER 544 /* DSP access mutex */ 545 struct mutex dsp_mutex; 546 #endif 547 }; 548 549 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 550 int idx, int direction, int tag); 551 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 552 struct snd_pcm_substream *substream); 553 void snd_hdac_stream_release(struct hdac_stream *azx_dev); 554 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 555 int dir, int stream_tag); 556 557 int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 558 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 559 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 560 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 561 unsigned int format_val); 562 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); 563 void snd_hdac_stream_clear(struct hdac_stream *azx_dev); 564 void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 565 void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus); 566 void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 567 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 568 unsigned int streams, unsigned int reg); 569 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 570 unsigned int streams); 571 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 572 unsigned int streams); 573 int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus, 574 struct snd_pcm_substream *substream); 575 576 /* 577 * macros for easy use 578 */ 579 /* read/write a register, pass without AZX_REG_ prefix */ 580 #define snd_hdac_stream_writel(dev, reg, value) \ 581 snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 582 #define snd_hdac_stream_writew(dev, reg, value) \ 583 snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 584 #define snd_hdac_stream_writeb(dev, reg, value) \ 585 snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 586 #define snd_hdac_stream_readl(dev, reg) \ 587 snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 588 #define snd_hdac_stream_readw(dev, reg) \ 589 snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 590 #define snd_hdac_stream_readb(dev, reg) \ 591 snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 592 593 /* update a register, pass without AZX_REG_ prefix */ 594 #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 595 snd_hdac_stream_writel(dev, reg, \ 596 (snd_hdac_stream_readl(dev, reg) & \ 597 ~(mask)) | (val)) 598 #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 599 snd_hdac_stream_writew(dev, reg, \ 600 (snd_hdac_stream_readw(dev, reg) & \ 601 ~(mask)) | (val)) 602 #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 603 snd_hdac_stream_writeb(dev, reg, \ 604 (snd_hdac_stream_readb(dev, reg) & \ 605 ~(mask)) | (val)) 606 607 #ifdef CONFIG_SND_HDA_DSP_LOADER 608 /* DSP lock helpers */ 609 #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 610 #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 611 #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 612 #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 613 /* DSP loader helpers */ 614 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 615 unsigned int byte_size, struct snd_dma_buffer *bufp); 616 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 617 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 618 struct snd_dma_buffer *dmab); 619 #else /* CONFIG_SND_HDA_DSP_LOADER */ 620 #define snd_hdac_dsp_lock_init(dev) do {} while (0) 621 #define snd_hdac_dsp_lock(dev) do {} while (0) 622 #define snd_hdac_dsp_unlock(dev) do {} while (0) 623 #define snd_hdac_stream_is_locked(dev) 0 624 625 static inline int 626 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 627 unsigned int byte_size, struct snd_dma_buffer *bufp) 628 { 629 return 0; 630 } 631 632 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 633 { 634 } 635 636 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 637 struct snd_dma_buffer *dmab) 638 { 639 } 640 #endif /* CONFIG_SND_HDA_DSP_LOADER */ 641 642 643 /* 644 * generic array helpers 645 */ 646 void *snd_array_new(struct snd_array *array); 647 void snd_array_free(struct snd_array *array); 648 static inline void snd_array_init(struct snd_array *array, unsigned int size, 649 unsigned int align) 650 { 651 array->elem_size = size; 652 array->alloc_align = align; 653 } 654 655 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 656 { 657 return array->list + idx * array->elem_size; 658 } 659 660 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 661 { 662 return (unsigned long)(ptr - array->list) / array->elem_size; 663 } 664 665 /* a helper macro to iterate for each snd_array element */ 666 #define snd_array_for_each(array, idx, ptr) \ 667 for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \ 668 (ptr) = snd_array_elem(array, ++(idx))) 669 670 #endif /* __SOUND_HDAUDIO_H */ 671