1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * HD-audio core stuff 4 */ 5 6 #ifndef __SOUND_HDAUDIO_H 7 #define __SOUND_HDAUDIO_H 8 9 #include <linux/device.h> 10 #include <linux/interrupt.h> 11 #include <linux/pm_runtime.h> 12 #include <linux/timecounter.h> 13 #include <sound/core.h> 14 #include <sound/pcm.h> 15 #include <sound/memalloc.h> 16 #include <sound/hda_verbs.h> 17 #include <drm/i915_component.h> 18 19 /* codec node id */ 20 typedef u16 hda_nid_t; 21 22 struct hdac_bus; 23 struct hdac_stream; 24 struct hdac_device; 25 struct hdac_driver; 26 struct hdac_widget_tree; 27 struct hda_device_id; 28 29 /* 30 * exported bus type 31 */ 32 extern struct bus_type snd_hda_bus_type; 33 34 /* 35 * generic arrays 36 */ 37 struct snd_array { 38 unsigned int used; 39 unsigned int alloced; 40 unsigned int elem_size; 41 unsigned int alloc_align; 42 void *list; 43 }; 44 45 /* 46 * HD-audio codec base device 47 */ 48 struct hdac_device { 49 struct device dev; 50 int type; 51 struct hdac_bus *bus; 52 unsigned int addr; /* codec address */ 53 struct list_head list; /* list point for bus codec_list */ 54 55 hda_nid_t afg; /* AFG node id */ 56 hda_nid_t mfg; /* MFG node id */ 57 58 /* ids */ 59 unsigned int vendor_id; 60 unsigned int subsystem_id; 61 unsigned int revision_id; 62 unsigned int afg_function_id; 63 unsigned int mfg_function_id; 64 unsigned int afg_unsol:1; 65 unsigned int mfg_unsol:1; 66 67 unsigned int power_caps; /* FG power caps */ 68 69 const char *vendor_name; /* codec vendor name */ 70 const char *chip_name; /* codec chip name */ 71 72 /* verb exec op override */ 73 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 74 unsigned int flags, unsigned int *res); 75 76 /* widgets */ 77 unsigned int num_nodes; 78 hda_nid_t start_nid, end_nid; 79 80 /* misc flags */ 81 atomic_t in_pm; /* suspend/resume being performed */ 82 bool link_power_control:1; 83 84 /* sysfs */ 85 struct hdac_widget_tree *widgets; 86 87 /* regmap */ 88 struct regmap *regmap; 89 struct snd_array vendor_verbs; 90 bool lazy_cache:1; /* don't wake up for writes */ 91 bool caps_overwriting:1; /* caps overwrite being in process */ 92 bool cache_coef:1; /* cache COEF read/write too */ 93 }; 94 95 /* device/driver type used for matching */ 96 enum { 97 HDA_DEV_CORE, 98 HDA_DEV_LEGACY, 99 HDA_DEV_ASOC, 100 }; 101 102 /* direction */ 103 enum { 104 HDA_INPUT, HDA_OUTPUT 105 }; 106 107 #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 108 109 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 110 const char *name, unsigned int addr); 111 void snd_hdac_device_exit(struct hdac_device *dev); 112 int snd_hdac_device_register(struct hdac_device *codec); 113 void snd_hdac_device_unregister(struct hdac_device *codec); 114 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); 115 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size); 116 117 int snd_hdac_refresh_widgets(struct hdac_device *codec, bool sysfs); 118 119 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid, 120 unsigned int verb, unsigned int parm); 121 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd, 122 unsigned int flags, unsigned int *res); 123 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 124 unsigned int verb, unsigned int parm, unsigned int *res); 125 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 126 unsigned int *res); 127 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 128 int parm); 129 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 130 unsigned int parm, unsigned int val); 131 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 132 hda_nid_t *conn_list, int max_conns); 133 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 134 hda_nid_t *start_id); 135 unsigned int snd_hdac_calc_stream_format(unsigned int rate, 136 unsigned int channels, 137 snd_pcm_format_t format, 138 unsigned int maxbps, 139 unsigned short spdif_ctls); 140 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 141 u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 142 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 143 unsigned int format); 144 145 int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, 146 int flags, unsigned int verb, unsigned int parm); 147 int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, 148 int flags, unsigned int verb, unsigned int parm); 149 bool snd_hdac_check_power_state(struct hdac_device *hdac, 150 hda_nid_t nid, unsigned int target_state); 151 unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac, 152 hda_nid_t nid, unsigned int target_state); 153 /** 154 * snd_hdac_read_parm - read a codec parameter 155 * @codec: the codec object 156 * @nid: NID to read a parameter 157 * @parm: parameter to read 158 * 159 * Returns -1 for error. If you need to distinguish the error more 160 * strictly, use _snd_hdac_read_parm() directly. 161 */ 162 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 163 int parm) 164 { 165 unsigned int val; 166 167 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 168 } 169 170 #ifdef CONFIG_PM 171 int snd_hdac_power_up(struct hdac_device *codec); 172 int snd_hdac_power_down(struct hdac_device *codec); 173 int snd_hdac_power_up_pm(struct hdac_device *codec); 174 int snd_hdac_power_down_pm(struct hdac_device *codec); 175 int snd_hdac_keep_power_up(struct hdac_device *codec); 176 177 /* call this at entering into suspend/resume callbacks in codec driver */ 178 static inline void snd_hdac_enter_pm(struct hdac_device *codec) 179 { 180 atomic_inc(&codec->in_pm); 181 } 182 183 /* call this at leaving from suspend/resume callbacks in codec driver */ 184 static inline void snd_hdac_leave_pm(struct hdac_device *codec) 185 { 186 atomic_dec(&codec->in_pm); 187 } 188 189 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) 190 { 191 return atomic_read(&codec->in_pm); 192 } 193 194 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) 195 { 196 return !pm_runtime_suspended(&codec->dev); 197 } 198 #else 199 static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 200 static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 201 static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 202 static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 203 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } 204 static inline void snd_hdac_enter_pm(struct hdac_device *codec) {} 205 static inline void snd_hdac_leave_pm(struct hdac_device *codec) {} 206 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return 0; } 207 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return 1; } 208 #endif 209 210 /* 211 * HD-audio codec base driver 212 */ 213 struct hdac_driver { 214 struct device_driver driver; 215 int type; 216 const struct hda_device_id *id_table; 217 int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 218 void (*unsol_event)(struct hdac_device *dev, unsigned int event); 219 220 /* fields used by ext bus APIs */ 221 int (*probe)(struct hdac_device *dev); 222 int (*remove)(struct hdac_device *dev); 223 void (*shutdown)(struct hdac_device *dev); 224 }; 225 226 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 227 228 const struct hda_device_id * 229 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 230 231 /* 232 * Bus verb operators 233 */ 234 struct hdac_bus_ops { 235 /* send a single command */ 236 int (*command)(struct hdac_bus *bus, unsigned int cmd); 237 /* get a response from the last command */ 238 int (*get_response)(struct hdac_bus *bus, unsigned int addr, 239 unsigned int *res); 240 /* control the link power */ 241 int (*link_power)(struct hdac_bus *bus, bool enable); 242 }; 243 244 /* 245 * ops used for ASoC HDA codec drivers 246 */ 247 struct hdac_ext_bus_ops { 248 int (*hdev_attach)(struct hdac_device *hdev); 249 int (*hdev_detach)(struct hdac_device *hdev); 250 }; 251 252 /* 253 * Lowlevel I/O operators 254 */ 255 struct hdac_io_ops { 256 /* mapped register accesses */ 257 void (*reg_writel)(u32 value, u32 __iomem *addr); 258 u32 (*reg_readl)(u32 __iomem *addr); 259 void (*reg_writew)(u16 value, u16 __iomem *addr); 260 u16 (*reg_readw)(u16 __iomem *addr); 261 void (*reg_writeb)(u8 value, u8 __iomem *addr); 262 u8 (*reg_readb)(u8 __iomem *addr); 263 /* Allocation ops */ 264 int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size, 265 struct snd_dma_buffer *buf); 266 void (*dma_free_pages)(struct hdac_bus *bus, 267 struct snd_dma_buffer *buf); 268 }; 269 270 #define HDA_UNSOL_QUEUE_SIZE 64 271 #define HDA_MAX_CODECS 8 /* limit by controller side */ 272 273 /* 274 * CORB/RIRB 275 * 276 * Each CORB entry is 4byte, RIRB is 8byte 277 */ 278 struct hdac_rb { 279 __le32 *buf; /* virtual address of CORB/RIRB buffer */ 280 dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 281 unsigned short rp, wp; /* RIRB read/write pointers */ 282 int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 283 u32 res[HDA_MAX_CODECS]; /* last read value */ 284 }; 285 286 /* 287 * HD-audio bus base driver 288 * 289 * @ppcap: pp capabilities pointer 290 * @spbcap: SPIB capabilities pointer 291 * @mlcap: MultiLink capabilities pointer 292 * @gtscap: gts capabilities pointer 293 * @drsmcap: dma resume capabilities pointer 294 * @num_streams: streams supported 295 * @idx: HDA link index 296 * @hlink_list: link list of HDA links 297 * @lock: lock for link mgmt 298 * @cmd_dma_state: state of cmd DMAs: CORB and RIRB 299 */ 300 struct hdac_bus { 301 struct device *dev; 302 const struct hdac_bus_ops *ops; 303 const struct hdac_io_ops *io_ops; 304 const struct hdac_ext_bus_ops *ext_ops; 305 306 /* h/w resources */ 307 unsigned long addr; 308 void __iomem *remap_addr; 309 int irq; 310 311 void __iomem *ppcap; 312 void __iomem *spbcap; 313 void __iomem *mlcap; 314 void __iomem *gtscap; 315 void __iomem *drsmcap; 316 317 /* codec linked list */ 318 struct list_head codec_list; 319 unsigned int num_codecs; 320 321 /* link caddr -> codec */ 322 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 323 324 /* unsolicited event queue */ 325 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 326 unsigned int unsol_rp, unsol_wp; 327 struct work_struct unsol_work; 328 329 /* bit flags of detected codecs */ 330 unsigned long codec_mask; 331 332 /* bit flags of powered codecs */ 333 unsigned long codec_powered; 334 335 /* CORB/RIRB */ 336 struct hdac_rb corb; 337 struct hdac_rb rirb; 338 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 339 340 /* CORB/RIRB and position buffers */ 341 struct snd_dma_buffer rb; 342 struct snd_dma_buffer posbuf; 343 344 /* hdac_stream linked list */ 345 struct list_head stream_list; 346 347 /* operation state */ 348 bool chip_init:1; /* h/w initialized */ 349 350 /* behavior flags */ 351 bool sync_write:1; /* sync after verb write */ 352 bool use_posbuf:1; /* use position buffer */ 353 bool snoop:1; /* enable snooping */ 354 bool align_bdle_4k:1; /* BDLE align 4K boundary */ 355 bool reverse_assign:1; /* assign devices in reverse order */ 356 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 357 358 int bdl_pos_adj; /* BDL position adjustment */ 359 360 /* locks */ 361 spinlock_t reg_lock; 362 struct mutex cmd_mutex; 363 364 /* DRM component interface */ 365 struct drm_audio_component *audio_component; 366 int drm_power_refcount; 367 368 /* parameters required for enhanced capabilities */ 369 int num_streams; 370 int idx; 371 372 struct list_head hlink_list; 373 374 struct mutex lock; 375 bool cmd_dma_state; 376 377 }; 378 379 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 380 const struct hdac_bus_ops *ops, 381 const struct hdac_io_ops *io_ops); 382 void snd_hdac_bus_exit(struct hdac_bus *bus); 383 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr, 384 unsigned int cmd, unsigned int *res); 385 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 386 unsigned int cmd, unsigned int *res); 387 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex); 388 389 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec); 390 void snd_hdac_bus_remove_device(struct hdac_bus *bus, 391 struct hdac_device *codec); 392 393 static inline void snd_hdac_codec_link_up(struct hdac_device *codec) 394 { 395 set_bit(codec->addr, &codec->bus->codec_powered); 396 } 397 398 static inline void snd_hdac_codec_link_down(struct hdac_device *codec) 399 { 400 clear_bit(codec->addr, &codec->bus->codec_powered); 401 } 402 403 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 404 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 405 unsigned int *res); 406 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus); 407 int snd_hdac_link_power(struct hdac_device *codec, bool enable); 408 409 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 410 void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 411 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 412 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 413 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 414 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 415 int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset); 416 417 void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 418 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 419 void (*ack)(struct hdac_bus *, 420 struct hdac_stream *)); 421 422 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 423 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 424 425 /* 426 * macros for easy use 427 */ 428 #define _snd_hdac_chip_writeb(chip, reg, value) \ 429 ((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg))) 430 #define _snd_hdac_chip_readb(chip, reg) \ 431 ((chip)->io_ops->reg_readb((chip)->remap_addr + (reg))) 432 #define _snd_hdac_chip_writew(chip, reg, value) \ 433 ((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg))) 434 #define _snd_hdac_chip_readw(chip, reg) \ 435 ((chip)->io_ops->reg_readw((chip)->remap_addr + (reg))) 436 #define _snd_hdac_chip_writel(chip, reg, value) \ 437 ((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg))) 438 #define _snd_hdac_chip_readl(chip, reg) \ 439 ((chip)->io_ops->reg_readl((chip)->remap_addr + (reg))) 440 441 /* read/write a register, pass without AZX_REG_ prefix */ 442 #define snd_hdac_chip_writel(chip, reg, value) \ 443 _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value) 444 #define snd_hdac_chip_writew(chip, reg, value) \ 445 _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value) 446 #define snd_hdac_chip_writeb(chip, reg, value) \ 447 _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value) 448 #define snd_hdac_chip_readl(chip, reg) \ 449 _snd_hdac_chip_readl(chip, AZX_REG_ ## reg) 450 #define snd_hdac_chip_readw(chip, reg) \ 451 _snd_hdac_chip_readw(chip, AZX_REG_ ## reg) 452 #define snd_hdac_chip_readb(chip, reg) \ 453 _snd_hdac_chip_readb(chip, AZX_REG_ ## reg) 454 455 /* update a register, pass without AZX_REG_ prefix */ 456 #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 457 snd_hdac_chip_writel(chip, reg, \ 458 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 459 #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 460 snd_hdac_chip_writew(chip, reg, \ 461 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 462 #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 463 snd_hdac_chip_writeb(chip, reg, \ 464 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 465 466 /* 467 * HD-audio stream 468 */ 469 struct hdac_stream { 470 struct hdac_bus *bus; 471 struct snd_dma_buffer bdl; /* BDL buffer */ 472 __le32 *posbuf; /* position buffer pointer */ 473 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 474 475 unsigned int bufsize; /* size of the play buffer in bytes */ 476 unsigned int period_bytes; /* size of the period in bytes */ 477 unsigned int frags; /* number for period in the play buffer */ 478 unsigned int fifo_size; /* FIFO size */ 479 480 void __iomem *sd_addr; /* stream descriptor pointer */ 481 482 u32 sd_int_sta_mask; /* stream int status mask */ 483 484 /* pcm support */ 485 struct snd_pcm_substream *substream; /* assigned substream, 486 * set in PCM open 487 */ 488 unsigned int format_val; /* format value to be set in the 489 * controller and the codec 490 */ 491 unsigned char stream_tag; /* assigned stream */ 492 unsigned char index; /* stream index */ 493 int assigned_key; /* last device# key assigned to */ 494 495 bool opened:1; 496 bool running:1; 497 bool prepared:1; 498 bool no_period_wakeup:1; 499 bool locked:1; 500 501 /* timestamp */ 502 unsigned long start_wallclk; /* start + minimum wallclk */ 503 unsigned long period_wallclk; /* wallclk for period */ 504 struct timecounter tc; 505 struct cyclecounter cc; 506 int delay_negative_threshold; 507 508 struct list_head list; 509 #ifdef CONFIG_SND_HDA_DSP_LOADER 510 /* DSP access mutex */ 511 struct mutex dsp_mutex; 512 #endif 513 }; 514 515 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 516 int idx, int direction, int tag); 517 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 518 struct snd_pcm_substream *substream); 519 void snd_hdac_stream_release(struct hdac_stream *azx_dev); 520 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 521 int dir, int stream_tag); 522 523 int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 524 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 525 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 526 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 527 unsigned int format_val); 528 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); 529 void snd_hdac_stream_clear(struct hdac_stream *azx_dev); 530 void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 531 void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 532 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 533 unsigned int streams, unsigned int reg); 534 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 535 unsigned int streams); 536 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 537 unsigned int streams); 538 /* 539 * macros for easy use 540 */ 541 #define _snd_hdac_stream_write(type, dev, reg, value) \ 542 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg))) 543 #define _snd_hdac_stream_read(type, dev, reg) \ 544 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg))) 545 546 /* read/write a register, pass without AZX_REG_ prefix */ 547 #define snd_hdac_stream_writel(dev, reg, value) \ 548 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value) 549 #define snd_hdac_stream_writew(dev, reg, value) \ 550 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value) 551 #define snd_hdac_stream_writeb(dev, reg, value) \ 552 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value) 553 #define snd_hdac_stream_readl(dev, reg) \ 554 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg) 555 #define snd_hdac_stream_readw(dev, reg) \ 556 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg) 557 #define snd_hdac_stream_readb(dev, reg) \ 558 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg) 559 560 /* update a register, pass without AZX_REG_ prefix */ 561 #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 562 snd_hdac_stream_writel(dev, reg, \ 563 (snd_hdac_stream_readl(dev, reg) & \ 564 ~(mask)) | (val)) 565 #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 566 snd_hdac_stream_writew(dev, reg, \ 567 (snd_hdac_stream_readw(dev, reg) & \ 568 ~(mask)) | (val)) 569 #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 570 snd_hdac_stream_writeb(dev, reg, \ 571 (snd_hdac_stream_readb(dev, reg) & \ 572 ~(mask)) | (val)) 573 574 #ifdef CONFIG_SND_HDA_DSP_LOADER 575 /* DSP lock helpers */ 576 #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 577 #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 578 #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 579 #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 580 /* DSP loader helpers */ 581 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 582 unsigned int byte_size, struct snd_dma_buffer *bufp); 583 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 584 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 585 struct snd_dma_buffer *dmab); 586 #else /* CONFIG_SND_HDA_DSP_LOADER */ 587 #define snd_hdac_dsp_lock_init(dev) do {} while (0) 588 #define snd_hdac_dsp_lock(dev) do {} while (0) 589 #define snd_hdac_dsp_unlock(dev) do {} while (0) 590 #define snd_hdac_stream_is_locked(dev) 0 591 592 static inline int 593 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 594 unsigned int byte_size, struct snd_dma_buffer *bufp) 595 { 596 return 0; 597 } 598 599 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 600 { 601 } 602 603 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 604 struct snd_dma_buffer *dmab) 605 { 606 } 607 #endif /* CONFIG_SND_HDA_DSP_LOADER */ 608 609 610 /* 611 * generic array helpers 612 */ 613 void *snd_array_new(struct snd_array *array); 614 void snd_array_free(struct snd_array *array); 615 static inline void snd_array_init(struct snd_array *array, unsigned int size, 616 unsigned int align) 617 { 618 array->elem_size = size; 619 array->alloc_align = align; 620 } 621 622 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 623 { 624 return array->list + idx * array->elem_size; 625 } 626 627 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 628 { 629 return (unsigned long)(ptr - array->list) / array->elem_size; 630 } 631 632 /* a helper macro to iterate for each snd_array element */ 633 #define snd_array_for_each(array, idx, ptr) \ 634 for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \ 635 (ptr) = snd_array_elem(array, ++(idx))) 636 637 #endif /* __SOUND_HDAUDIO_H */ 638