1 /* 2 * HD-audio core stuff 3 */ 4 5 #ifndef __SOUND_HDAUDIO_H 6 #define __SOUND_HDAUDIO_H 7 8 #include <linux/device.h> 9 #include <linux/interrupt.h> 10 #include <linux/timecounter.h> 11 #include <sound/core.h> 12 #include <sound/memalloc.h> 13 #include <sound/hda_verbs.h> 14 #include <drm/i915_component.h> 15 16 /* codec node id */ 17 typedef u16 hda_nid_t; 18 19 struct hdac_bus; 20 struct hdac_stream; 21 struct hdac_device; 22 struct hdac_driver; 23 struct hdac_widget_tree; 24 struct hda_device_id; 25 26 /* 27 * exported bus type 28 */ 29 extern struct bus_type snd_hda_bus_type; 30 31 /* 32 * generic arrays 33 */ 34 struct snd_array { 35 unsigned int used; 36 unsigned int alloced; 37 unsigned int elem_size; 38 unsigned int alloc_align; 39 void *list; 40 }; 41 42 /* 43 * HD-audio codec base device 44 */ 45 struct hdac_device { 46 struct device dev; 47 int type; 48 struct hdac_bus *bus; 49 unsigned int addr; /* codec address */ 50 struct list_head list; /* list point for bus codec_list */ 51 52 hda_nid_t afg; /* AFG node id */ 53 hda_nid_t mfg; /* MFG node id */ 54 55 /* ids */ 56 unsigned int vendor_id; 57 unsigned int subsystem_id; 58 unsigned int revision_id; 59 unsigned int afg_function_id; 60 unsigned int mfg_function_id; 61 unsigned int afg_unsol:1; 62 unsigned int mfg_unsol:1; 63 64 unsigned int power_caps; /* FG power caps */ 65 66 const char *vendor_name; /* codec vendor name */ 67 const char *chip_name; /* codec chip name */ 68 69 /* verb exec op override */ 70 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 71 unsigned int flags, unsigned int *res); 72 73 /* widgets */ 74 unsigned int num_nodes; 75 hda_nid_t start_nid, end_nid; 76 77 /* misc flags */ 78 atomic_t in_pm; /* suspend/resume being performed */ 79 bool link_power_control:1; 80 81 /* sysfs */ 82 struct hdac_widget_tree *widgets; 83 84 /* regmap */ 85 struct regmap *regmap; 86 struct snd_array vendor_verbs; 87 bool lazy_cache:1; /* don't wake up for writes */ 88 bool caps_overwriting:1; /* caps overwrite being in process */ 89 bool cache_coef:1; /* cache COEF read/write too */ 90 }; 91 92 /* device/driver type used for matching */ 93 enum { 94 HDA_DEV_CORE, 95 HDA_DEV_LEGACY, 96 HDA_DEV_ASOC, 97 }; 98 99 /* direction */ 100 enum { 101 HDA_INPUT, HDA_OUTPUT 102 }; 103 104 #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 105 106 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 107 const char *name, unsigned int addr); 108 void snd_hdac_device_exit(struct hdac_device *dev); 109 int snd_hdac_device_register(struct hdac_device *codec); 110 void snd_hdac_device_unregister(struct hdac_device *codec); 111 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); 112 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size); 113 114 int snd_hdac_refresh_widgets(struct hdac_device *codec); 115 int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec); 116 117 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid, 118 unsigned int verb, unsigned int parm); 119 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd, 120 unsigned int flags, unsigned int *res); 121 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 122 unsigned int verb, unsigned int parm, unsigned int *res); 123 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 124 unsigned int *res); 125 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 126 int parm); 127 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 128 unsigned int parm, unsigned int val); 129 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 130 hda_nid_t *conn_list, int max_conns); 131 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 132 hda_nid_t *start_id); 133 unsigned int snd_hdac_calc_stream_format(unsigned int rate, 134 unsigned int channels, 135 unsigned int format, 136 unsigned int maxbps, 137 unsigned short spdif_ctls); 138 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 139 u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 140 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 141 unsigned int format); 142 143 int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, 144 int flags, unsigned int verb, unsigned int parm); 145 int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, 146 int flags, unsigned int verb, unsigned int parm); 147 bool snd_hdac_check_power_state(struct hdac_device *hdac, 148 hda_nid_t nid, unsigned int target_state); 149 /** 150 * snd_hdac_read_parm - read a codec parameter 151 * @codec: the codec object 152 * @nid: NID to read a parameter 153 * @parm: parameter to read 154 * 155 * Returns -1 for error. If you need to distinguish the error more 156 * strictly, use _snd_hdac_read_parm() directly. 157 */ 158 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 159 int parm) 160 { 161 unsigned int val; 162 163 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 164 } 165 166 #ifdef CONFIG_PM 167 int snd_hdac_power_up(struct hdac_device *codec); 168 int snd_hdac_power_down(struct hdac_device *codec); 169 int snd_hdac_power_up_pm(struct hdac_device *codec); 170 int snd_hdac_power_down_pm(struct hdac_device *codec); 171 int snd_hdac_keep_power_up(struct hdac_device *codec); 172 #else 173 static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 174 static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 175 static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 176 static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 177 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } 178 #endif 179 180 /* 181 * HD-audio codec base driver 182 */ 183 struct hdac_driver { 184 struct device_driver driver; 185 int type; 186 const struct hda_device_id *id_table; 187 int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 188 void (*unsol_event)(struct hdac_device *dev, unsigned int event); 189 }; 190 191 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 192 193 const struct hda_device_id * 194 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 195 196 /* 197 * Bus verb operators 198 */ 199 struct hdac_bus_ops { 200 /* send a single command */ 201 int (*command)(struct hdac_bus *bus, unsigned int cmd); 202 /* get a response from the last command */ 203 int (*get_response)(struct hdac_bus *bus, unsigned int addr, 204 unsigned int *res); 205 /* control the link power */ 206 int (*link_power)(struct hdac_bus *bus, bool enable); 207 }; 208 209 /* 210 * Lowlevel I/O operators 211 */ 212 struct hdac_io_ops { 213 /* mapped register accesses */ 214 void (*reg_writel)(u32 value, u32 __iomem *addr); 215 u32 (*reg_readl)(u32 __iomem *addr); 216 void (*reg_writew)(u16 value, u16 __iomem *addr); 217 u16 (*reg_readw)(u16 __iomem *addr); 218 void (*reg_writeb)(u8 value, u8 __iomem *addr); 219 u8 (*reg_readb)(u8 __iomem *addr); 220 /* Allocation ops */ 221 int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size, 222 struct snd_dma_buffer *buf); 223 void (*dma_free_pages)(struct hdac_bus *bus, 224 struct snd_dma_buffer *buf); 225 }; 226 227 #define HDA_UNSOL_QUEUE_SIZE 64 228 #define HDA_MAX_CODECS 8 /* limit by controller side */ 229 230 /* HD Audio class code */ 231 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 232 233 /* 234 * CORB/RIRB 235 * 236 * Each CORB entry is 4byte, RIRB is 8byte 237 */ 238 struct hdac_rb { 239 __le32 *buf; /* virtual address of CORB/RIRB buffer */ 240 dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 241 unsigned short rp, wp; /* RIRB read/write pointers */ 242 int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 243 u32 res[HDA_MAX_CODECS]; /* last read value */ 244 }; 245 246 /* 247 * HD-audio bus base driver 248 * 249 * @ppcap: pp capabilities pointer 250 * @spbcap: SPIB capabilities pointer 251 * @mlcap: MultiLink capabilities pointer 252 * @gtscap: gts capabilities pointer 253 * @drsmcap: dma resume capabilities pointer 254 */ 255 struct hdac_bus { 256 struct device *dev; 257 const struct hdac_bus_ops *ops; 258 const struct hdac_io_ops *io_ops; 259 260 /* h/w resources */ 261 unsigned long addr; 262 void __iomem *remap_addr; 263 int irq; 264 265 void __iomem *ppcap; 266 void __iomem *spbcap; 267 void __iomem *mlcap; 268 void __iomem *gtscap; 269 void __iomem *drsmcap; 270 271 /* codec linked list */ 272 struct list_head codec_list; 273 unsigned int num_codecs; 274 275 /* link caddr -> codec */ 276 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 277 278 /* unsolicited event queue */ 279 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 280 unsigned int unsol_rp, unsol_wp; 281 struct work_struct unsol_work; 282 283 /* bit flags of detected codecs */ 284 unsigned long codec_mask; 285 286 /* bit flags of powered codecs */ 287 unsigned long codec_powered; 288 289 /* CORB/RIRB */ 290 struct hdac_rb corb; 291 struct hdac_rb rirb; 292 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 293 294 /* CORB/RIRB and position buffers */ 295 struct snd_dma_buffer rb; 296 struct snd_dma_buffer posbuf; 297 298 /* hdac_stream linked list */ 299 struct list_head stream_list; 300 301 /* operation state */ 302 bool chip_init:1; /* h/w initialized */ 303 304 /* behavior flags */ 305 bool sync_write:1; /* sync after verb write */ 306 bool use_posbuf:1; /* use position buffer */ 307 bool snoop:1; /* enable snooping */ 308 bool align_bdle_4k:1; /* BDLE align 4K boundary */ 309 bool reverse_assign:1; /* assign devices in reverse order */ 310 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 311 312 int bdl_pos_adj; /* BDL position adjustment */ 313 314 /* locks */ 315 spinlock_t reg_lock; 316 struct mutex cmd_mutex; 317 318 /* i915 component interface */ 319 struct i915_audio_component *audio_component; 320 int i915_power_refcount; 321 }; 322 323 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 324 const struct hdac_bus_ops *ops, 325 const struct hdac_io_ops *io_ops); 326 void snd_hdac_bus_exit(struct hdac_bus *bus); 327 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr, 328 unsigned int cmd, unsigned int *res); 329 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 330 unsigned int cmd, unsigned int *res); 331 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex); 332 333 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec); 334 void snd_hdac_bus_remove_device(struct hdac_bus *bus, 335 struct hdac_device *codec); 336 337 static inline void snd_hdac_codec_link_up(struct hdac_device *codec) 338 { 339 set_bit(codec->addr, &codec->bus->codec_powered); 340 } 341 342 static inline void snd_hdac_codec_link_down(struct hdac_device *codec) 343 { 344 clear_bit(codec->addr, &codec->bus->codec_powered); 345 } 346 347 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 348 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 349 unsigned int *res); 350 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus); 351 int snd_hdac_link_power(struct hdac_device *codec, bool enable); 352 353 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 354 void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 355 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 356 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 357 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 358 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 359 360 void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 361 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 362 void (*ack)(struct hdac_bus *, 363 struct hdac_stream *)); 364 365 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 366 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 367 368 /* 369 * macros for easy use 370 */ 371 #define _snd_hdac_chip_write(type, chip, reg, value) \ 372 ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg))) 373 #define _snd_hdac_chip_read(type, chip, reg) \ 374 ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg))) 375 376 /* read/write a register, pass without AZX_REG_ prefix */ 377 #define snd_hdac_chip_writel(chip, reg, value) \ 378 _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value) 379 #define snd_hdac_chip_writew(chip, reg, value) \ 380 _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value) 381 #define snd_hdac_chip_writeb(chip, reg, value) \ 382 _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value) 383 #define snd_hdac_chip_readl(chip, reg) \ 384 _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg) 385 #define snd_hdac_chip_readw(chip, reg) \ 386 _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg) 387 #define snd_hdac_chip_readb(chip, reg) \ 388 _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg) 389 390 /* update a register, pass without AZX_REG_ prefix */ 391 #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 392 snd_hdac_chip_writel(chip, reg, \ 393 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 394 #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 395 snd_hdac_chip_writew(chip, reg, \ 396 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 397 #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 398 snd_hdac_chip_writeb(chip, reg, \ 399 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 400 401 /* 402 * HD-audio stream 403 */ 404 struct hdac_stream { 405 struct hdac_bus *bus; 406 struct snd_dma_buffer bdl; /* BDL buffer */ 407 __le32 *posbuf; /* position buffer pointer */ 408 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 409 410 unsigned int bufsize; /* size of the play buffer in bytes */ 411 unsigned int period_bytes; /* size of the period in bytes */ 412 unsigned int frags; /* number for period in the play buffer */ 413 unsigned int fifo_size; /* FIFO size */ 414 415 void __iomem *sd_addr; /* stream descriptor pointer */ 416 417 u32 sd_int_sta_mask; /* stream int status mask */ 418 419 /* pcm support */ 420 struct snd_pcm_substream *substream; /* assigned substream, 421 * set in PCM open 422 */ 423 unsigned int format_val; /* format value to be set in the 424 * controller and the codec 425 */ 426 unsigned char stream_tag; /* assigned stream */ 427 unsigned char index; /* stream index */ 428 int assigned_key; /* last device# key assigned to */ 429 430 bool opened:1; 431 bool running:1; 432 bool prepared:1; 433 bool no_period_wakeup:1; 434 bool locked:1; 435 436 /* timestamp */ 437 unsigned long start_wallclk; /* start + minimum wallclk */ 438 unsigned long period_wallclk; /* wallclk for period */ 439 struct timecounter tc; 440 struct cyclecounter cc; 441 int delay_negative_threshold; 442 443 struct list_head list; 444 #ifdef CONFIG_SND_HDA_DSP_LOADER 445 /* DSP access mutex */ 446 struct mutex dsp_mutex; 447 #endif 448 }; 449 450 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 451 int idx, int direction, int tag); 452 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 453 struct snd_pcm_substream *substream); 454 void snd_hdac_stream_release(struct hdac_stream *azx_dev); 455 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 456 int dir, int stream_tag); 457 458 int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 459 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 460 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 461 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 462 unsigned int format_val); 463 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); 464 void snd_hdac_stream_clear(struct hdac_stream *azx_dev); 465 void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 466 void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 467 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 468 unsigned int streams, unsigned int reg); 469 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 470 unsigned int streams); 471 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 472 unsigned int streams); 473 /* 474 * macros for easy use 475 */ 476 #define _snd_hdac_stream_write(type, dev, reg, value) \ 477 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg))) 478 #define _snd_hdac_stream_read(type, dev, reg) \ 479 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg))) 480 481 /* read/write a register, pass without AZX_REG_ prefix */ 482 #define snd_hdac_stream_writel(dev, reg, value) \ 483 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value) 484 #define snd_hdac_stream_writew(dev, reg, value) \ 485 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value) 486 #define snd_hdac_stream_writeb(dev, reg, value) \ 487 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value) 488 #define snd_hdac_stream_readl(dev, reg) \ 489 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg) 490 #define snd_hdac_stream_readw(dev, reg) \ 491 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg) 492 #define snd_hdac_stream_readb(dev, reg) \ 493 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg) 494 495 /* update a register, pass without AZX_REG_ prefix */ 496 #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 497 snd_hdac_stream_writel(dev, reg, \ 498 (snd_hdac_stream_readl(dev, reg) & \ 499 ~(mask)) | (val)) 500 #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 501 snd_hdac_stream_writew(dev, reg, \ 502 (snd_hdac_stream_readw(dev, reg) & \ 503 ~(mask)) | (val)) 504 #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 505 snd_hdac_stream_writeb(dev, reg, \ 506 (snd_hdac_stream_readb(dev, reg) & \ 507 ~(mask)) | (val)) 508 509 #ifdef CONFIG_SND_HDA_DSP_LOADER 510 /* DSP lock helpers */ 511 #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 512 #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 513 #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 514 #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 515 /* DSP loader helpers */ 516 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 517 unsigned int byte_size, struct snd_dma_buffer *bufp); 518 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 519 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 520 struct snd_dma_buffer *dmab); 521 #else /* CONFIG_SND_HDA_DSP_LOADER */ 522 #define snd_hdac_dsp_lock_init(dev) do {} while (0) 523 #define snd_hdac_dsp_lock(dev) do {} while (0) 524 #define snd_hdac_dsp_unlock(dev) do {} while (0) 525 #define snd_hdac_stream_is_locked(dev) 0 526 527 static inline int 528 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 529 unsigned int byte_size, struct snd_dma_buffer *bufp) 530 { 531 return 0; 532 } 533 534 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 535 { 536 } 537 538 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 539 struct snd_dma_buffer *dmab) 540 { 541 } 542 #endif /* CONFIG_SND_HDA_DSP_LOADER */ 543 544 545 /* 546 * generic array helpers 547 */ 548 void *snd_array_new(struct snd_array *array); 549 void snd_array_free(struct snd_array *array); 550 static inline void snd_array_init(struct snd_array *array, unsigned int size, 551 unsigned int align) 552 { 553 array->elem_size = size; 554 array->alloc_align = align; 555 } 556 557 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 558 { 559 return array->list + idx * array->elem_size; 560 } 561 562 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 563 { 564 return (unsigned long)(ptr - array->list) / array->elem_size; 565 } 566 567 #endif /* __SOUND_HDAUDIO_H */ 568