xref: /openbmc/linux/include/sound/hdaudio.h (revision 4bce6fce)
1 /*
2  * HD-audio core stuff
3  */
4 
5 #ifndef __SOUND_HDAUDIO_H
6 #define __SOUND_HDAUDIO_H
7 
8 #include <linux/device.h>
9 #include <linux/interrupt.h>
10 #include <linux/timecounter.h>
11 #include <sound/core.h>
12 #include <sound/memalloc.h>
13 #include <sound/hda_verbs.h>
14 #include <drm/i915_component.h>
15 
16 /* codec node id */
17 typedef u16 hda_nid_t;
18 
19 struct hdac_bus;
20 struct hdac_stream;
21 struct hdac_device;
22 struct hdac_driver;
23 struct hdac_widget_tree;
24 
25 /*
26  * exported bus type
27  */
28 extern struct bus_type snd_hda_bus_type;
29 
30 /*
31  * generic arrays
32  */
33 struct snd_array {
34 	unsigned int used;
35 	unsigned int alloced;
36 	unsigned int elem_size;
37 	unsigned int alloc_align;
38 	void *list;
39 };
40 
41 /*
42  * HD-audio codec base device
43  */
44 struct hdac_device {
45 	struct device dev;
46 	int type;
47 	struct hdac_bus *bus;
48 	unsigned int addr;		/* codec address */
49 	struct list_head list;		/* list point for bus codec_list */
50 
51 	hda_nid_t afg;			/* AFG node id */
52 	hda_nid_t mfg;			/* MFG node id */
53 
54 	/* ids */
55 	unsigned int vendor_id;
56 	unsigned int subsystem_id;
57 	unsigned int revision_id;
58 	unsigned int afg_function_id;
59 	unsigned int mfg_function_id;
60 	unsigned int afg_unsol:1;
61 	unsigned int mfg_unsol:1;
62 
63 	unsigned int power_caps;	/* FG power caps */
64 
65 	const char *vendor_name;	/* codec vendor name */
66 	const char *chip_name;		/* codec chip name */
67 
68 	/* verb exec op override */
69 	int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
70 			 unsigned int flags, unsigned int *res);
71 
72 	/* widgets */
73 	unsigned int num_nodes;
74 	hda_nid_t start_nid, end_nid;
75 
76 	/* misc flags */
77 	atomic_t in_pm;		/* suspend/resume being performed */
78 	bool  link_power_control:1;
79 
80 	/* sysfs */
81 	struct hdac_widget_tree *widgets;
82 
83 	/* regmap */
84 	struct regmap *regmap;
85 	struct snd_array vendor_verbs;
86 	bool lazy_cache:1;	/* don't wake up for writes */
87 	bool caps_overwriting:1; /* caps overwrite being in process */
88 	bool cache_coef:1;	/* cache COEF read/write too */
89 };
90 
91 /* device/driver type used for matching */
92 enum {
93 	HDA_DEV_CORE,
94 	HDA_DEV_LEGACY,
95 	HDA_DEV_ASOC,
96 };
97 
98 /* direction */
99 enum {
100 	HDA_INPUT, HDA_OUTPUT
101 };
102 
103 #define dev_to_hdac_dev(_dev)	container_of(_dev, struct hdac_device, dev)
104 
105 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
106 			 const char *name, unsigned int addr);
107 void snd_hdac_device_exit(struct hdac_device *dev);
108 int snd_hdac_device_register(struct hdac_device *codec);
109 void snd_hdac_device_unregister(struct hdac_device *codec);
110 
111 int snd_hdac_refresh_widgets(struct hdac_device *codec);
112 
113 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
114 			       unsigned int verb, unsigned int parm);
115 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
116 		       unsigned int flags, unsigned int *res);
117 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
118 		  unsigned int verb, unsigned int parm, unsigned int *res);
119 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
120 			unsigned int *res);
121 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
122 				int parm);
123 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
124 			   unsigned int parm, unsigned int val);
125 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
126 			     hda_nid_t *conn_list, int max_conns);
127 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
128 			   hda_nid_t *start_id);
129 unsigned int snd_hdac_calc_stream_format(unsigned int rate,
130 					 unsigned int channels,
131 					 unsigned int format,
132 					 unsigned int maxbps,
133 					 unsigned short spdif_ctls);
134 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
135 				u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
136 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
137 				  unsigned int format);
138 
139 /**
140  * snd_hdac_read_parm - read a codec parameter
141  * @codec: the codec object
142  * @nid: NID to read a parameter
143  * @parm: parameter to read
144  *
145  * Returns -1 for error.  If you need to distinguish the error more
146  * strictly, use _snd_hdac_read_parm() directly.
147  */
148 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
149 				     int parm)
150 {
151 	unsigned int val;
152 
153 	return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
154 }
155 
156 #ifdef CONFIG_PM
157 void snd_hdac_power_up(struct hdac_device *codec);
158 void snd_hdac_power_down(struct hdac_device *codec);
159 void snd_hdac_power_up_pm(struct hdac_device *codec);
160 void snd_hdac_power_down_pm(struct hdac_device *codec);
161 #else
162 static inline void snd_hdac_power_up(struct hdac_device *codec) {}
163 static inline void snd_hdac_power_down(struct hdac_device *codec) {}
164 static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
165 static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
166 #endif
167 
168 /*
169  * HD-audio codec base driver
170  */
171 struct hdac_driver {
172 	struct device_driver driver;
173 	int type;
174 	int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
175 	void (*unsol_event)(struct hdac_device *dev, unsigned int event);
176 };
177 
178 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
179 
180 /*
181  * Bus verb operators
182  */
183 struct hdac_bus_ops {
184 	/* send a single command */
185 	int (*command)(struct hdac_bus *bus, unsigned int cmd);
186 	/* get a response from the last command */
187 	int (*get_response)(struct hdac_bus *bus, unsigned int addr,
188 			    unsigned int *res);
189 	/* control the link power  */
190 	int (*link_power)(struct hdac_bus *bus, bool enable);
191 };
192 
193 /*
194  * Lowlevel I/O operators
195  */
196 struct hdac_io_ops {
197 	/* mapped register accesses */
198 	void (*reg_writel)(u32 value, u32 __iomem *addr);
199 	u32 (*reg_readl)(u32 __iomem *addr);
200 	void (*reg_writew)(u16 value, u16 __iomem *addr);
201 	u16 (*reg_readw)(u16 __iomem *addr);
202 	void (*reg_writeb)(u8 value, u8 __iomem *addr);
203 	u8 (*reg_readb)(u8 __iomem *addr);
204 	/* Allocation ops */
205 	int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
206 			       struct snd_dma_buffer *buf);
207 	void (*dma_free_pages)(struct hdac_bus *bus,
208 			       struct snd_dma_buffer *buf);
209 };
210 
211 #define HDA_UNSOL_QUEUE_SIZE	64
212 #define HDA_MAX_CODECS		8	/* limit by controller side */
213 
214 /* HD Audio class code */
215 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO	0x0403
216 
217 /*
218  * CORB/RIRB
219  *
220  * Each CORB entry is 4byte, RIRB is 8byte
221  */
222 struct hdac_rb {
223 	__le32 *buf;		/* virtual address of CORB/RIRB buffer */
224 	dma_addr_t addr;	/* physical address of CORB/RIRB buffer */
225 	unsigned short rp, wp;	/* RIRB read/write pointers */
226 	int cmds[HDA_MAX_CODECS];	/* number of pending requests */
227 	u32 res[HDA_MAX_CODECS];	/* last read value */
228 };
229 
230 /*
231  * HD-audio bus base driver
232  */
233 struct hdac_bus {
234 	struct device *dev;
235 	const struct hdac_bus_ops *ops;
236 	const struct hdac_io_ops *io_ops;
237 
238 	/* h/w resources */
239 	unsigned long addr;
240 	void __iomem *remap_addr;
241 	int irq;
242 
243 	/* codec linked list */
244 	struct list_head codec_list;
245 	unsigned int num_codecs;
246 
247 	/* link caddr -> codec */
248 	struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
249 
250 	/* unsolicited event queue */
251 	u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
252 	unsigned int unsol_rp, unsol_wp;
253 	struct work_struct unsol_work;
254 
255 	/* bit flags of detected codecs */
256 	unsigned long codec_mask;
257 
258 	/* bit flags of powered codecs */
259 	unsigned long codec_powered;
260 
261 	/* CORB/RIRB */
262 	struct hdac_rb corb;
263 	struct hdac_rb rirb;
264 	unsigned int last_cmd[HDA_MAX_CODECS];	/* last sent command */
265 
266 	/* CORB/RIRB and position buffers */
267 	struct snd_dma_buffer rb;
268 	struct snd_dma_buffer posbuf;
269 
270 	/* hdac_stream linked list */
271 	struct list_head stream_list;
272 
273 	/* operation state */
274 	bool chip_init:1;		/* h/w initialized */
275 
276 	/* behavior flags */
277 	bool sync_write:1;		/* sync after verb write */
278 	bool use_posbuf:1;		/* use position buffer */
279 	bool snoop:1;			/* enable snooping */
280 	bool align_bdle_4k:1;		/* BDLE align 4K boundary */
281 	bool reverse_assign:1;		/* assign devices in reverse order */
282 	bool corbrp_self_clear:1;	/* CORBRP clears itself after reset */
283 
284 	int bdl_pos_adj;		/* BDL position adjustment */
285 
286 	/* locks */
287 	spinlock_t reg_lock;
288 	struct mutex cmd_mutex;
289 
290 	/* i915 component interface */
291 	struct i915_audio_component *audio_component;
292 	int i915_power_refcount;
293 };
294 
295 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
296 		      const struct hdac_bus_ops *ops,
297 		      const struct hdac_io_ops *io_ops);
298 void snd_hdac_bus_exit(struct hdac_bus *bus);
299 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
300 			   unsigned int cmd, unsigned int *res);
301 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
302 				    unsigned int cmd, unsigned int *res);
303 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
304 
305 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
306 void snd_hdac_bus_remove_device(struct hdac_bus *bus,
307 				struct hdac_device *codec);
308 
309 static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
310 {
311 	set_bit(codec->addr, &codec->bus->codec_powered);
312 }
313 
314 static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
315 {
316 	clear_bit(codec->addr, &codec->bus->codec_powered);
317 }
318 
319 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
320 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
321 			      unsigned int *res);
322 int snd_hdac_link_power(struct hdac_device *codec, bool enable);
323 
324 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
325 void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
326 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
327 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
328 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
329 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
330 
331 void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
332 void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
333 				    void (*ack)(struct hdac_bus *,
334 						struct hdac_stream *));
335 
336 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
337 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
338 
339 /*
340  * macros for easy use
341  */
342 #define _snd_hdac_chip_write(type, chip, reg, value) \
343 	((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
344 #define _snd_hdac_chip_read(type, chip, reg) \
345 	((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
346 
347 /* read/write a register, pass without AZX_REG_ prefix */
348 #define snd_hdac_chip_writel(chip, reg, value) \
349 	_snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
350 #define snd_hdac_chip_writew(chip, reg, value) \
351 	_snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
352 #define snd_hdac_chip_writeb(chip, reg, value) \
353 	_snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
354 #define snd_hdac_chip_readl(chip, reg) \
355 	_snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
356 #define snd_hdac_chip_readw(chip, reg) \
357 	_snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
358 #define snd_hdac_chip_readb(chip, reg) \
359 	_snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
360 
361 /* update a register, pass without AZX_REG_ prefix */
362 #define snd_hdac_chip_updatel(chip, reg, mask, val) \
363 	snd_hdac_chip_writel(chip, reg, \
364 			     (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
365 #define snd_hdac_chip_updatew(chip, reg, mask, val) \
366 	snd_hdac_chip_writew(chip, reg, \
367 			     (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
368 #define snd_hdac_chip_updateb(chip, reg, mask, val) \
369 	snd_hdac_chip_writeb(chip, reg, \
370 			     (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
371 
372 /*
373  * HD-audio stream
374  */
375 struct hdac_stream {
376 	struct hdac_bus *bus;
377 	struct snd_dma_buffer bdl; /* BDL buffer */
378 	__le32 *posbuf;		/* position buffer pointer */
379 	int direction;		/* playback / capture (SNDRV_PCM_STREAM_*) */
380 
381 	unsigned int bufsize;	/* size of the play buffer in bytes */
382 	unsigned int period_bytes; /* size of the period in bytes */
383 	unsigned int frags;	/* number for period in the play buffer */
384 	unsigned int fifo_size;	/* FIFO size */
385 
386 	void __iomem *sd_addr;	/* stream descriptor pointer */
387 
388 	u32 sd_int_sta_mask;	/* stream int status mask */
389 
390 	/* pcm support */
391 	struct snd_pcm_substream *substream;	/* assigned substream,
392 						 * set in PCM open
393 						 */
394 	unsigned int format_val;	/* format value to be set in the
395 					 * controller and the codec
396 					 */
397 	unsigned char stream_tag;	/* assigned stream */
398 	unsigned char index;		/* stream index */
399 	int assigned_key;		/* last device# key assigned to */
400 
401 	bool opened:1;
402 	bool running:1;
403 	bool prepared:1;
404 	bool no_period_wakeup:1;
405 	bool locked:1;
406 
407 	/* timestamp */
408 	unsigned long start_wallclk;	/* start + minimum wallclk */
409 	unsigned long period_wallclk;	/* wallclk for period */
410 	struct timecounter  tc;
411 	struct cyclecounter cc;
412 	int delay_negative_threshold;
413 
414 	struct list_head list;
415 #ifdef CONFIG_SND_HDA_DSP_LOADER
416 	/* DSP access mutex */
417 	struct mutex dsp_mutex;
418 #endif
419 };
420 
421 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
422 			  int idx, int direction, int tag);
423 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
424 					   struct snd_pcm_substream *substream);
425 void snd_hdac_stream_release(struct hdac_stream *azx_dev);
426 
427 int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
428 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
429 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
430 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
431 				unsigned int format_val);
432 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
433 void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
434 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
435 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
436 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
437 				  unsigned int streams, unsigned int reg);
438 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
439 			  unsigned int streams);
440 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
441 				      unsigned int streams);
442 /*
443  * macros for easy use
444  */
445 #define _snd_hdac_stream_write(type, dev, reg, value)			\
446 	((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
447 #define _snd_hdac_stream_read(type, dev, reg)				\
448 	((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
449 
450 /* read/write a register, pass without AZX_REG_ prefix */
451 #define snd_hdac_stream_writel(dev, reg, value) \
452 	_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
453 #define snd_hdac_stream_writew(dev, reg, value) \
454 	_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
455 #define snd_hdac_stream_writeb(dev, reg, value) \
456 	_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
457 #define snd_hdac_stream_readl(dev, reg) \
458 	_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
459 #define snd_hdac_stream_readw(dev, reg) \
460 	_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
461 #define snd_hdac_stream_readb(dev, reg) \
462 	_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
463 
464 /* update a register, pass without AZX_REG_ prefix */
465 #define snd_hdac_stream_updatel(dev, reg, mask, val) \
466 	snd_hdac_stream_writel(dev, reg, \
467 			       (snd_hdac_stream_readl(dev, reg) & \
468 				~(mask)) | (val))
469 #define snd_hdac_stream_updatew(dev, reg, mask, val) \
470 	snd_hdac_stream_writew(dev, reg, \
471 			       (snd_hdac_stream_readw(dev, reg) & \
472 				~(mask)) | (val))
473 #define snd_hdac_stream_updateb(dev, reg, mask, val) \
474 	snd_hdac_stream_writeb(dev, reg, \
475 			       (snd_hdac_stream_readb(dev, reg) & \
476 				~(mask)) | (val))
477 
478 #ifdef CONFIG_SND_HDA_DSP_LOADER
479 /* DSP lock helpers */
480 #define snd_hdac_dsp_lock_init(dev)	mutex_init(&(dev)->dsp_mutex)
481 #define snd_hdac_dsp_lock(dev)		mutex_lock(&(dev)->dsp_mutex)
482 #define snd_hdac_dsp_unlock(dev)	mutex_unlock(&(dev)->dsp_mutex)
483 #define snd_hdac_stream_is_locked(dev)	((dev)->locked)
484 /* DSP loader helpers */
485 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
486 			 unsigned int byte_size, struct snd_dma_buffer *bufp);
487 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
488 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
489 			  struct snd_dma_buffer *dmab);
490 #else /* CONFIG_SND_HDA_DSP_LOADER */
491 #define snd_hdac_dsp_lock_init(dev)	do {} while (0)
492 #define snd_hdac_dsp_lock(dev)		do {} while (0)
493 #define snd_hdac_dsp_unlock(dev)	do {} while (0)
494 #define snd_hdac_stream_is_locked(dev)	0
495 
496 static inline int
497 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
498 		     unsigned int byte_size, struct snd_dma_buffer *bufp)
499 {
500 	return 0;
501 }
502 
503 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
504 {
505 }
506 
507 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
508 					struct snd_dma_buffer *dmab)
509 {
510 }
511 #endif /* CONFIG_SND_HDA_DSP_LOADER */
512 
513 
514 /*
515  * generic array helpers
516  */
517 void *snd_array_new(struct snd_array *array);
518 void snd_array_free(struct snd_array *array);
519 static inline void snd_array_init(struct snd_array *array, unsigned int size,
520 				  unsigned int align)
521 {
522 	array->elem_size = size;
523 	array->alloc_align = align;
524 }
525 
526 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
527 {
528 	return array->list + idx * array->elem_size;
529 }
530 
531 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
532 {
533 	return (unsigned long)(ptr - array->list) / array->elem_size;
534 }
535 
536 #endif /* __SOUND_HDAUDIO_H */
537