1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * HD-audio core stuff 4 */ 5 6 #ifndef __SOUND_HDAUDIO_H 7 #define __SOUND_HDAUDIO_H 8 9 #include <linux/device.h> 10 #include <linux/interrupt.h> 11 #include <linux/io.h> 12 #include <linux/io-64-nonatomic-lo-hi.h> 13 #include <linux/iopoll.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/timecounter.h> 16 #include <sound/core.h> 17 #include <sound/pcm.h> 18 #include <sound/memalloc.h> 19 #include <sound/hda_verbs.h> 20 #include <drm/i915_component.h> 21 22 /* codec node id */ 23 typedef u16 hda_nid_t; 24 25 struct hdac_bus; 26 struct hdac_stream; 27 struct hdac_device; 28 struct hdac_driver; 29 struct hdac_widget_tree; 30 struct hda_device_id; 31 32 /* 33 * exported bus type 34 */ 35 extern struct bus_type snd_hda_bus_type; 36 37 /* 38 * generic arrays 39 */ 40 struct snd_array { 41 unsigned int used; 42 unsigned int alloced; 43 unsigned int elem_size; 44 unsigned int alloc_align; 45 void *list; 46 }; 47 48 /* 49 * HD-audio codec base device 50 */ 51 struct hdac_device { 52 struct device dev; 53 int type; 54 struct hdac_bus *bus; 55 unsigned int addr; /* codec address */ 56 struct list_head list; /* list point for bus codec_list */ 57 58 hda_nid_t afg; /* AFG node id */ 59 hda_nid_t mfg; /* MFG node id */ 60 61 /* ids */ 62 unsigned int vendor_id; 63 unsigned int subsystem_id; 64 unsigned int revision_id; 65 unsigned int afg_function_id; 66 unsigned int mfg_function_id; 67 unsigned int afg_unsol:1; 68 unsigned int mfg_unsol:1; 69 70 unsigned int power_caps; /* FG power caps */ 71 72 const char *vendor_name; /* codec vendor name */ 73 const char *chip_name; /* codec chip name */ 74 75 /* verb exec op override */ 76 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 77 unsigned int flags, unsigned int *res); 78 79 /* widgets */ 80 unsigned int num_nodes; 81 hda_nid_t start_nid, end_nid; 82 83 /* misc flags */ 84 atomic_t in_pm; /* suspend/resume being performed */ 85 86 /* sysfs */ 87 struct mutex widget_lock; 88 struct hdac_widget_tree *widgets; 89 90 /* regmap */ 91 struct regmap *regmap; 92 struct mutex regmap_lock; 93 struct snd_array vendor_verbs; 94 bool lazy_cache:1; /* don't wake up for writes */ 95 bool caps_overwriting:1; /* caps overwrite being in process */ 96 bool cache_coef:1; /* cache COEF read/write too */ 97 unsigned int registered:1; /* codec was registered */ 98 }; 99 100 /* device/driver type used for matching */ 101 enum { 102 HDA_DEV_CORE, 103 HDA_DEV_LEGACY, 104 HDA_DEV_ASOC, 105 }; 106 107 enum { 108 SND_SKL_PCI_BIND_AUTO, /* automatic selection based on pci class */ 109 SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */ 110 SND_SKL_PCI_BIND_ASOC /* bind only with ASoC driver */ 111 }; 112 113 /* direction */ 114 enum { 115 HDA_INPUT, HDA_OUTPUT 116 }; 117 118 #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 119 120 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 121 const char *name, unsigned int addr); 122 void snd_hdac_device_exit(struct hdac_device *dev); 123 int snd_hdac_device_register(struct hdac_device *codec); 124 void snd_hdac_device_unregister(struct hdac_device *codec); 125 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); 126 int snd_hdac_codec_modalias(const struct hdac_device *hdac, char *buf, size_t size); 127 128 int snd_hdac_refresh_widgets(struct hdac_device *codec); 129 130 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 131 unsigned int verb, unsigned int parm, unsigned int *res); 132 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 133 unsigned int *res); 134 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 135 int parm); 136 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 137 unsigned int parm, unsigned int val); 138 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 139 hda_nid_t *conn_list, int max_conns); 140 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 141 hda_nid_t *start_id); 142 unsigned int snd_hdac_calc_stream_format(unsigned int rate, 143 unsigned int channels, 144 snd_pcm_format_t format, 145 unsigned int maxbps, 146 unsigned short spdif_ctls); 147 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 148 u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 149 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 150 unsigned int format); 151 152 int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, 153 int flags, unsigned int verb, unsigned int parm); 154 int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, 155 int flags, unsigned int verb, unsigned int parm); 156 bool snd_hdac_check_power_state(struct hdac_device *hdac, 157 hda_nid_t nid, unsigned int target_state); 158 unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac, 159 hda_nid_t nid, unsigned int target_state); 160 /** 161 * snd_hdac_read_parm - read a codec parameter 162 * @codec: the codec object 163 * @nid: NID to read a parameter 164 * @parm: parameter to read 165 * 166 * Returns -1 for error. If you need to distinguish the error more 167 * strictly, use _snd_hdac_read_parm() directly. 168 */ 169 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 170 int parm) 171 { 172 unsigned int val; 173 174 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 175 } 176 177 #ifdef CONFIG_PM 178 int snd_hdac_power_up(struct hdac_device *codec); 179 int snd_hdac_power_down(struct hdac_device *codec); 180 int snd_hdac_power_up_pm(struct hdac_device *codec); 181 int snd_hdac_power_down_pm(struct hdac_device *codec); 182 int snd_hdac_keep_power_up(struct hdac_device *codec); 183 184 /* call this at entering into suspend/resume callbacks in codec driver */ 185 static inline void snd_hdac_enter_pm(struct hdac_device *codec) 186 { 187 atomic_inc(&codec->in_pm); 188 } 189 190 /* call this at leaving from suspend/resume callbacks in codec driver */ 191 static inline void snd_hdac_leave_pm(struct hdac_device *codec) 192 { 193 atomic_dec(&codec->in_pm); 194 } 195 196 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) 197 { 198 return atomic_read(&codec->in_pm); 199 } 200 201 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) 202 { 203 return !pm_runtime_suspended(&codec->dev); 204 } 205 #else 206 static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 207 static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 208 static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 209 static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 210 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } 211 static inline void snd_hdac_enter_pm(struct hdac_device *codec) {} 212 static inline void snd_hdac_leave_pm(struct hdac_device *codec) {} 213 static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; } 214 static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; } 215 #endif 216 217 /* 218 * HD-audio codec base driver 219 */ 220 struct hdac_driver { 221 struct device_driver driver; 222 int type; 223 const struct hda_device_id *id_table; 224 int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 225 void (*unsol_event)(struct hdac_device *dev, unsigned int event); 226 227 /* fields used by ext bus APIs */ 228 int (*probe)(struct hdac_device *dev); 229 int (*remove)(struct hdac_device *dev); 230 void (*shutdown)(struct hdac_device *dev); 231 }; 232 233 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 234 235 const struct hda_device_id * 236 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 237 238 /* 239 * Bus verb operators 240 */ 241 struct hdac_bus_ops { 242 /* send a single command */ 243 int (*command)(struct hdac_bus *bus, unsigned int cmd); 244 /* get a response from the last command */ 245 int (*get_response)(struct hdac_bus *bus, unsigned int addr, 246 unsigned int *res); 247 /* notify of codec link power-up/down */ 248 void (*link_power)(struct hdac_device *hdev, bool enable); 249 }; 250 251 /* 252 * ops used for ASoC HDA codec drivers 253 */ 254 struct hdac_ext_bus_ops { 255 int (*hdev_attach)(struct hdac_device *hdev); 256 int (*hdev_detach)(struct hdac_device *hdev); 257 }; 258 259 #define HDA_UNSOL_QUEUE_SIZE 64 260 #define HDA_MAX_CODECS 8 /* limit by controller side */ 261 262 /* 263 * CORB/RIRB 264 * 265 * Each CORB entry is 4byte, RIRB is 8byte 266 */ 267 struct hdac_rb { 268 __le32 *buf; /* virtual address of CORB/RIRB buffer */ 269 dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 270 unsigned short rp, wp; /* RIRB read/write pointers */ 271 int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 272 u32 res[HDA_MAX_CODECS]; /* last read value */ 273 }; 274 275 /* 276 * HD-audio bus base driver 277 * 278 * @ppcap: pp capabilities pointer 279 * @spbcap: SPIB capabilities pointer 280 * @mlcap: MultiLink capabilities pointer 281 * @gtscap: gts capabilities pointer 282 * @drsmcap: dma resume capabilities pointer 283 * @num_streams: streams supported 284 * @idx: HDA link index 285 * @hlink_list: link list of HDA links 286 * @lock: lock for link and display power mgmt 287 * @cmd_dma_state: state of cmd DMAs: CORB and RIRB 288 */ 289 struct hdac_bus { 290 struct device *dev; 291 const struct hdac_bus_ops *ops; 292 const struct hdac_ext_bus_ops *ext_ops; 293 294 /* h/w resources */ 295 unsigned long addr; 296 void __iomem *remap_addr; 297 int irq; 298 299 void __iomem *ppcap; 300 void __iomem *spbcap; 301 void __iomem *mlcap; 302 void __iomem *gtscap; 303 void __iomem *drsmcap; 304 305 /* codec linked list */ 306 struct list_head codec_list; 307 unsigned int num_codecs; 308 309 /* link caddr -> codec */ 310 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 311 312 /* unsolicited event queue */ 313 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 314 unsigned int unsol_rp, unsol_wp; 315 struct work_struct unsol_work; 316 317 /* bit flags of detected codecs */ 318 unsigned long codec_mask; 319 320 /* bit flags of powered codecs */ 321 unsigned long codec_powered; 322 323 /* CORB/RIRB */ 324 struct hdac_rb corb; 325 struct hdac_rb rirb; 326 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 327 wait_queue_head_t rirb_wq; 328 329 /* CORB/RIRB and position buffers */ 330 struct snd_dma_buffer rb; 331 struct snd_dma_buffer posbuf; 332 int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */ 333 334 /* hdac_stream linked list */ 335 struct list_head stream_list; 336 337 /* operation state */ 338 bool chip_init:1; /* h/w initialized */ 339 340 /* behavior flags */ 341 bool aligned_mmio:1; /* aligned MMIO access */ 342 bool sync_write:1; /* sync after verb write */ 343 bool use_posbuf:1; /* use position buffer */ 344 bool snoop:1; /* enable snooping */ 345 bool align_bdle_4k:1; /* BDLE align 4K boundary */ 346 bool reverse_assign:1; /* assign devices in reverse order */ 347 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 348 bool polling_mode:1; 349 bool needs_damn_long_delay:1; 350 351 int poll_count; 352 353 int bdl_pos_adj; /* BDL position adjustment */ 354 355 /* delay time in us for dma stop */ 356 unsigned int dma_stop_delay; 357 358 /* locks */ 359 spinlock_t reg_lock; 360 struct mutex cmd_mutex; 361 struct mutex lock; 362 363 /* DRM component interface */ 364 struct drm_audio_component *audio_component; 365 long display_power_status; 366 unsigned long display_power_active; 367 368 /* parameters required for enhanced capabilities */ 369 int num_streams; 370 int idx; 371 372 /* link management */ 373 struct list_head hlink_list; 374 bool cmd_dma_state; 375 376 /* factor used to derive STRIPE control value */ 377 unsigned int sdo_limit; 378 }; 379 380 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 381 const struct hdac_bus_ops *ops); 382 void snd_hdac_bus_exit(struct hdac_bus *bus); 383 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 384 unsigned int cmd, unsigned int *res); 385 386 void snd_hdac_codec_link_up(struct hdac_device *codec); 387 void snd_hdac_codec_link_down(struct hdac_device *codec); 388 389 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 390 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 391 unsigned int *res); 392 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus); 393 394 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 395 void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 396 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 397 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 398 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 399 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 400 int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset); 401 void snd_hdac_bus_link_power(struct hdac_device *hdev, bool enable); 402 403 void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 404 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 405 void (*ack)(struct hdac_bus *, 406 struct hdac_stream *)); 407 408 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 409 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 410 411 #ifdef CONFIG_SND_HDA_ALIGNED_MMIO 412 unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask); 413 void snd_hdac_aligned_write(unsigned int val, void __iomem *addr, 414 unsigned int mask); 415 #define snd_hdac_aligned_mmio(bus) (bus)->aligned_mmio 416 #else 417 #define snd_hdac_aligned_mmio(bus) false 418 #define snd_hdac_aligned_read(addr, mask) 0 419 #define snd_hdac_aligned_write(val, addr, mask) do {} while (0) 420 #endif 421 422 static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr, 423 u8 val) 424 { 425 if (snd_hdac_aligned_mmio(bus)) 426 snd_hdac_aligned_write(val, addr, 0xff); 427 else 428 writeb(val, addr); 429 } 430 431 static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr, 432 u16 val) 433 { 434 if (snd_hdac_aligned_mmio(bus)) 435 snd_hdac_aligned_write(val, addr, 0xffff); 436 else 437 writew(val, addr); 438 } 439 440 static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr) 441 { 442 return snd_hdac_aligned_mmio(bus) ? 443 snd_hdac_aligned_read(addr, 0xff) : readb(addr); 444 } 445 446 static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr) 447 { 448 return snd_hdac_aligned_mmio(bus) ? 449 snd_hdac_aligned_read(addr, 0xffff) : readw(addr); 450 } 451 452 #define snd_hdac_reg_writel(bus, addr, val) writel(val, addr) 453 #define snd_hdac_reg_readl(bus, addr) readl(addr) 454 #define snd_hdac_reg_writeq(bus, addr, val) writeq(val, addr) 455 #define snd_hdac_reg_readq(bus, addr) readq(addr) 456 457 /* 458 * macros for easy use 459 */ 460 #define _snd_hdac_chip_writeb(chip, reg, value) \ 461 snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value) 462 #define _snd_hdac_chip_readb(chip, reg) \ 463 snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg)) 464 #define _snd_hdac_chip_writew(chip, reg, value) \ 465 snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value) 466 #define _snd_hdac_chip_readw(chip, reg) \ 467 snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg)) 468 #define _snd_hdac_chip_writel(chip, reg, value) \ 469 snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value) 470 #define _snd_hdac_chip_readl(chip, reg) \ 471 snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg)) 472 473 /* read/write a register, pass without AZX_REG_ prefix */ 474 #define snd_hdac_chip_writel(chip, reg, value) \ 475 _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value) 476 #define snd_hdac_chip_writew(chip, reg, value) \ 477 _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value) 478 #define snd_hdac_chip_writeb(chip, reg, value) \ 479 _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value) 480 #define snd_hdac_chip_readl(chip, reg) \ 481 _snd_hdac_chip_readl(chip, AZX_REG_ ## reg) 482 #define snd_hdac_chip_readw(chip, reg) \ 483 _snd_hdac_chip_readw(chip, AZX_REG_ ## reg) 484 #define snd_hdac_chip_readb(chip, reg) \ 485 _snd_hdac_chip_readb(chip, AZX_REG_ ## reg) 486 487 /* update a register, pass without AZX_REG_ prefix */ 488 #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 489 snd_hdac_chip_writel(chip, reg, \ 490 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 491 #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 492 snd_hdac_chip_writew(chip, reg, \ 493 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 494 #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 495 snd_hdac_chip_writeb(chip, reg, \ 496 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 497 498 /* update register macro */ 499 #define snd_hdac_updatel(addr, reg, mask, val) \ 500 writel(((readl(addr + reg) & ~(mask)) | (val)), addr + reg) 501 502 #define snd_hdac_updatew(addr, reg, mask, val) \ 503 writew(((readw(addr + reg) & ~(mask)) | (val)), addr + reg) 504 505 /* 506 * HD-audio stream 507 */ 508 struct hdac_stream { 509 struct hdac_bus *bus; 510 struct snd_dma_buffer bdl; /* BDL buffer */ 511 __le32 *posbuf; /* position buffer pointer */ 512 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 513 514 unsigned int bufsize; /* size of the play buffer in bytes */ 515 unsigned int period_bytes; /* size of the period in bytes */ 516 unsigned int frags; /* number for period in the play buffer */ 517 unsigned int fifo_size; /* FIFO size */ 518 519 void __iomem *sd_addr; /* stream descriptor pointer */ 520 521 void __iomem *spib_addr; /* software position in buffers stream pointer */ 522 void __iomem *fifo_addr; /* software position Max fifos stream pointer */ 523 524 void __iomem *dpibr_addr; /* DMA position in buffer resume pointer */ 525 u32 dpib; /* DMA position in buffer */ 526 u32 lpib; /* Linear position in buffer */ 527 528 u32 sd_int_sta_mask; /* stream int status mask */ 529 530 /* pcm support */ 531 struct snd_pcm_substream *substream; /* assigned substream, 532 * set in PCM open 533 */ 534 struct snd_compr_stream *cstream; 535 unsigned int format_val; /* format value to be set in the 536 * controller and the codec 537 */ 538 unsigned char stream_tag; /* assigned stream */ 539 unsigned char index; /* stream index */ 540 int assigned_key; /* last device# key assigned to */ 541 542 bool opened:1; 543 bool running:1; 544 bool prepared:1; 545 bool no_period_wakeup:1; 546 bool locked:1; 547 bool stripe:1; /* apply stripe control */ 548 549 u64 curr_pos; 550 /* timestamp */ 551 unsigned long start_wallclk; /* start + minimum wallclk */ 552 unsigned long period_wallclk; /* wallclk for period */ 553 struct timecounter tc; 554 struct cyclecounter cc; 555 int delay_negative_threshold; 556 557 struct list_head list; 558 #ifdef CONFIG_SND_HDA_DSP_LOADER 559 /* DSP access mutex */ 560 struct mutex dsp_mutex; 561 #endif 562 }; 563 564 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 565 int idx, int direction, int tag); 566 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 567 struct snd_pcm_substream *substream); 568 void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev); 569 void snd_hdac_stream_release(struct hdac_stream *azx_dev); 570 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 571 int dir, int stream_tag); 572 573 int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 574 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 575 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 576 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 577 unsigned int format_val); 578 void snd_hdac_stream_start(struct hdac_stream *azx_dev); 579 void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 580 void snd_hdac_stop_streams(struct hdac_bus *bus); 581 void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus); 582 void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 583 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 584 unsigned int streams, unsigned int reg); 585 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 586 unsigned int streams); 587 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 588 unsigned int streams); 589 int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus, 590 struct snd_pcm_substream *substream); 591 592 void snd_hdac_stream_spbcap_enable(struct hdac_bus *chip, 593 bool enable, int index); 594 int snd_hdac_stream_set_spib(struct hdac_bus *bus, 595 struct hdac_stream *azx_dev, u32 value); 596 int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus, 597 struct hdac_stream *azx_dev); 598 void snd_hdac_stream_drsm_enable(struct hdac_bus *bus, 599 bool enable, int index); 600 int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev); 601 int snd_hdac_stream_set_dpibr(struct hdac_bus *bus, 602 struct hdac_stream *azx_dev, u32 value); 603 int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value); 604 605 /* 606 * macros for easy use 607 */ 608 /* read/write a register, pass without AZX_REG_ prefix */ 609 #define snd_hdac_stream_writel(dev, reg, value) \ 610 snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 611 #define snd_hdac_stream_writew(dev, reg, value) \ 612 snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 613 #define snd_hdac_stream_writeb(dev, reg, value) \ 614 snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value) 615 #define snd_hdac_stream_readl(dev, reg) \ 616 snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 617 #define snd_hdac_stream_readw(dev, reg) \ 618 snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 619 #define snd_hdac_stream_readb(dev, reg) \ 620 snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 621 #define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \ 622 read_poll_timeout_atomic(snd_hdac_reg_readb, val, cond, delay_us, timeout_us, \ 623 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 624 #define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \ 625 read_poll_timeout_atomic(snd_hdac_reg_readl, val, cond, delay_us, timeout_us, \ 626 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg) 627 628 /* update a register, pass without AZX_REG_ prefix */ 629 #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 630 snd_hdac_stream_writel(dev, reg, \ 631 (snd_hdac_stream_readl(dev, reg) & \ 632 ~(mask)) | (val)) 633 #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 634 snd_hdac_stream_writew(dev, reg, \ 635 (snd_hdac_stream_readw(dev, reg) & \ 636 ~(mask)) | (val)) 637 #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 638 snd_hdac_stream_writeb(dev, reg, \ 639 (snd_hdac_stream_readb(dev, reg) & \ 640 ~(mask)) | (val)) 641 642 #ifdef CONFIG_SND_HDA_DSP_LOADER 643 /* DSP lock helpers */ 644 #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 645 #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 646 #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 647 #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 648 /* DSP loader helpers */ 649 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 650 unsigned int byte_size, struct snd_dma_buffer *bufp); 651 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 652 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 653 struct snd_dma_buffer *dmab); 654 #else /* CONFIG_SND_HDA_DSP_LOADER */ 655 #define snd_hdac_dsp_lock_init(dev) do {} while (0) 656 #define snd_hdac_dsp_lock(dev) do {} while (0) 657 #define snd_hdac_dsp_unlock(dev) do {} while (0) 658 #define snd_hdac_stream_is_locked(dev) 0 659 660 static inline int 661 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 662 unsigned int byte_size, struct snd_dma_buffer *bufp) 663 { 664 return 0; 665 } 666 667 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 668 { 669 } 670 671 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 672 struct snd_dma_buffer *dmab) 673 { 674 } 675 #endif /* CONFIG_SND_HDA_DSP_LOADER */ 676 677 678 /* 679 * generic array helpers 680 */ 681 void *snd_array_new(struct snd_array *array); 682 void snd_array_free(struct snd_array *array); 683 static inline void snd_array_init(struct snd_array *array, unsigned int size, 684 unsigned int align) 685 { 686 array->elem_size = size; 687 array->alloc_align = align; 688 } 689 690 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 691 { 692 return array->list + idx * array->elem_size; 693 } 694 695 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 696 { 697 return (unsigned long)(ptr - array->list) / array->elem_size; 698 } 699 700 /* a helper macro to iterate for each snd_array element */ 701 #define snd_array_for_each(array, idx, ptr) \ 702 for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \ 703 (ptr) = snd_array_elem(array, ++(idx))) 704 705 #endif /* __SOUND_HDAUDIO_H */ 706