1 /* 2 * HD-audio core stuff 3 */ 4 5 #ifndef __SOUND_HDAUDIO_H 6 #define __SOUND_HDAUDIO_H 7 8 #include <linux/device.h> 9 #include <linux/interrupt.h> 10 #include <linux/timecounter.h> 11 #include <sound/core.h> 12 #include <sound/memalloc.h> 13 #include <sound/hda_verbs.h> 14 #include <drm/i915_component.h> 15 16 /* codec node id */ 17 typedef u16 hda_nid_t; 18 19 struct hdac_bus; 20 struct hdac_stream; 21 struct hdac_device; 22 struct hdac_driver; 23 struct hdac_widget_tree; 24 struct hda_device_id; 25 26 /* 27 * exported bus type 28 */ 29 extern struct bus_type snd_hda_bus_type; 30 31 /* 32 * generic arrays 33 */ 34 struct snd_array { 35 unsigned int used; 36 unsigned int alloced; 37 unsigned int elem_size; 38 unsigned int alloc_align; 39 void *list; 40 }; 41 42 /* 43 * HD-audio codec base device 44 */ 45 struct hdac_device { 46 struct device dev; 47 int type; 48 struct hdac_bus *bus; 49 unsigned int addr; /* codec address */ 50 struct list_head list; /* list point for bus codec_list */ 51 52 hda_nid_t afg; /* AFG node id */ 53 hda_nid_t mfg; /* MFG node id */ 54 55 /* ids */ 56 unsigned int vendor_id; 57 unsigned int subsystem_id; 58 unsigned int revision_id; 59 unsigned int afg_function_id; 60 unsigned int mfg_function_id; 61 unsigned int afg_unsol:1; 62 unsigned int mfg_unsol:1; 63 64 unsigned int power_caps; /* FG power caps */ 65 66 const char *vendor_name; /* codec vendor name */ 67 const char *chip_name; /* codec chip name */ 68 69 /* verb exec op override */ 70 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 71 unsigned int flags, unsigned int *res); 72 73 /* widgets */ 74 unsigned int num_nodes; 75 hda_nid_t start_nid, end_nid; 76 77 /* misc flags */ 78 atomic_t in_pm; /* suspend/resume being performed */ 79 bool link_power_control:1; 80 81 /* sysfs */ 82 struct hdac_widget_tree *widgets; 83 84 /* regmap */ 85 struct regmap *regmap; 86 struct snd_array vendor_verbs; 87 bool lazy_cache:1; /* don't wake up for writes */ 88 bool caps_overwriting:1; /* caps overwrite being in process */ 89 bool cache_coef:1; /* cache COEF read/write too */ 90 }; 91 92 /* device/driver type used for matching */ 93 enum { 94 HDA_DEV_CORE, 95 HDA_DEV_LEGACY, 96 HDA_DEV_ASOC, 97 }; 98 99 /* direction */ 100 enum { 101 HDA_INPUT, HDA_OUTPUT 102 }; 103 104 #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 105 106 int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 107 const char *name, unsigned int addr); 108 void snd_hdac_device_exit(struct hdac_device *dev); 109 int snd_hdac_device_register(struct hdac_device *codec); 110 void snd_hdac_device_unregister(struct hdac_device *codec); 111 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name); 112 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size); 113 114 int snd_hdac_refresh_widgets(struct hdac_device *codec); 115 int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec); 116 117 unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid, 118 unsigned int verb, unsigned int parm); 119 int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd, 120 unsigned int flags, unsigned int *res); 121 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 122 unsigned int verb, unsigned int parm, unsigned int *res); 123 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 124 unsigned int *res); 125 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 126 int parm); 127 int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 128 unsigned int parm, unsigned int val); 129 int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 130 hda_nid_t *conn_list, int max_conns); 131 int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 132 hda_nid_t *start_id); 133 unsigned int snd_hdac_calc_stream_format(unsigned int rate, 134 unsigned int channels, 135 unsigned int format, 136 unsigned int maxbps, 137 unsigned short spdif_ctls); 138 int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 139 u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 140 bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 141 unsigned int format); 142 143 int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid, 144 int flags, unsigned int verb, unsigned int parm); 145 int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid, 146 int flags, unsigned int verb, unsigned int parm); 147 bool snd_hdac_check_power_state(struct hdac_device *hdac, 148 hda_nid_t nid, unsigned int target_state); 149 /** 150 * snd_hdac_read_parm - read a codec parameter 151 * @codec: the codec object 152 * @nid: NID to read a parameter 153 * @parm: parameter to read 154 * 155 * Returns -1 for error. If you need to distinguish the error more 156 * strictly, use _snd_hdac_read_parm() directly. 157 */ 158 static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 159 int parm) 160 { 161 unsigned int val; 162 163 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 164 } 165 166 #ifdef CONFIG_PM 167 int snd_hdac_power_up(struct hdac_device *codec); 168 int snd_hdac_power_down(struct hdac_device *codec); 169 int snd_hdac_power_up_pm(struct hdac_device *codec); 170 int snd_hdac_power_down_pm(struct hdac_device *codec); 171 int snd_hdac_keep_power_up(struct hdac_device *codec); 172 #else 173 static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 174 static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 175 static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 176 static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 177 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; } 178 #endif 179 180 /* 181 * HD-audio codec base driver 182 */ 183 struct hdac_driver { 184 struct device_driver driver; 185 int type; 186 const struct hda_device_id *id_table; 187 int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 188 void (*unsol_event)(struct hdac_device *dev, unsigned int event); 189 }; 190 191 #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 192 193 const struct hda_device_id * 194 hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 195 196 /* 197 * Bus verb operators 198 */ 199 struct hdac_bus_ops { 200 /* send a single command */ 201 int (*command)(struct hdac_bus *bus, unsigned int cmd); 202 /* get a response from the last command */ 203 int (*get_response)(struct hdac_bus *bus, unsigned int addr, 204 unsigned int *res); 205 /* control the link power */ 206 int (*link_power)(struct hdac_bus *bus, bool enable); 207 }; 208 209 /* 210 * Lowlevel I/O operators 211 */ 212 struct hdac_io_ops { 213 /* mapped register accesses */ 214 void (*reg_writel)(u32 value, u32 __iomem *addr); 215 u32 (*reg_readl)(u32 __iomem *addr); 216 void (*reg_writew)(u16 value, u16 __iomem *addr); 217 u16 (*reg_readw)(u16 __iomem *addr); 218 void (*reg_writeb)(u8 value, u8 __iomem *addr); 219 u8 (*reg_readb)(u8 __iomem *addr); 220 /* Allocation ops */ 221 int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size, 222 struct snd_dma_buffer *buf); 223 void (*dma_free_pages)(struct hdac_bus *bus, 224 struct snd_dma_buffer *buf); 225 }; 226 227 #define HDA_UNSOL_QUEUE_SIZE 64 228 #define HDA_MAX_CODECS 8 /* limit by controller side */ 229 230 /* HD Audio class code */ 231 #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 232 233 /* 234 * CORB/RIRB 235 * 236 * Each CORB entry is 4byte, RIRB is 8byte 237 */ 238 struct hdac_rb { 239 __le32 *buf; /* virtual address of CORB/RIRB buffer */ 240 dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 241 unsigned short rp, wp; /* RIRB read/write pointers */ 242 int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 243 u32 res[HDA_MAX_CODECS]; /* last read value */ 244 }; 245 246 /* 247 * HD-audio bus base driver 248 */ 249 struct hdac_bus { 250 struct device *dev; 251 const struct hdac_bus_ops *ops; 252 const struct hdac_io_ops *io_ops; 253 254 /* h/w resources */ 255 unsigned long addr; 256 void __iomem *remap_addr; 257 int irq; 258 259 /* codec linked list */ 260 struct list_head codec_list; 261 unsigned int num_codecs; 262 263 /* link caddr -> codec */ 264 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 265 266 /* unsolicited event queue */ 267 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 268 unsigned int unsol_rp, unsol_wp; 269 struct work_struct unsol_work; 270 271 /* bit flags of detected codecs */ 272 unsigned long codec_mask; 273 274 /* bit flags of powered codecs */ 275 unsigned long codec_powered; 276 277 /* CORB/RIRB */ 278 struct hdac_rb corb; 279 struct hdac_rb rirb; 280 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 281 282 /* CORB/RIRB and position buffers */ 283 struct snd_dma_buffer rb; 284 struct snd_dma_buffer posbuf; 285 286 /* hdac_stream linked list */ 287 struct list_head stream_list; 288 289 /* operation state */ 290 bool chip_init:1; /* h/w initialized */ 291 292 /* behavior flags */ 293 bool sync_write:1; /* sync after verb write */ 294 bool use_posbuf:1; /* use position buffer */ 295 bool snoop:1; /* enable snooping */ 296 bool align_bdle_4k:1; /* BDLE align 4K boundary */ 297 bool reverse_assign:1; /* assign devices in reverse order */ 298 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 299 300 int bdl_pos_adj; /* BDL position adjustment */ 301 302 /* locks */ 303 spinlock_t reg_lock; 304 struct mutex cmd_mutex; 305 306 /* i915 component interface */ 307 struct i915_audio_component *audio_component; 308 int i915_power_refcount; 309 }; 310 311 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 312 const struct hdac_bus_ops *ops, 313 const struct hdac_io_ops *io_ops); 314 void snd_hdac_bus_exit(struct hdac_bus *bus); 315 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr, 316 unsigned int cmd, unsigned int *res); 317 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 318 unsigned int cmd, unsigned int *res); 319 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex); 320 321 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec); 322 void snd_hdac_bus_remove_device(struct hdac_bus *bus, 323 struct hdac_device *codec); 324 325 static inline void snd_hdac_codec_link_up(struct hdac_device *codec) 326 { 327 set_bit(codec->addr, &codec->bus->codec_powered); 328 } 329 330 static inline void snd_hdac_codec_link_down(struct hdac_device *codec) 331 { 332 clear_bit(codec->addr, &codec->bus->codec_powered); 333 } 334 335 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 336 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 337 unsigned int *res); 338 int snd_hdac_link_power(struct hdac_device *codec, bool enable); 339 340 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 341 void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 342 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 343 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 344 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 345 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 346 347 void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 348 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 349 void (*ack)(struct hdac_bus *, 350 struct hdac_stream *)); 351 352 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 353 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 354 355 /* 356 * macros for easy use 357 */ 358 #define _snd_hdac_chip_write(type, chip, reg, value) \ 359 ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg))) 360 #define _snd_hdac_chip_read(type, chip, reg) \ 361 ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg))) 362 363 /* read/write a register, pass without AZX_REG_ prefix */ 364 #define snd_hdac_chip_writel(chip, reg, value) \ 365 _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value) 366 #define snd_hdac_chip_writew(chip, reg, value) \ 367 _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value) 368 #define snd_hdac_chip_writeb(chip, reg, value) \ 369 _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value) 370 #define snd_hdac_chip_readl(chip, reg) \ 371 _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg) 372 #define snd_hdac_chip_readw(chip, reg) \ 373 _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg) 374 #define snd_hdac_chip_readb(chip, reg) \ 375 _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg) 376 377 /* update a register, pass without AZX_REG_ prefix */ 378 #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 379 snd_hdac_chip_writel(chip, reg, \ 380 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 381 #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 382 snd_hdac_chip_writew(chip, reg, \ 383 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 384 #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 385 snd_hdac_chip_writeb(chip, reg, \ 386 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 387 388 /* 389 * HD-audio stream 390 */ 391 struct hdac_stream { 392 struct hdac_bus *bus; 393 struct snd_dma_buffer bdl; /* BDL buffer */ 394 __le32 *posbuf; /* position buffer pointer */ 395 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 396 397 unsigned int bufsize; /* size of the play buffer in bytes */ 398 unsigned int period_bytes; /* size of the period in bytes */ 399 unsigned int frags; /* number for period in the play buffer */ 400 unsigned int fifo_size; /* FIFO size */ 401 402 void __iomem *sd_addr; /* stream descriptor pointer */ 403 404 u32 sd_int_sta_mask; /* stream int status mask */ 405 406 /* pcm support */ 407 struct snd_pcm_substream *substream; /* assigned substream, 408 * set in PCM open 409 */ 410 unsigned int format_val; /* format value to be set in the 411 * controller and the codec 412 */ 413 unsigned char stream_tag; /* assigned stream */ 414 unsigned char index; /* stream index */ 415 int assigned_key; /* last device# key assigned to */ 416 417 bool opened:1; 418 bool running:1; 419 bool prepared:1; 420 bool no_period_wakeup:1; 421 bool locked:1; 422 423 /* timestamp */ 424 unsigned long start_wallclk; /* start + minimum wallclk */ 425 unsigned long period_wallclk; /* wallclk for period */ 426 struct timecounter tc; 427 struct cyclecounter cc; 428 int delay_negative_threshold; 429 430 struct list_head list; 431 #ifdef CONFIG_SND_HDA_DSP_LOADER 432 /* DSP access mutex */ 433 struct mutex dsp_mutex; 434 #endif 435 }; 436 437 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 438 int idx, int direction, int tag); 439 struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 440 struct snd_pcm_substream *substream); 441 void snd_hdac_stream_release(struct hdac_stream *azx_dev); 442 struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 443 int dir, int stream_tag); 444 445 int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 446 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 447 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 448 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 449 unsigned int format_val); 450 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); 451 void snd_hdac_stream_clear(struct hdac_stream *azx_dev); 452 void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 453 void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 454 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 455 unsigned int streams, unsigned int reg); 456 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 457 unsigned int streams); 458 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 459 unsigned int streams); 460 /* 461 * macros for easy use 462 */ 463 #define _snd_hdac_stream_write(type, dev, reg, value) \ 464 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg))) 465 #define _snd_hdac_stream_read(type, dev, reg) \ 466 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg))) 467 468 /* read/write a register, pass without AZX_REG_ prefix */ 469 #define snd_hdac_stream_writel(dev, reg, value) \ 470 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value) 471 #define snd_hdac_stream_writew(dev, reg, value) \ 472 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value) 473 #define snd_hdac_stream_writeb(dev, reg, value) \ 474 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value) 475 #define snd_hdac_stream_readl(dev, reg) \ 476 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg) 477 #define snd_hdac_stream_readw(dev, reg) \ 478 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg) 479 #define snd_hdac_stream_readb(dev, reg) \ 480 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg) 481 482 /* update a register, pass without AZX_REG_ prefix */ 483 #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 484 snd_hdac_stream_writel(dev, reg, \ 485 (snd_hdac_stream_readl(dev, reg) & \ 486 ~(mask)) | (val)) 487 #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 488 snd_hdac_stream_writew(dev, reg, \ 489 (snd_hdac_stream_readw(dev, reg) & \ 490 ~(mask)) | (val)) 491 #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 492 snd_hdac_stream_writeb(dev, reg, \ 493 (snd_hdac_stream_readb(dev, reg) & \ 494 ~(mask)) | (val)) 495 496 #ifdef CONFIG_SND_HDA_DSP_LOADER 497 /* DSP lock helpers */ 498 #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 499 #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 500 #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 501 #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 502 /* DSP loader helpers */ 503 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 504 unsigned int byte_size, struct snd_dma_buffer *bufp); 505 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 506 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 507 struct snd_dma_buffer *dmab); 508 #else /* CONFIG_SND_HDA_DSP_LOADER */ 509 #define snd_hdac_dsp_lock_init(dev) do {} while (0) 510 #define snd_hdac_dsp_lock(dev) do {} while (0) 511 #define snd_hdac_dsp_unlock(dev) do {} while (0) 512 #define snd_hdac_stream_is_locked(dev) 0 513 514 static inline int 515 snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 516 unsigned int byte_size, struct snd_dma_buffer *bufp) 517 { 518 return 0; 519 } 520 521 static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 522 { 523 } 524 525 static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 526 struct snd_dma_buffer *dmab) 527 { 528 } 529 #endif /* CONFIG_SND_HDA_DSP_LOADER */ 530 531 532 /* 533 * generic array helpers 534 */ 535 void *snd_array_new(struct snd_array *array); 536 void snd_array_free(struct snd_array *array); 537 static inline void snd_array_init(struct snd_array *array, unsigned int size, 538 unsigned int align) 539 { 540 array->elem_size = size; 541 array->alloc_align = align; 542 } 543 544 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 545 { 546 return array->list + idx * array->elem_size; 547 } 548 549 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 550 { 551 return (unsigned long)(ptr - array->list) / array->elem_size; 552 } 553 554 #endif /* __SOUND_HDAUDIO_H */ 555