1e3d280fcSTakashi Iwai /* 2e3d280fcSTakashi Iwai * HD-audio core stuff 3e3d280fcSTakashi Iwai */ 4e3d280fcSTakashi Iwai 5e3d280fcSTakashi Iwai #ifndef __SOUND_HDAUDIO_H 6e3d280fcSTakashi Iwai #define __SOUND_HDAUDIO_H 7e3d280fcSTakashi Iwai 8e3d280fcSTakashi Iwai #include <linux/device.h> 914752412STakashi Iwai #include <linux/interrupt.h> 1014752412STakashi Iwai #include <linux/timecounter.h> 1114752412STakashi Iwai #include <sound/core.h> 1214752412STakashi Iwai #include <sound/memalloc.h> 13d068ebc2STakashi Iwai #include <sound/hda_verbs.h> 1498d8fc6cSMengdong Lin #include <drm/i915_component.h> 15d068ebc2STakashi Iwai 167639a06cSTakashi Iwai /* codec node id */ 177639a06cSTakashi Iwai typedef u16 hda_nid_t; 187639a06cSTakashi Iwai 19d068ebc2STakashi Iwai struct hdac_bus; 2014752412STakashi Iwai struct hdac_stream; 21d068ebc2STakashi Iwai struct hdac_device; 22d068ebc2STakashi Iwai struct hdac_driver; 233256be65STakashi Iwai struct hdac_widget_tree; 24e3d280fcSTakashi Iwai 25e3d280fcSTakashi Iwai /* 26e3d280fcSTakashi Iwai * exported bus type 27e3d280fcSTakashi Iwai */ 28e3d280fcSTakashi Iwai extern struct bus_type snd_hda_bus_type; 29e3d280fcSTakashi Iwai 30e3d280fcSTakashi Iwai /* 31ec71efc9SVinod Koul * HDA device table 32ec71efc9SVinod Koul */ 33ec71efc9SVinod Koul struct hda_device_id { 34ec71efc9SVinod Koul __u32 vendor_id; 35ec71efc9SVinod Koul __u32 rev_id; 36ec71efc9SVinod Koul const char *name; 37ec71efc9SVinod Koul unsigned long driver_data; 38ec71efc9SVinod Koul }; 39ec71efc9SVinod Koul 40ec71efc9SVinod Koul /* 4171fc4c7eSTakashi Iwai * generic arrays 4271fc4c7eSTakashi Iwai */ 4371fc4c7eSTakashi Iwai struct snd_array { 4471fc4c7eSTakashi Iwai unsigned int used; 4571fc4c7eSTakashi Iwai unsigned int alloced; 4671fc4c7eSTakashi Iwai unsigned int elem_size; 4771fc4c7eSTakashi Iwai unsigned int alloc_align; 4871fc4c7eSTakashi Iwai void *list; 4971fc4c7eSTakashi Iwai }; 5071fc4c7eSTakashi Iwai 5171fc4c7eSTakashi Iwai /* 52e3d280fcSTakashi Iwai * HD-audio codec base device 53e3d280fcSTakashi Iwai */ 54e3d280fcSTakashi Iwai struct hdac_device { 55e3d280fcSTakashi Iwai struct device dev; 56e3d280fcSTakashi Iwai int type; 57d068ebc2STakashi Iwai struct hdac_bus *bus; 58d068ebc2STakashi Iwai unsigned int addr; /* codec address */ 59d068ebc2STakashi Iwai struct list_head list; /* list point for bus codec_list */ 607639a06cSTakashi Iwai 617639a06cSTakashi Iwai hda_nid_t afg; /* AFG node id */ 627639a06cSTakashi Iwai hda_nid_t mfg; /* MFG node id */ 637639a06cSTakashi Iwai 647639a06cSTakashi Iwai /* ids */ 657639a06cSTakashi Iwai unsigned int vendor_id; 667639a06cSTakashi Iwai unsigned int subsystem_id; 677639a06cSTakashi Iwai unsigned int revision_id; 687639a06cSTakashi Iwai unsigned int afg_function_id; 697639a06cSTakashi Iwai unsigned int mfg_function_id; 707639a06cSTakashi Iwai unsigned int afg_unsol:1; 717639a06cSTakashi Iwai unsigned int mfg_unsol:1; 727639a06cSTakashi Iwai 737639a06cSTakashi Iwai unsigned int power_caps; /* FG power caps */ 747639a06cSTakashi Iwai 757639a06cSTakashi Iwai const char *vendor_name; /* codec vendor name */ 767639a06cSTakashi Iwai const char *chip_name; /* codec chip name */ 777639a06cSTakashi Iwai 7805852448STakashi Iwai /* verb exec op override */ 7905852448STakashi Iwai int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, 8005852448STakashi Iwai unsigned int flags, unsigned int *res); 8105852448STakashi Iwai 827639a06cSTakashi Iwai /* widgets */ 837639a06cSTakashi Iwai unsigned int num_nodes; 847639a06cSTakashi Iwai hda_nid_t start_nid, end_nid; 857639a06cSTakashi Iwai 867639a06cSTakashi Iwai /* misc flags */ 877639a06cSTakashi Iwai atomic_t in_pm; /* suspend/resume being performed */ 88a5e7e07cSMengdong Lin bool link_power_control:1; 893256be65STakashi Iwai 903256be65STakashi Iwai /* sysfs */ 913256be65STakashi Iwai struct hdac_widget_tree *widgets; 924d75faa0STakashi Iwai 934d75faa0STakashi Iwai /* regmap */ 944d75faa0STakashi Iwai struct regmap *regmap; 955e56bceaSTakashi Iwai struct snd_array vendor_verbs; 964d75faa0STakashi Iwai bool lazy_cache:1; /* don't wake up for writes */ 97faa75f8aSTakashi Iwai bool caps_overwriting:1; /* caps overwrite being in process */ 9840ba66a7STakashi Iwai bool cache_coef:1; /* cache COEF read/write too */ 99e3d280fcSTakashi Iwai }; 100e3d280fcSTakashi Iwai 101e3d280fcSTakashi Iwai /* device/driver type used for matching */ 102e3d280fcSTakashi Iwai enum { 103e3d280fcSTakashi Iwai HDA_DEV_CORE, 104e3d280fcSTakashi Iwai HDA_DEV_LEGACY, 105c1cc18b1SRamesh Babu HDA_DEV_ASOC, 106e3d280fcSTakashi Iwai }; 107e3d280fcSTakashi Iwai 1087639a06cSTakashi Iwai /* direction */ 1097639a06cSTakashi Iwai enum { 1107639a06cSTakashi Iwai HDA_INPUT, HDA_OUTPUT 1117639a06cSTakashi Iwai }; 1127639a06cSTakashi Iwai 113e3d280fcSTakashi Iwai #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev) 114e3d280fcSTakashi Iwai 1157639a06cSTakashi Iwai int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus, 1167639a06cSTakashi Iwai const char *name, unsigned int addr); 1177639a06cSTakashi Iwai void snd_hdac_device_exit(struct hdac_device *dev); 1183256be65STakashi Iwai int snd_hdac_device_register(struct hdac_device *codec); 1193256be65STakashi Iwai void snd_hdac_device_unregister(struct hdac_device *codec); 1207639a06cSTakashi Iwai 1217639a06cSTakashi Iwai int snd_hdac_refresh_widgets(struct hdac_device *codec); 12218dfd79dSVinod Koul int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec); 1237639a06cSTakashi Iwai 1247639a06cSTakashi Iwai unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid, 1257639a06cSTakashi Iwai unsigned int verb, unsigned int parm); 12605852448STakashi Iwai int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd, 12705852448STakashi Iwai unsigned int flags, unsigned int *res); 1287639a06cSTakashi Iwai int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid, 1297639a06cSTakashi Iwai unsigned int verb, unsigned int parm, unsigned int *res); 13001ed3c06STakashi Iwai int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm, 13101ed3c06STakashi Iwai unsigned int *res); 1329ba17b4dSTakashi Iwai int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid, 1339ba17b4dSTakashi Iwai int parm); 134faa75f8aSTakashi Iwai int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid, 135faa75f8aSTakashi Iwai unsigned int parm, unsigned int val); 1367639a06cSTakashi Iwai int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid, 1377639a06cSTakashi Iwai hda_nid_t *conn_list, int max_conns); 1387639a06cSTakashi Iwai int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid, 1397639a06cSTakashi Iwai hda_nid_t *start_id); 140b7d023e1STakashi Iwai unsigned int snd_hdac_calc_stream_format(unsigned int rate, 141b7d023e1STakashi Iwai unsigned int channels, 142b7d023e1STakashi Iwai unsigned int format, 143b7d023e1STakashi Iwai unsigned int maxbps, 144b7d023e1STakashi Iwai unsigned short spdif_ctls); 145b7d023e1STakashi Iwai int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid, 146b7d023e1STakashi Iwai u32 *ratesp, u64 *formatsp, unsigned int *bpsp); 147b7d023e1STakashi Iwai bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid, 148b7d023e1STakashi Iwai unsigned int format); 1497639a06cSTakashi Iwai 15001ed3c06STakashi Iwai /** 15101ed3c06STakashi Iwai * snd_hdac_read_parm - read a codec parameter 15201ed3c06STakashi Iwai * @codec: the codec object 15301ed3c06STakashi Iwai * @nid: NID to read a parameter 15401ed3c06STakashi Iwai * @parm: parameter to read 15501ed3c06STakashi Iwai * 15601ed3c06STakashi Iwai * Returns -1 for error. If you need to distinguish the error more 15701ed3c06STakashi Iwai * strictly, use _snd_hdac_read_parm() directly. 15801ed3c06STakashi Iwai */ 15901ed3c06STakashi Iwai static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, 16001ed3c06STakashi Iwai int parm) 16101ed3c06STakashi Iwai { 16201ed3c06STakashi Iwai unsigned int val; 16301ed3c06STakashi Iwai 16401ed3c06STakashi Iwai return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; 16501ed3c06STakashi Iwai } 16601ed3c06STakashi Iwai 1677639a06cSTakashi Iwai #ifdef CONFIG_PM 168fbce23a0STakashi Iwai int snd_hdac_power_up(struct hdac_device *codec); 169fbce23a0STakashi Iwai int snd_hdac_power_down(struct hdac_device *codec); 170fbce23a0STakashi Iwai int snd_hdac_power_up_pm(struct hdac_device *codec); 171fbce23a0STakashi Iwai int snd_hdac_power_down_pm(struct hdac_device *codec); 1727639a06cSTakashi Iwai #else 173fbce23a0STakashi Iwai static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; } 174fbce23a0STakashi Iwai static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; } 175fbce23a0STakashi Iwai static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; } 176fbce23a0STakashi Iwai static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; } 1777639a06cSTakashi Iwai #endif 1787639a06cSTakashi Iwai 179e3d280fcSTakashi Iwai /* 180e3d280fcSTakashi Iwai * HD-audio codec base driver 181e3d280fcSTakashi Iwai */ 182e3d280fcSTakashi Iwai struct hdac_driver { 183e3d280fcSTakashi Iwai struct device_driver driver; 184e3d280fcSTakashi Iwai int type; 185ec71efc9SVinod Koul const struct hda_device_id *id_table; 186e3d280fcSTakashi Iwai int (*match)(struct hdac_device *dev, struct hdac_driver *drv); 187d068ebc2STakashi Iwai void (*unsol_event)(struct hdac_device *dev, unsigned int event); 188e3d280fcSTakashi Iwai }; 189e3d280fcSTakashi Iwai 190e3d280fcSTakashi Iwai #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver) 191e3d280fcSTakashi Iwai 192ec71efc9SVinod Koul const struct hda_device_id * 193ec71efc9SVinod Koul hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv); 194ec71efc9SVinod Koul 195d068ebc2STakashi Iwai /* 19614752412STakashi Iwai * Bus verb operators 197d068ebc2STakashi Iwai */ 198d068ebc2STakashi Iwai struct hdac_bus_ops { 199d068ebc2STakashi Iwai /* send a single command */ 200d068ebc2STakashi Iwai int (*command)(struct hdac_bus *bus, unsigned int cmd); 201d068ebc2STakashi Iwai /* get a response from the last command */ 202d068ebc2STakashi Iwai int (*get_response)(struct hdac_bus *bus, unsigned int addr, 203d068ebc2STakashi Iwai unsigned int *res); 204a5e7e07cSMengdong Lin /* control the link power */ 205a5e7e07cSMengdong Lin int (*link_power)(struct hdac_bus *bus, bool enable); 206d068ebc2STakashi Iwai }; 207d068ebc2STakashi Iwai 20814752412STakashi Iwai /* 20914752412STakashi Iwai * Lowlevel I/O operators 21014752412STakashi Iwai */ 21114752412STakashi Iwai struct hdac_io_ops { 21214752412STakashi Iwai /* mapped register accesses */ 21314752412STakashi Iwai void (*reg_writel)(u32 value, u32 __iomem *addr); 21414752412STakashi Iwai u32 (*reg_readl)(u32 __iomem *addr); 21514752412STakashi Iwai void (*reg_writew)(u16 value, u16 __iomem *addr); 21614752412STakashi Iwai u16 (*reg_readw)(u16 __iomem *addr); 21714752412STakashi Iwai void (*reg_writeb)(u8 value, u8 __iomem *addr); 21814752412STakashi Iwai u8 (*reg_readb)(u8 __iomem *addr); 2198f3f600bSTakashi Iwai /* Allocation ops */ 2208f3f600bSTakashi Iwai int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size, 2218f3f600bSTakashi Iwai struct snd_dma_buffer *buf); 2228f3f600bSTakashi Iwai void (*dma_free_pages)(struct hdac_bus *bus, 2238f3f600bSTakashi Iwai struct snd_dma_buffer *buf); 22414752412STakashi Iwai }; 225d068ebc2STakashi Iwai 22614752412STakashi Iwai #define HDA_UNSOL_QUEUE_SIZE 64 22714752412STakashi Iwai #define HDA_MAX_CODECS 8 /* limit by controller side */ 22814752412STakashi Iwai 22914752412STakashi Iwai /* HD Audio class code */ 23014752412STakashi Iwai #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 23114752412STakashi Iwai 23214752412STakashi Iwai /* 23314752412STakashi Iwai * CORB/RIRB 23414752412STakashi Iwai * 23514752412STakashi Iwai * Each CORB entry is 4byte, RIRB is 8byte 23614752412STakashi Iwai */ 23714752412STakashi Iwai struct hdac_rb { 23814752412STakashi Iwai __le32 *buf; /* virtual address of CORB/RIRB buffer */ 23914752412STakashi Iwai dma_addr_t addr; /* physical address of CORB/RIRB buffer */ 24014752412STakashi Iwai unsigned short rp, wp; /* RIRB read/write pointers */ 24114752412STakashi Iwai int cmds[HDA_MAX_CODECS]; /* number of pending requests */ 24214752412STakashi Iwai u32 res[HDA_MAX_CODECS]; /* last read value */ 24314752412STakashi Iwai }; 24414752412STakashi Iwai 24514752412STakashi Iwai /* 24614752412STakashi Iwai * HD-audio bus base driver 24714752412STakashi Iwai */ 248d068ebc2STakashi Iwai struct hdac_bus { 249d068ebc2STakashi Iwai struct device *dev; 250d068ebc2STakashi Iwai const struct hdac_bus_ops *ops; 25114752412STakashi Iwai const struct hdac_io_ops *io_ops; 25214752412STakashi Iwai 25314752412STakashi Iwai /* h/w resources */ 25414752412STakashi Iwai unsigned long addr; 25514752412STakashi Iwai void __iomem *remap_addr; 25614752412STakashi Iwai int irq; 257d068ebc2STakashi Iwai 258d068ebc2STakashi Iwai /* codec linked list */ 259d068ebc2STakashi Iwai struct list_head codec_list; 260d068ebc2STakashi Iwai unsigned int num_codecs; 261d068ebc2STakashi Iwai 262d068ebc2STakashi Iwai /* link caddr -> codec */ 263d068ebc2STakashi Iwai struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 264d068ebc2STakashi Iwai 265d068ebc2STakashi Iwai /* unsolicited event queue */ 266d068ebc2STakashi Iwai u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */ 267d068ebc2STakashi Iwai unsigned int unsol_rp, unsol_wp; 268d068ebc2STakashi Iwai struct work_struct unsol_work; 269d068ebc2STakashi Iwai 27014752412STakashi Iwai /* bit flags of detected codecs */ 27114752412STakashi Iwai unsigned long codec_mask; 27214752412STakashi Iwai 273d068ebc2STakashi Iwai /* bit flags of powered codecs */ 274d068ebc2STakashi Iwai unsigned long codec_powered; 275d068ebc2STakashi Iwai 27614752412STakashi Iwai /* CORB/RIRB */ 27714752412STakashi Iwai struct hdac_rb corb; 27814752412STakashi Iwai struct hdac_rb rirb; 27914752412STakashi Iwai unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */ 28014752412STakashi Iwai 28114752412STakashi Iwai /* CORB/RIRB and position buffers */ 28214752412STakashi Iwai struct snd_dma_buffer rb; 28314752412STakashi Iwai struct snd_dma_buffer posbuf; 28414752412STakashi Iwai 28514752412STakashi Iwai /* hdac_stream linked list */ 28614752412STakashi Iwai struct list_head stream_list; 28714752412STakashi Iwai 28814752412STakashi Iwai /* operation state */ 28914752412STakashi Iwai bool chip_init:1; /* h/w initialized */ 29014752412STakashi Iwai 29114752412STakashi Iwai /* behavior flags */ 292d068ebc2STakashi Iwai bool sync_write:1; /* sync after verb write */ 29314752412STakashi Iwai bool use_posbuf:1; /* use position buffer */ 29414752412STakashi Iwai bool snoop:1; /* enable snooping */ 29514752412STakashi Iwai bool align_bdle_4k:1; /* BDLE align 4K boundary */ 29614752412STakashi Iwai bool reverse_assign:1; /* assign devices in reverse order */ 29714752412STakashi Iwai bool corbrp_self_clear:1; /* CORBRP clears itself after reset */ 29814752412STakashi Iwai 29914752412STakashi Iwai int bdl_pos_adj; /* BDL position adjustment */ 300d068ebc2STakashi Iwai 301d068ebc2STakashi Iwai /* locks */ 30214752412STakashi Iwai spinlock_t reg_lock; 303d068ebc2STakashi Iwai struct mutex cmd_mutex; 30498d8fc6cSMengdong Lin 30598d8fc6cSMengdong Lin /* i915 component interface */ 30698d8fc6cSMengdong Lin struct i915_audio_component *audio_component; 30798d8fc6cSMengdong Lin int i915_power_refcount; 308d068ebc2STakashi Iwai }; 309d068ebc2STakashi Iwai 310d068ebc2STakashi Iwai int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, 31114752412STakashi Iwai const struct hdac_bus_ops *ops, 31214752412STakashi Iwai const struct hdac_io_ops *io_ops); 313d068ebc2STakashi Iwai void snd_hdac_bus_exit(struct hdac_bus *bus); 314d068ebc2STakashi Iwai int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr, 315d068ebc2STakashi Iwai unsigned int cmd, unsigned int *res); 316d068ebc2STakashi Iwai int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr, 317d068ebc2STakashi Iwai unsigned int cmd, unsigned int *res); 318d068ebc2STakashi Iwai void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex); 319d068ebc2STakashi Iwai 320d068ebc2STakashi Iwai int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec); 321d068ebc2STakashi Iwai void snd_hdac_bus_remove_device(struct hdac_bus *bus, 322d068ebc2STakashi Iwai struct hdac_device *codec); 323d068ebc2STakashi Iwai 3247639a06cSTakashi Iwai static inline void snd_hdac_codec_link_up(struct hdac_device *codec) 3257639a06cSTakashi Iwai { 3267639a06cSTakashi Iwai set_bit(codec->addr, &codec->bus->codec_powered); 3277639a06cSTakashi Iwai } 3287639a06cSTakashi Iwai 3297639a06cSTakashi Iwai static inline void snd_hdac_codec_link_down(struct hdac_device *codec) 3307639a06cSTakashi Iwai { 3317639a06cSTakashi Iwai clear_bit(codec->addr, &codec->bus->codec_powered); 3327639a06cSTakashi Iwai } 3337639a06cSTakashi Iwai 33414752412STakashi Iwai int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val); 33514752412STakashi Iwai int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr, 33614752412STakashi Iwai unsigned int *res); 337a5e7e07cSMengdong Lin int snd_hdac_link_power(struct hdac_device *codec, bool enable); 33814752412STakashi Iwai 33914752412STakashi Iwai bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset); 34014752412STakashi Iwai void snd_hdac_bus_stop_chip(struct hdac_bus *bus); 34114752412STakashi Iwai void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus); 34214752412STakashi Iwai void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus); 34314752412STakashi Iwai void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus); 34414752412STakashi Iwai void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus); 34514752412STakashi Iwai 34614752412STakashi Iwai void snd_hdac_bus_update_rirb(struct hdac_bus *bus); 34714752412STakashi Iwai void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status, 34814752412STakashi Iwai void (*ack)(struct hdac_bus *, 34914752412STakashi Iwai struct hdac_stream *)); 35014752412STakashi Iwai 351304dad30SJeeja KP int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus); 352304dad30SJeeja KP void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus); 353304dad30SJeeja KP 35414752412STakashi Iwai /* 35514752412STakashi Iwai * macros for easy use 35614752412STakashi Iwai */ 35714752412STakashi Iwai #define _snd_hdac_chip_write(type, chip, reg, value) \ 35814752412STakashi Iwai ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg))) 35914752412STakashi Iwai #define _snd_hdac_chip_read(type, chip, reg) \ 36014752412STakashi Iwai ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg))) 36114752412STakashi Iwai 36214752412STakashi Iwai /* read/write a register, pass without AZX_REG_ prefix */ 36314752412STakashi Iwai #define snd_hdac_chip_writel(chip, reg, value) \ 36414752412STakashi Iwai _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value) 36514752412STakashi Iwai #define snd_hdac_chip_writew(chip, reg, value) \ 36614752412STakashi Iwai _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value) 36714752412STakashi Iwai #define snd_hdac_chip_writeb(chip, reg, value) \ 36814752412STakashi Iwai _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value) 36914752412STakashi Iwai #define snd_hdac_chip_readl(chip, reg) \ 37014752412STakashi Iwai _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg) 37114752412STakashi Iwai #define snd_hdac_chip_readw(chip, reg) \ 37214752412STakashi Iwai _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg) 37314752412STakashi Iwai #define snd_hdac_chip_readb(chip, reg) \ 37414752412STakashi Iwai _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg) 37514752412STakashi Iwai 37614752412STakashi Iwai /* update a register, pass without AZX_REG_ prefix */ 37714752412STakashi Iwai #define snd_hdac_chip_updatel(chip, reg, mask, val) \ 37814752412STakashi Iwai snd_hdac_chip_writel(chip, reg, \ 37914752412STakashi Iwai (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val)) 38014752412STakashi Iwai #define snd_hdac_chip_updatew(chip, reg, mask, val) \ 38114752412STakashi Iwai snd_hdac_chip_writew(chip, reg, \ 38214752412STakashi Iwai (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val)) 38314752412STakashi Iwai #define snd_hdac_chip_updateb(chip, reg, mask, val) \ 38414752412STakashi Iwai snd_hdac_chip_writeb(chip, reg, \ 38514752412STakashi Iwai (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val)) 38614752412STakashi Iwai 38714752412STakashi Iwai /* 38814752412STakashi Iwai * HD-audio stream 38914752412STakashi Iwai */ 39014752412STakashi Iwai struct hdac_stream { 39114752412STakashi Iwai struct hdac_bus *bus; 39214752412STakashi Iwai struct snd_dma_buffer bdl; /* BDL buffer */ 39314752412STakashi Iwai __le32 *posbuf; /* position buffer pointer */ 39414752412STakashi Iwai int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */ 39514752412STakashi Iwai 39614752412STakashi Iwai unsigned int bufsize; /* size of the play buffer in bytes */ 39714752412STakashi Iwai unsigned int period_bytes; /* size of the period in bytes */ 39814752412STakashi Iwai unsigned int frags; /* number for period in the play buffer */ 39914752412STakashi Iwai unsigned int fifo_size; /* FIFO size */ 40014752412STakashi Iwai 40114752412STakashi Iwai void __iomem *sd_addr; /* stream descriptor pointer */ 40214752412STakashi Iwai 40314752412STakashi Iwai u32 sd_int_sta_mask; /* stream int status mask */ 40414752412STakashi Iwai 40514752412STakashi Iwai /* pcm support */ 40614752412STakashi Iwai struct snd_pcm_substream *substream; /* assigned substream, 40714752412STakashi Iwai * set in PCM open 40814752412STakashi Iwai */ 40914752412STakashi Iwai unsigned int format_val; /* format value to be set in the 41014752412STakashi Iwai * controller and the codec 41114752412STakashi Iwai */ 41214752412STakashi Iwai unsigned char stream_tag; /* assigned stream */ 41314752412STakashi Iwai unsigned char index; /* stream index */ 41414752412STakashi Iwai int assigned_key; /* last device# key assigned to */ 41514752412STakashi Iwai 41614752412STakashi Iwai bool opened:1; 41714752412STakashi Iwai bool running:1; 4186d23c8f5STakashi Iwai bool prepared:1; 41914752412STakashi Iwai bool no_period_wakeup:1; 4208f3f600bSTakashi Iwai bool locked:1; 42114752412STakashi Iwai 42214752412STakashi Iwai /* timestamp */ 42314752412STakashi Iwai unsigned long start_wallclk; /* start + minimum wallclk */ 42414752412STakashi Iwai unsigned long period_wallclk; /* wallclk for period */ 42514752412STakashi Iwai struct timecounter tc; 42614752412STakashi Iwai struct cyclecounter cc; 42714752412STakashi Iwai int delay_negative_threshold; 42814752412STakashi Iwai 42914752412STakashi Iwai struct list_head list; 4308f3f600bSTakashi Iwai #ifdef CONFIG_SND_HDA_DSP_LOADER 4318f3f600bSTakashi Iwai /* DSP access mutex */ 4328f3f600bSTakashi Iwai struct mutex dsp_mutex; 4338f3f600bSTakashi Iwai #endif 43414752412STakashi Iwai }; 43514752412STakashi Iwai 43614752412STakashi Iwai void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, 43714752412STakashi Iwai int idx, int direction, int tag); 43814752412STakashi Iwai struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus, 43914752412STakashi Iwai struct snd_pcm_substream *substream); 44014752412STakashi Iwai void snd_hdac_stream_release(struct hdac_stream *azx_dev); 4414308c9b0SJeeja KP struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus, 4424308c9b0SJeeja KP int dir, int stream_tag); 44314752412STakashi Iwai 44414752412STakashi Iwai int snd_hdac_stream_setup(struct hdac_stream *azx_dev); 44514752412STakashi Iwai void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev); 44614752412STakashi Iwai int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev); 44786f6501bSJeeja KP int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, 44886f6501bSJeeja KP unsigned int format_val); 44914752412STakashi Iwai void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start); 45014752412STakashi Iwai void snd_hdac_stream_clear(struct hdac_stream *azx_dev); 45114752412STakashi Iwai void snd_hdac_stream_stop(struct hdac_stream *azx_dev); 45214752412STakashi Iwai void snd_hdac_stream_reset(struct hdac_stream *azx_dev); 45314752412STakashi Iwai void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, 45414752412STakashi Iwai unsigned int streams, unsigned int reg); 45514752412STakashi Iwai void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, 45614752412STakashi Iwai unsigned int streams); 45714752412STakashi Iwai void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, 45814752412STakashi Iwai unsigned int streams); 45914752412STakashi Iwai /* 46014752412STakashi Iwai * macros for easy use 46114752412STakashi Iwai */ 46214752412STakashi Iwai #define _snd_hdac_stream_write(type, dev, reg, value) \ 46314752412STakashi Iwai ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg))) 46414752412STakashi Iwai #define _snd_hdac_stream_read(type, dev, reg) \ 46514752412STakashi Iwai ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg))) 46614752412STakashi Iwai 46714752412STakashi Iwai /* read/write a register, pass without AZX_REG_ prefix */ 46814752412STakashi Iwai #define snd_hdac_stream_writel(dev, reg, value) \ 46914752412STakashi Iwai _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value) 47014752412STakashi Iwai #define snd_hdac_stream_writew(dev, reg, value) \ 47114752412STakashi Iwai _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value) 47214752412STakashi Iwai #define snd_hdac_stream_writeb(dev, reg, value) \ 47314752412STakashi Iwai _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value) 47414752412STakashi Iwai #define snd_hdac_stream_readl(dev, reg) \ 47514752412STakashi Iwai _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg) 47614752412STakashi Iwai #define snd_hdac_stream_readw(dev, reg) \ 47714752412STakashi Iwai _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg) 47814752412STakashi Iwai #define snd_hdac_stream_readb(dev, reg) \ 47914752412STakashi Iwai _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg) 48014752412STakashi Iwai 48114752412STakashi Iwai /* update a register, pass without AZX_REG_ prefix */ 48214752412STakashi Iwai #define snd_hdac_stream_updatel(dev, reg, mask, val) \ 48314752412STakashi Iwai snd_hdac_stream_writel(dev, reg, \ 48414752412STakashi Iwai (snd_hdac_stream_readl(dev, reg) & \ 48514752412STakashi Iwai ~(mask)) | (val)) 48614752412STakashi Iwai #define snd_hdac_stream_updatew(dev, reg, mask, val) \ 48714752412STakashi Iwai snd_hdac_stream_writew(dev, reg, \ 48814752412STakashi Iwai (snd_hdac_stream_readw(dev, reg) & \ 48914752412STakashi Iwai ~(mask)) | (val)) 49014752412STakashi Iwai #define snd_hdac_stream_updateb(dev, reg, mask, val) \ 49114752412STakashi Iwai snd_hdac_stream_writeb(dev, reg, \ 49214752412STakashi Iwai (snd_hdac_stream_readb(dev, reg) & \ 49314752412STakashi Iwai ~(mask)) | (val)) 49414752412STakashi Iwai 4958f3f600bSTakashi Iwai #ifdef CONFIG_SND_HDA_DSP_LOADER 4968f3f600bSTakashi Iwai /* DSP lock helpers */ 4978f3f600bSTakashi Iwai #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) 4988f3f600bSTakashi Iwai #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) 4998f3f600bSTakashi Iwai #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) 5008f3f600bSTakashi Iwai #define snd_hdac_stream_is_locked(dev) ((dev)->locked) 5018f3f600bSTakashi Iwai /* DSP loader helpers */ 5028f3f600bSTakashi Iwai int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 5038f3f600bSTakashi Iwai unsigned int byte_size, struct snd_dma_buffer *bufp); 5048f3f600bSTakashi Iwai void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start); 5058f3f600bSTakashi Iwai void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 5068f3f600bSTakashi Iwai struct snd_dma_buffer *dmab); 5078f3f600bSTakashi Iwai #else /* CONFIG_SND_HDA_DSP_LOADER */ 5088f3f600bSTakashi Iwai #define snd_hdac_dsp_lock_init(dev) do {} while (0) 5098f3f600bSTakashi Iwai #define snd_hdac_dsp_lock(dev) do {} while (0) 5108f3f600bSTakashi Iwai #define snd_hdac_dsp_unlock(dev) do {} while (0) 5118f3f600bSTakashi Iwai #define snd_hdac_stream_is_locked(dev) 0 5128f3f600bSTakashi Iwai 5138f3f600bSTakashi Iwai static inline int 5148f3f600bSTakashi Iwai snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, 5158f3f600bSTakashi Iwai unsigned int byte_size, struct snd_dma_buffer *bufp) 5168f3f600bSTakashi Iwai { 5178f3f600bSTakashi Iwai return 0; 5188f3f600bSTakashi Iwai } 5198f3f600bSTakashi Iwai 5208f3f600bSTakashi Iwai static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) 5218f3f600bSTakashi Iwai { 5228f3f600bSTakashi Iwai } 5238f3f600bSTakashi Iwai 5248f3f600bSTakashi Iwai static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, 5258f3f600bSTakashi Iwai struct snd_dma_buffer *dmab) 5268f3f600bSTakashi Iwai { 5278f3f600bSTakashi Iwai } 5288f3f600bSTakashi Iwai #endif /* CONFIG_SND_HDA_DSP_LOADER */ 5298f3f600bSTakashi Iwai 5308f3f600bSTakashi Iwai 53171fc4c7eSTakashi Iwai /* 53271fc4c7eSTakashi Iwai * generic array helpers 53371fc4c7eSTakashi Iwai */ 53471fc4c7eSTakashi Iwai void *snd_array_new(struct snd_array *array); 53571fc4c7eSTakashi Iwai void snd_array_free(struct snd_array *array); 53671fc4c7eSTakashi Iwai static inline void snd_array_init(struct snd_array *array, unsigned int size, 53771fc4c7eSTakashi Iwai unsigned int align) 53871fc4c7eSTakashi Iwai { 53971fc4c7eSTakashi Iwai array->elem_size = size; 54071fc4c7eSTakashi Iwai array->alloc_align = align; 54171fc4c7eSTakashi Iwai } 54271fc4c7eSTakashi Iwai 54371fc4c7eSTakashi Iwai static inline void *snd_array_elem(struct snd_array *array, unsigned int idx) 54471fc4c7eSTakashi Iwai { 54571fc4c7eSTakashi Iwai return array->list + idx * array->elem_size; 54671fc4c7eSTakashi Iwai } 54771fc4c7eSTakashi Iwai 54871fc4c7eSTakashi Iwai static inline unsigned int snd_array_index(struct snd_array *array, void *ptr) 54971fc4c7eSTakashi Iwai { 55071fc4c7eSTakashi Iwai return (unsigned long)(ptr - array->list) / array->elem_size; 55171fc4c7eSTakashi Iwai } 55271fc4c7eSTakashi Iwai 553e3d280fcSTakashi Iwai #endif /* __SOUND_HDAUDIO_H */ 554