1 /* 2 * HD-audio codec verbs 3 */ 4 5 #ifndef __SOUND_HDA_VERBS_H 6 #define __SOUND_HDA_VERBS_H 7 8 /* 9 * nodes 10 */ 11 #define AC_NODE_ROOT 0x00 12 13 /* 14 * function group types 15 */ 16 enum { 17 AC_GRP_AUDIO_FUNCTION = 0x01, 18 AC_GRP_MODEM_FUNCTION = 0x02, 19 }; 20 21 /* 22 * widget types 23 */ 24 enum { 25 AC_WID_AUD_OUT, /* Audio Out */ 26 AC_WID_AUD_IN, /* Audio In */ 27 AC_WID_AUD_MIX, /* Audio Mixer */ 28 AC_WID_AUD_SEL, /* Audio Selector */ 29 AC_WID_PIN, /* Pin Complex */ 30 AC_WID_POWER, /* Power */ 31 AC_WID_VOL_KNB, /* Volume Knob */ 32 AC_WID_BEEP, /* Beep Generator */ 33 AC_WID_VENDOR = 0x0f /* Vendor specific */ 34 }; 35 36 /* 37 * GET verbs 38 */ 39 #define AC_VERB_GET_STREAM_FORMAT 0x0a00 40 #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00 41 #define AC_VERB_GET_PROC_COEF 0x0c00 42 #define AC_VERB_GET_COEF_INDEX 0x0d00 43 #define AC_VERB_PARAMETERS 0x0f00 44 #define AC_VERB_GET_CONNECT_SEL 0x0f01 45 #define AC_VERB_GET_CONNECT_LIST 0x0f02 46 #define AC_VERB_GET_PROC_STATE 0x0f03 47 #define AC_VERB_GET_SDI_SELECT 0x0f04 48 #define AC_VERB_GET_POWER_STATE 0x0f05 49 #define AC_VERB_GET_CONV 0x0f06 50 #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07 51 #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08 52 #define AC_VERB_GET_PIN_SENSE 0x0f09 53 #define AC_VERB_GET_BEEP_CONTROL 0x0f0a 54 #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c 55 #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d 56 #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */ 57 #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f 58 /* f10-f1a: GPIO */ 59 #define AC_VERB_GET_GPIO_DATA 0x0f15 60 #define AC_VERB_GET_GPIO_MASK 0x0f16 61 #define AC_VERB_GET_GPIO_DIRECTION 0x0f17 62 #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18 63 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 64 #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a 65 #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c 66 /* f20: AFG/MFG */ 67 #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 68 #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d 69 #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e 70 #define AC_VERB_GET_HDMI_ELDD 0x0f2f 71 #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30 72 #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31 73 #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32 74 #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33 75 #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34 76 #define AC_VERB_GET_DEVICE_SEL 0xf35 77 #define AC_VERB_GET_DEVICE_LIST 0xf36 78 79 /* 80 * SET verbs 81 */ 82 #define AC_VERB_SET_STREAM_FORMAT 0x200 83 #define AC_VERB_SET_AMP_GAIN_MUTE 0x300 84 #define AC_VERB_SET_PROC_COEF 0x400 85 #define AC_VERB_SET_COEF_INDEX 0x500 86 #define AC_VERB_SET_CONNECT_SEL 0x701 87 #define AC_VERB_SET_PROC_STATE 0x703 88 #define AC_VERB_SET_SDI_SELECT 0x704 89 #define AC_VERB_SET_POWER_STATE 0x705 90 #define AC_VERB_SET_CHANNEL_STREAMID 0x706 91 #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707 92 #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708 93 #define AC_VERB_SET_PIN_SENSE 0x709 94 #define AC_VERB_SET_BEEP_CONTROL 0x70a 95 #define AC_VERB_SET_EAPD_BTLENABLE 0x70c 96 #define AC_VERB_SET_DIGI_CONVERT_1 0x70d 97 #define AC_VERB_SET_DIGI_CONVERT_2 0x70e 98 #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f 99 #define AC_VERB_SET_GPIO_DATA 0x715 100 #define AC_VERB_SET_GPIO_MASK 0x716 101 #define AC_VERB_SET_GPIO_DIRECTION 0x717 102 #define AC_VERB_SET_GPIO_WAKE_MASK 0x718 103 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 104 #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a 105 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c 106 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d 107 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e 108 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f 109 #define AC_VERB_SET_EAPD 0x788 110 #define AC_VERB_SET_CODEC_RESET 0x7ff 111 #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d 112 #define AC_VERB_SET_HDMI_DIP_INDEX 0x730 113 #define AC_VERB_SET_HDMI_DIP_DATA 0x731 114 #define AC_VERB_SET_HDMI_DIP_XMIT 0x732 115 #define AC_VERB_SET_HDMI_CP_CTRL 0x733 116 #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734 117 #define AC_VERB_SET_DEVICE_SEL 0x735 118 119 /* 120 * Parameter IDs 121 */ 122 #define AC_PAR_VENDOR_ID 0x00 123 #define AC_PAR_SUBSYSTEM_ID 0x01 124 #define AC_PAR_REV_ID 0x02 125 #define AC_PAR_NODE_COUNT 0x04 126 #define AC_PAR_FUNCTION_TYPE 0x05 127 #define AC_PAR_AUDIO_FG_CAP 0x08 128 #define AC_PAR_AUDIO_WIDGET_CAP 0x09 129 #define AC_PAR_PCM 0x0a 130 #define AC_PAR_STREAM 0x0b 131 #define AC_PAR_PIN_CAP 0x0c 132 #define AC_PAR_AMP_IN_CAP 0x0d 133 #define AC_PAR_CONNLIST_LEN 0x0e 134 #define AC_PAR_POWER_STATE 0x0f 135 #define AC_PAR_PROC_CAP 0x10 136 #define AC_PAR_GPIO_CAP 0x11 137 #define AC_PAR_AMP_OUT_CAP 0x12 138 #define AC_PAR_VOL_KNB_CAP 0x13 139 #define AC_PAR_DEVLIST_LEN 0x15 140 #define AC_PAR_HDMI_LPCM_CAP 0x20 141 142 /* 143 * AC_VERB_PARAMETERS results (32bit) 144 */ 145 146 /* Function Group Type */ 147 #define AC_FGT_TYPE (0xff<<0) 148 #define AC_FGT_TYPE_SHIFT 0 149 #define AC_FGT_UNSOL_CAP (1<<8) 150 151 /* Audio Function Group Capabilities */ 152 #define AC_AFG_OUT_DELAY (0xf<<0) 153 #define AC_AFG_IN_DELAY (0xf<<8) 154 #define AC_AFG_BEEP_GEN (1<<16) 155 156 /* Audio Widget Capabilities */ 157 #define AC_WCAP_STEREO (1<<0) /* stereo I/O */ 158 #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */ 159 #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */ 160 #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */ 161 #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */ 162 #define AC_WCAP_STRIPE (1<<5) /* stripe */ 163 #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */ 164 #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */ 165 #define AC_WCAP_CONN_LIST (1<<8) /* connection list */ 166 #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ 167 #define AC_WCAP_POWER (1<<10) /* power control */ 168 #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ 169 #define AC_WCAP_CP_CAPS (1<<12) /* content protection */ 170 #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */ 171 #define AC_WCAP_DELAY (0xf<<16) 172 #define AC_WCAP_DELAY_SHIFT 16 173 #define AC_WCAP_TYPE (0xf<<20) 174 #define AC_WCAP_TYPE_SHIFT 20 175 176 /* supported PCM rates and bits */ 177 #define AC_SUPPCM_RATES (0xfff << 0) 178 #define AC_SUPPCM_BITS_8 (1<<16) 179 #define AC_SUPPCM_BITS_16 (1<<17) 180 #define AC_SUPPCM_BITS_20 (1<<18) 181 #define AC_SUPPCM_BITS_24 (1<<19) 182 #define AC_SUPPCM_BITS_32 (1<<20) 183 184 /* supported PCM stream format */ 185 #define AC_SUPFMT_PCM (1<<0) 186 #define AC_SUPFMT_FLOAT32 (1<<1) 187 #define AC_SUPFMT_AC3 (1<<2) 188 189 /* GP I/O count */ 190 #define AC_GPIO_IO_COUNT (0xff<<0) 191 #define AC_GPIO_O_COUNT (0xff<<8) 192 #define AC_GPIO_O_COUNT_SHIFT 8 193 #define AC_GPIO_I_COUNT (0xff<<16) 194 #define AC_GPIO_I_COUNT_SHIFT 16 195 #define AC_GPIO_UNSOLICITED (1<<30) 196 #define AC_GPIO_WAKE (1<<31) 197 198 /* Converter stream, channel */ 199 #define AC_CONV_CHANNEL (0xf<<0) 200 #define AC_CONV_STREAM (0xf<<4) 201 #define AC_CONV_STREAM_SHIFT 4 202 203 /* Input converter SDI select */ 204 #define AC_SDI_SELECT (0xf<<0) 205 206 /* stream format id */ 207 #define AC_FMT_CHAN_SHIFT 0 208 #define AC_FMT_CHAN_MASK (0x0f << 0) 209 #define AC_FMT_BITS_SHIFT 4 210 #define AC_FMT_BITS_MASK (7 << 4) 211 #define AC_FMT_BITS_8 (0 << 4) 212 #define AC_FMT_BITS_16 (1 << 4) 213 #define AC_FMT_BITS_20 (2 << 4) 214 #define AC_FMT_BITS_24 (3 << 4) 215 #define AC_FMT_BITS_32 (4 << 4) 216 #define AC_FMT_DIV_SHIFT 8 217 #define AC_FMT_DIV_MASK (7 << 8) 218 #define AC_FMT_MULT_SHIFT 11 219 #define AC_FMT_MULT_MASK (7 << 11) 220 #define AC_FMT_BASE_SHIFT 14 221 #define AC_FMT_BASE_48K (0 << 14) 222 #define AC_FMT_BASE_44K (1 << 14) 223 #define AC_FMT_TYPE_SHIFT 15 224 #define AC_FMT_TYPE_PCM (0 << 15) 225 #define AC_FMT_TYPE_NON_PCM (1 << 15) 226 227 /* Unsolicited response control */ 228 #define AC_UNSOL_TAG (0x3f<<0) 229 #define AC_UNSOL_ENABLED (1<<7) 230 #define AC_USRSP_EN AC_UNSOL_ENABLED 231 232 /* Unsolicited responses */ 233 #define AC_UNSOL_RES_TAG (0x3f<<26) 234 #define AC_UNSOL_RES_TAG_SHIFT 26 235 #define AC_UNSOL_RES_SUBTAG (0x1f<<21) 236 #define AC_UNSOL_RES_SUBTAG_SHIFT 21 237 #define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry 238 * (for DP1.2 MST) 239 */ 240 #define AC_UNSOL_RES_DE_SHIFT 15 241 #define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */ 242 #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */ 243 #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */ 244 #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */ 245 #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ 246 247 /* Pin widget capabilies */ 248 #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ 249 #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ 250 #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */ 251 #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */ 252 #define AC_PINCAP_OUT (1<<4) /* output capable */ 253 #define AC_PINCAP_IN (1<<5) /* input capable */ 254 #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */ 255 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification, 256 * but is marked reserved in the Intel HDA specification. 257 */ 258 #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ 259 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability 260 * in HD-audio specification 261 */ 262 #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */ 263 #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can 264 * coexist with AC_PINCAP_HDMI 265 */ 266 #define AC_PINCAP_VREF (0x37<<8) 267 #define AC_PINCAP_VREF_SHIFT 8 268 #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ 269 #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */ 270 /* Vref status (used in pin cap) */ 271 #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */ 272 #define AC_PINCAP_VREF_50 (1<<1) /* 50% */ 273 #define AC_PINCAP_VREF_GRD (1<<2) /* ground */ 274 #define AC_PINCAP_VREF_80 (1<<4) /* 80% */ 275 #define AC_PINCAP_VREF_100 (1<<5) /* 100% */ 276 277 /* Amplifier capabilities */ 278 #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */ 279 #define AC_AMPCAP_OFFSET_SHIFT 0 280 #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */ 281 #define AC_AMPCAP_NUM_STEPS_SHIFT 8 282 #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB 283 * in 0.25dB 284 */ 285 #define AC_AMPCAP_STEP_SIZE_SHIFT 16 286 #define AC_AMPCAP_MUTE (1<<31) /* mute capable */ 287 #define AC_AMPCAP_MUTE_SHIFT 31 288 289 /* driver-specific amp-caps: using bits 24-30 */ 290 #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */ 291 292 /* Connection list */ 293 #define AC_CLIST_LENGTH (0x7f<<0) 294 #define AC_CLIST_LONG (1<<7) 295 296 /* Supported power status */ 297 #define AC_PWRST_D0SUP (1<<0) 298 #define AC_PWRST_D1SUP (1<<1) 299 #define AC_PWRST_D2SUP (1<<2) 300 #define AC_PWRST_D3SUP (1<<3) 301 #define AC_PWRST_D3COLDSUP (1<<4) 302 #define AC_PWRST_S3D3COLDSUP (1<<29) 303 #define AC_PWRST_CLKSTOP (1<<30) 304 #define AC_PWRST_EPSS (1U<<31) 305 306 /* Power state values */ 307 #define AC_PWRST_SETTING (0xf<<0) 308 #define AC_PWRST_ACTUAL (0xf<<4) 309 #define AC_PWRST_ACTUAL_SHIFT 4 310 #define AC_PWRST_D0 0x00 311 #define AC_PWRST_D1 0x01 312 #define AC_PWRST_D2 0x02 313 #define AC_PWRST_D3 0x03 314 #define AC_PWRST_ERROR (1<<8) 315 #define AC_PWRST_CLK_STOP_OK (1<<9) 316 #define AC_PWRST_SETTING_RESET (1<<10) 317 318 /* Processing capabilies */ 319 #define AC_PCAP_BENIGN (1<<0) 320 #define AC_PCAP_NUM_COEF (0xff<<8) 321 #define AC_PCAP_NUM_COEF_SHIFT 8 322 323 /* Volume knobs capabilities */ 324 #define AC_KNBCAP_NUM_STEPS (0x7f<<0) 325 #define AC_KNBCAP_DELTA (1<<7) 326 327 /* HDMI LPCM capabilities */ 328 #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */ 329 #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */ 330 #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */ 331 #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */ 332 #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */ 333 #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */ 334 #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */ 335 #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */ 336 #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */ 337 #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */ 338 #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */ 339 #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */ 340 #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */ 341 #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */ 342 343 /* Display pin's device list length */ 344 #define AC_DEV_LIST_LEN_MASK 0x3f 345 #define AC_MAX_DEV_LIST_LEN 64 346 347 /* 348 * Control Parameters 349 */ 350 351 /* Amp gain/mute */ 352 #define AC_AMP_MUTE (1<<7) 353 #define AC_AMP_GAIN (0x7f) 354 #define AC_AMP_GET_INDEX (0xf<<0) 355 356 #define AC_AMP_GET_LEFT (1<<13) 357 #define AC_AMP_GET_RIGHT (0<<13) 358 #define AC_AMP_GET_OUTPUT (1<<15) 359 #define AC_AMP_GET_INPUT (0<<15) 360 361 #define AC_AMP_SET_INDEX (0xf<<8) 362 #define AC_AMP_SET_INDEX_SHIFT 8 363 #define AC_AMP_SET_RIGHT (1<<12) 364 #define AC_AMP_SET_LEFT (1<<13) 365 #define AC_AMP_SET_INPUT (1<<14) 366 #define AC_AMP_SET_OUTPUT (1<<15) 367 368 /* DIGITAL1 bits */ 369 #define AC_DIG1_ENABLE (1<<0) 370 #define AC_DIG1_V (1<<1) 371 #define AC_DIG1_VCFG (1<<2) 372 #define AC_DIG1_EMPHASIS (1<<3) 373 #define AC_DIG1_COPYRIGHT (1<<4) 374 #define AC_DIG1_NONAUDIO (1<<5) 375 #define AC_DIG1_PROFESSIONAL (1<<6) 376 #define AC_DIG1_LEVEL (1<<7) 377 378 /* DIGITAL2 bits */ 379 #define AC_DIG2_CC (0x7f<<0) 380 381 /* DIGITAL3 bits */ 382 #define AC_DIG3_ICT (0xf<<0) 383 #define AC_DIG3_KAE (1<<7) 384 385 /* Pin widget control - 8bit */ 386 #define AC_PINCTL_EPT (0x3<<0) 387 #define AC_PINCTL_EPT_NATIVE 0 388 #define AC_PINCTL_EPT_HBR 3 389 #define AC_PINCTL_VREFEN (0x7<<0) 390 #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ 391 #define AC_PINCTL_VREF_50 1 /* 50% */ 392 #define AC_PINCTL_VREF_GRD 2 /* ground */ 393 #define AC_PINCTL_VREF_80 4 /* 80% */ 394 #define AC_PINCTL_VREF_100 5 /* 100% */ 395 #define AC_PINCTL_IN_EN (1<<5) 396 #define AC_PINCTL_OUT_EN (1<<6) 397 #define AC_PINCTL_HP_EN (1<<7) 398 399 /* Pin sense - 32bit */ 400 #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) 401 #define AC_PINSENSE_PRESENCE (1<<31) 402 #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */ 403 404 /* EAPD/BTL enable - 32bit */ 405 #define AC_EAPDBTL_BALANCED (1<<0) 406 #define AC_EAPDBTL_EAPD (1<<1) 407 #define AC_EAPDBTL_LR_SWAP (1<<2) 408 409 /* HDMI ELD data */ 410 #define AC_ELDD_ELD_VALID (1<<31) 411 #define AC_ELDD_ELD_DATA 0xff 412 413 /* HDMI DIP size */ 414 #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */ 415 #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */ 416 417 /* HDMI DIP index */ 418 #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */ 419 #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */ 420 421 /* HDMI DIP xmit (transmit) control */ 422 #define AC_DIPXMIT_MASK (0x3<<6) 423 #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */ 424 #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */ 425 #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */ 426 427 /* HDMI content protection (CP) control */ 428 #define AC_CPCTRL_CES (1<<9) /* current encryption state */ 429 #define AC_CPCTRL_READY (1<<8) /* ready bit */ 430 #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */ 431 #define AC_CPCTRL_STATE (3<<0) /* current CP request state */ 432 433 /* Converter channel <-> HDMI slot mapping */ 434 #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */ 435 #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */ 436 437 /* configuration default - 32bit */ 438 #define AC_DEFCFG_SEQUENCE (0xf<<0) 439 #define AC_DEFCFG_DEF_ASSOC (0xf<<4) 440 #define AC_DEFCFG_ASSOC_SHIFT 4 441 #define AC_DEFCFG_MISC (0xf<<8) 442 #define AC_DEFCFG_MISC_SHIFT 8 443 #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0) 444 #define AC_DEFCFG_COLOR (0xf<<12) 445 #define AC_DEFCFG_COLOR_SHIFT 12 446 #define AC_DEFCFG_CONN_TYPE (0xf<<16) 447 #define AC_DEFCFG_CONN_TYPE_SHIFT 16 448 #define AC_DEFCFG_DEVICE (0xf<<20) 449 #define AC_DEFCFG_DEVICE_SHIFT 20 450 #define AC_DEFCFG_LOCATION (0x3f<<24) 451 #define AC_DEFCFG_LOCATION_SHIFT 24 452 #define AC_DEFCFG_PORT_CONN (0x3<<30) 453 #define AC_DEFCFG_PORT_CONN_SHIFT 30 454 455 /* Display pin's device list entry */ 456 #define AC_DE_PD (1<<0) 457 #define AC_DE_ELDV (1<<1) 458 #define AC_DE_IA (1<<2) 459 460 /* device device types (0x0-0xf) */ 461 enum { 462 AC_JACK_LINE_OUT, 463 AC_JACK_SPEAKER, 464 AC_JACK_HP_OUT, 465 AC_JACK_CD, 466 AC_JACK_SPDIF_OUT, 467 AC_JACK_DIG_OTHER_OUT, 468 AC_JACK_MODEM_LINE_SIDE, 469 AC_JACK_MODEM_HAND_SIDE, 470 AC_JACK_LINE_IN, 471 AC_JACK_AUX, 472 AC_JACK_MIC_IN, 473 AC_JACK_TELEPHONY, 474 AC_JACK_SPDIF_IN, 475 AC_JACK_DIG_OTHER_IN, 476 AC_JACK_OTHER = 0xf, 477 }; 478 479 /* jack connection types (0x0-0xf) */ 480 enum { 481 AC_JACK_CONN_UNKNOWN, 482 AC_JACK_CONN_1_8, 483 AC_JACK_CONN_1_4, 484 AC_JACK_CONN_ATAPI, 485 AC_JACK_CONN_RCA, 486 AC_JACK_CONN_OPTICAL, 487 AC_JACK_CONN_OTHER_DIGITAL, 488 AC_JACK_CONN_OTHER_ANALOG, 489 AC_JACK_CONN_DIN, 490 AC_JACK_CONN_XLR, 491 AC_JACK_CONN_RJ11, 492 AC_JACK_CONN_COMB, 493 AC_JACK_CONN_OTHER = 0xf, 494 }; 495 496 /* jack colors (0x0-0xf) */ 497 enum { 498 AC_JACK_COLOR_UNKNOWN, 499 AC_JACK_COLOR_BLACK, 500 AC_JACK_COLOR_GREY, 501 AC_JACK_COLOR_BLUE, 502 AC_JACK_COLOR_GREEN, 503 AC_JACK_COLOR_RED, 504 AC_JACK_COLOR_ORANGE, 505 AC_JACK_COLOR_YELLOW, 506 AC_JACK_COLOR_PURPLE, 507 AC_JACK_COLOR_PINK, 508 AC_JACK_COLOR_WHITE = 0xe, 509 AC_JACK_COLOR_OTHER, 510 }; 511 512 /* Jack location (0x0-0x3f) */ 513 /* common case */ 514 enum { 515 AC_JACK_LOC_NONE, 516 AC_JACK_LOC_REAR, 517 AC_JACK_LOC_FRONT, 518 AC_JACK_LOC_LEFT, 519 AC_JACK_LOC_RIGHT, 520 AC_JACK_LOC_TOP, 521 AC_JACK_LOC_BOTTOM, 522 }; 523 /* bits 4-5 */ 524 enum { 525 AC_JACK_LOC_EXTERNAL = 0x00, 526 AC_JACK_LOC_INTERNAL = 0x10, 527 AC_JACK_LOC_SEPARATE = 0x20, 528 AC_JACK_LOC_OTHER = 0x30, 529 }; 530 enum { 531 /* external on primary chasis */ 532 AC_JACK_LOC_REAR_PANEL = 0x07, 533 AC_JACK_LOC_DRIVE_BAY, 534 /* internal */ 535 AC_JACK_LOC_RISER = 0x17, 536 AC_JACK_LOC_HDMI, 537 AC_JACK_LOC_ATAPI, 538 /* others */ 539 AC_JACK_LOC_MOBILE_IN = 0x37, 540 AC_JACK_LOC_MOBILE_OUT, 541 }; 542 543 /* Port connectivity (0-3) */ 544 enum { 545 AC_JACK_PORT_COMPLEX, 546 AC_JACK_PORT_NONE, 547 AC_JACK_PORT_FIXED, 548 AC_JACK_PORT_BOTH, 549 }; 550 551 /* max. codec address */ 552 #define HDA_MAX_CODEC_ADDRESS 0x0f 553 554 #endif /* __SOUND_HDA_VERBS_H */ 555