1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2014 NVIDIA Corporation 4 */ 5 6 #ifndef __SOC_TEGRA_PM_H__ 7 #define __SOC_TEGRA_PM_H__ 8 9 enum tegra_suspend_mode { 10 TEGRA_SUSPEND_NONE = 0, 11 TEGRA_SUSPEND_LP2, /* CPU voltage off */ 12 TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */ 13 TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */ 14 TEGRA_MAX_SUSPEND_MODE, 15 }; 16 17 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) 18 enum tegra_suspend_mode 19 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); 20 21 /* low-level resume entry point */ 22 void tegra_resume(void); 23 #else 24 static inline enum tegra_suspend_mode 25 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) 26 { 27 return TEGRA_SUSPEND_NONE; 28 } 29 30 static inline void tegra_resume(void) 31 { 32 } 33 #endif /* CONFIG_PM_SLEEP */ 34 35 #endif /* __SOC_TEGRA_PM_H__ */ 36