1 /* 2 * Internal header file for UCC FAST unit routines. 3 * 4 * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved. 5 * 6 * Authors: Shlomi Gridish <gridish@freescale.com> 7 * Li Yang <leoli@freescale.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 #ifndef __UCC_FAST_H__ 15 #define __UCC_FAST_H__ 16 17 #include <linux/kernel.h> 18 19 #include <soc/fsl/qe/immap_qe.h> 20 #include <soc/fsl/qe/qe.h> 21 22 #include <soc/fsl/qe/ucc.h> 23 24 /* Receive BD's status and length*/ 25 #define R_E 0x80000000 /* buffer empty */ 26 #define R_W 0x20000000 /* wrap bit */ 27 #define R_I 0x10000000 /* interrupt on reception */ 28 #define R_L 0x08000000 /* last */ 29 #define R_F 0x04000000 /* first */ 30 31 /* transmit BD's status and length*/ 32 #define T_R 0x80000000 /* ready bit */ 33 #define T_W 0x20000000 /* wrap bit */ 34 #define T_I 0x10000000 /* interrupt on completion */ 35 #define T_L 0x08000000 /* last */ 36 37 /* Receive BD's status */ 38 #define R_E_S 0x8000 /* buffer empty */ 39 #define R_W_S 0x2000 /* wrap bit */ 40 #define R_I_S 0x1000 /* interrupt on reception */ 41 #define R_L_S 0x0800 /* last */ 42 #define R_F_S 0x0400 /* first */ 43 #define R_CM_S 0x0200 /* continuous mode */ 44 #define R_CR_S 0x0004 /* crc */ 45 #define R_OV_S 0x0002 /* crc */ 46 47 /* transmit BD's status */ 48 #define T_R_S 0x8000 /* ready bit */ 49 #define T_W_S 0x2000 /* wrap bit */ 50 #define T_I_S 0x1000 /* interrupt on completion */ 51 #define T_L_S 0x0800 /* last */ 52 #define T_TC_S 0x0400 /* crc */ 53 #define T_TM_S 0x0200 /* continuous mode */ 54 55 /* Rx Data buffer must be 4 bytes aligned in most cases */ 56 #define UCC_FAST_RX_ALIGN 4 57 #define UCC_FAST_MRBLR_ALIGNMENT 4 58 #define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT 8 59 60 /* Sizes */ 61 #define UCC_FAST_URFS_MIN_VAL 0x88 62 #define UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR 8 63 64 /* ucc_fast_channel_protocol_mode - UCC FAST mode */ 65 enum ucc_fast_channel_protocol_mode { 66 UCC_FAST_PROTOCOL_MODE_HDLC = 0x00000000, 67 UCC_FAST_PROTOCOL_MODE_RESERVED01 = 0x00000001, 68 UCC_FAST_PROTOCOL_MODE_RESERVED_QMC = 0x00000002, 69 UCC_FAST_PROTOCOL_MODE_RESERVED02 = 0x00000003, 70 UCC_FAST_PROTOCOL_MODE_RESERVED_UART = 0x00000004, 71 UCC_FAST_PROTOCOL_MODE_RESERVED03 = 0x00000005, 72 UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_1 = 0x00000006, 73 UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_2 = 0x00000007, 74 UCC_FAST_PROTOCOL_MODE_RESERVED_BISYNC = 0x00000008, 75 UCC_FAST_PROTOCOL_MODE_RESERVED04 = 0x00000009, 76 UCC_FAST_PROTOCOL_MODE_ATM = 0x0000000A, 77 UCC_FAST_PROTOCOL_MODE_RESERVED05 = 0x0000000B, 78 UCC_FAST_PROTOCOL_MODE_ETHERNET = 0x0000000C, 79 UCC_FAST_PROTOCOL_MODE_RESERVED06 = 0x0000000D, 80 UCC_FAST_PROTOCOL_MODE_POS = 0x0000000E, 81 UCC_FAST_PROTOCOL_MODE_RESERVED07 = 0x0000000F 82 }; 83 84 /* ucc_fast_transparent_txrx - UCC Fast Transparent TX & RX */ 85 enum ucc_fast_transparent_txrx { 86 UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_NORMAL = 0x00000000, 87 UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_TRANSPARENT = 0x18000000 88 }; 89 90 /* UCC fast diagnostic mode */ 91 enum ucc_fast_diag_mode { 92 UCC_FAST_DIAGNOSTIC_NORMAL = 0x0, 93 UCC_FAST_DIAGNOSTIC_LOCAL_LOOP_BACK = 0x40000000, 94 UCC_FAST_DIAGNOSTIC_AUTO_ECHO = 0x80000000, 95 UCC_FAST_DIAGNOSTIC_LOOP_BACK_AND_ECHO = 0xC0000000 96 }; 97 98 /* UCC fast Sync length (transparent mode only) */ 99 enum ucc_fast_sync_len { 100 UCC_FAST_SYNC_LEN_NOT_USED = 0x0, 101 UCC_FAST_SYNC_LEN_AUTOMATIC = 0x00004000, 102 UCC_FAST_SYNC_LEN_8_BIT = 0x00008000, 103 UCC_FAST_SYNC_LEN_16_BIT = 0x0000C000 104 }; 105 106 /* UCC fast RTS mode */ 107 enum ucc_fast_ready_to_send { 108 UCC_FAST_SEND_IDLES_BETWEEN_FRAMES = 0x00000000, 109 UCC_FAST_SEND_FLAGS_BETWEEN_FRAMES = 0x00002000 110 }; 111 112 /* UCC fast receiver decoding mode */ 113 enum ucc_fast_rx_decoding_method { 114 UCC_FAST_RX_ENCODING_NRZ = 0x00000000, 115 UCC_FAST_RX_ENCODING_NRZI = 0x00000800, 116 UCC_FAST_RX_ENCODING_RESERVED0 = 0x00001000, 117 UCC_FAST_RX_ENCODING_RESERVED1 = 0x00001800 118 }; 119 120 /* UCC fast transmitter encoding mode */ 121 enum ucc_fast_tx_encoding_method { 122 UCC_FAST_TX_ENCODING_NRZ = 0x00000000, 123 UCC_FAST_TX_ENCODING_NRZI = 0x00000100, 124 UCC_FAST_TX_ENCODING_RESERVED0 = 0x00000200, 125 UCC_FAST_TX_ENCODING_RESERVED1 = 0x00000300 126 }; 127 128 /* UCC fast CRC length */ 129 enum ucc_fast_transparent_tcrc { 130 UCC_FAST_16_BIT_CRC = 0x00000000, 131 UCC_FAST_CRC_RESERVED0 = 0x00000040, 132 UCC_FAST_32_BIT_CRC = 0x00000080, 133 UCC_FAST_CRC_RESERVED1 = 0x000000C0 134 }; 135 136 /* Fast UCC initialization structure */ 137 struct ucc_fast_info { 138 int ucc_num; 139 int tdm_num; 140 enum qe_clock rx_clock; 141 enum qe_clock tx_clock; 142 enum qe_clock rx_sync; 143 enum qe_clock tx_sync; 144 resource_size_t regs; 145 int irq; 146 u32 uccm_mask; 147 int bd_mem_part; 148 int brkpt_support; 149 int grant_support; 150 int tsa; 151 int cdp; 152 int cds; 153 int ctsp; 154 int ctss; 155 int tci; 156 int txsy; 157 int rtsm; 158 int revd; 159 int rsyn; 160 u16 max_rx_buf_length; 161 u16 urfs; 162 u16 urfet; 163 u16 urfset; 164 u16 utfs; 165 u16 utfet; 166 u16 utftt; 167 u16 ufpt; 168 enum ucc_fast_channel_protocol_mode mode; 169 enum ucc_fast_transparent_txrx ttx_trx; 170 enum ucc_fast_tx_encoding_method tenc; 171 enum ucc_fast_rx_decoding_method renc; 172 enum ucc_fast_transparent_tcrc tcrc; 173 enum ucc_fast_sync_len synl; 174 }; 175 176 struct ucc_fast_private { 177 struct ucc_fast_info *uf_info; 178 struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */ 179 u32 __iomem *p_ucce; /* a pointer to the event register in memory. */ 180 u32 __iomem *p_uccm; /* a pointer to the mask register in memory. */ 181 #ifdef CONFIG_UGETH_TX_ON_DEMAND 182 u16 __iomem *p_utodr; /* pointer to the transmit on demand register */ 183 #endif 184 int enabled_tx; /* Whether channel is enabled for Tx (ENT) */ 185 int enabled_rx; /* Whether channel is enabled for Rx (ENR) */ 186 int stopped_tx; /* Whether channel has been stopped for Tx 187 (STOP_TX, etc.) */ 188 int stopped_rx; /* Whether channel has been stopped for Rx */ 189 u32 ucc_fast_tx_virtual_fifo_base_offset;/* pointer to base of Tx 190 virtual fifo */ 191 u32 ucc_fast_rx_virtual_fifo_base_offset;/* pointer to base of Rx 192 virtual fifo */ 193 #ifdef STATISTICS 194 u32 tx_frames; /* Transmitted frames counter. */ 195 u32 rx_frames; /* Received frames counter (only frames 196 passed to application). */ 197 u32 tx_discarded; /* Discarded tx frames counter (frames that 198 were discarded by the driver due to errors). 199 */ 200 u32 rx_discarded; /* Discarded rx frames counter (frames that 201 were discarded by the driver due to errors). 202 */ 203 #endif /* STATISTICS */ 204 u16 mrblr; /* maximum receive buffer length */ 205 }; 206 207 /* ucc_fast_init 208 * Initializes Fast UCC according to user provided parameters. 209 * 210 * uf_info - (In) pointer to the fast UCC info structure. 211 * uccf_ret - (Out) pointer to the fast UCC structure. 212 */ 213 int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret); 214 215 /* ucc_fast_free 216 * Frees all resources for fast UCC. 217 * 218 * uccf - (In) pointer to the fast UCC structure. 219 */ 220 void ucc_fast_free(struct ucc_fast_private * uccf); 221 222 /* ucc_fast_enable 223 * Enables a fast UCC port. 224 * This routine enables Tx and/or Rx through the General UCC Mode Register. 225 * 226 * uccf - (In) pointer to the fast UCC structure. 227 * mode - (In) TX, RX, or both. 228 */ 229 void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode); 230 231 /* ucc_fast_disable 232 * Disables a fast UCC port. 233 * This routine disables Tx and/or Rx through the General UCC Mode Register. 234 * 235 * uccf - (In) pointer to the fast UCC structure. 236 * mode - (In) TX, RX, or both. 237 */ 238 void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode); 239 240 /* ucc_fast_irq 241 * Handles interrupts on fast UCC. 242 * Called from the general interrupt routine to handle interrupts on fast UCC. 243 * 244 * uccf - (In) pointer to the fast UCC structure. 245 */ 246 void ucc_fast_irq(struct ucc_fast_private * uccf); 247 248 /* ucc_fast_transmit_on_demand 249 * Immediately forces a poll of the transmitter for data to be sent. 250 * Typically, the hardware performs a periodic poll for data that the 251 * transmit routine has set up to be transmitted. In cases where 252 * this polling cycle is not soon enough, this optional routine can 253 * be invoked to force a poll right away, instead. Proper use for 254 * each transmission for which this functionality is desired is to 255 * call the transmit routine and then this routine right after. 256 * 257 * uccf - (In) pointer to the fast UCC structure. 258 */ 259 void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf); 260 261 u32 ucc_fast_get_qe_cr_subblock(int uccf_num); 262 263 void ucc_fast_dump_regs(struct ucc_fast_private * uccf); 264 265 #endif /* __UCC_FAST_H__ */ 266