1 /* 2 * Internal header file for UCC FAST unit routines. 3 * 4 * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved. 5 * 6 * Authors: Shlomi Gridish <gridish@freescale.com> 7 * Li Yang <leoli@freescale.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 #ifndef __UCC_FAST_H__ 15 #define __UCC_FAST_H__ 16 17 #include <linux/kernel.h> 18 19 #include <soc/fsl/qe/immap_qe.h> 20 #include <soc/fsl/qe/qe.h> 21 22 #include <soc/fsl/qe/ucc.h> 23 24 /* Receive BD's status and length*/ 25 #define R_E 0x80000000 /* buffer empty */ 26 #define R_W 0x20000000 /* wrap bit */ 27 #define R_I 0x10000000 /* interrupt on reception */ 28 #define R_L 0x08000000 /* last */ 29 #define R_F 0x04000000 /* first */ 30 31 /* transmit BD's status and length*/ 32 #define T_R 0x80000000 /* ready bit */ 33 #define T_W 0x20000000 /* wrap bit */ 34 #define T_I 0x10000000 /* interrupt on completion */ 35 #define T_L 0x08000000 /* last */ 36 37 /* Receive BD's status */ 38 #define R_E_S 0x8000 /* buffer empty */ 39 #define R_W_S 0x2000 /* wrap bit */ 40 #define R_I_S 0x1000 /* interrupt on reception */ 41 #define R_L_S 0x0800 /* last */ 42 #define R_F_S 0x0400 /* first */ 43 #define R_CM_S 0x0200 /* continuous mode */ 44 #define R_LG_S 0x0020 /* frame length */ 45 #define R_NO_S 0x0010 /* nonoctet */ 46 #define R_AB_S 0x0008 /* abort */ 47 #define R_CR_S 0x0004 /* crc */ 48 #define R_OV_S 0x0002 /* overrun */ 49 #define R_CD_S 0x0001 /* carrier detect */ 50 51 /* transmit BD's status */ 52 #define T_R_S 0x8000 /* ready bit */ 53 #define T_W_S 0x2000 /* wrap bit */ 54 #define T_I_S 0x1000 /* interrupt on completion */ 55 #define T_L_S 0x0800 /* last */ 56 #define T_TC_S 0x0400 /* crc */ 57 #define T_TM_S 0x0200 /* continuous mode */ 58 #define T_UN_S 0x0002 /* hdlc underrun */ 59 #define T_CT_S 0x0001 /* hdlc carrier lost */ 60 61 /* Rx Data buffer must be 4 bytes aligned in most cases */ 62 #define UCC_FAST_RX_ALIGN 4 63 #define UCC_FAST_MRBLR_ALIGNMENT 4 64 #define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT 8 65 66 /* Sizes */ 67 #define UCC_FAST_URFS_MIN_VAL 0x88 68 #define UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR 8 69 70 /* ucc_fast_channel_protocol_mode - UCC FAST mode */ 71 enum ucc_fast_channel_protocol_mode { 72 UCC_FAST_PROTOCOL_MODE_HDLC = 0x00000000, 73 UCC_FAST_PROTOCOL_MODE_RESERVED01 = 0x00000001, 74 UCC_FAST_PROTOCOL_MODE_RESERVED_QMC = 0x00000002, 75 UCC_FAST_PROTOCOL_MODE_RESERVED02 = 0x00000003, 76 UCC_FAST_PROTOCOL_MODE_RESERVED_UART = 0x00000004, 77 UCC_FAST_PROTOCOL_MODE_RESERVED03 = 0x00000005, 78 UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_1 = 0x00000006, 79 UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_2 = 0x00000007, 80 UCC_FAST_PROTOCOL_MODE_RESERVED_BISYNC = 0x00000008, 81 UCC_FAST_PROTOCOL_MODE_RESERVED04 = 0x00000009, 82 UCC_FAST_PROTOCOL_MODE_ATM = 0x0000000A, 83 UCC_FAST_PROTOCOL_MODE_RESERVED05 = 0x0000000B, 84 UCC_FAST_PROTOCOL_MODE_ETHERNET = 0x0000000C, 85 UCC_FAST_PROTOCOL_MODE_RESERVED06 = 0x0000000D, 86 UCC_FAST_PROTOCOL_MODE_POS = 0x0000000E, 87 UCC_FAST_PROTOCOL_MODE_RESERVED07 = 0x0000000F 88 }; 89 90 /* ucc_fast_transparent_txrx - UCC Fast Transparent TX & RX */ 91 enum ucc_fast_transparent_txrx { 92 UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_NORMAL = 0x00000000, 93 UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_TRANSPARENT = 0x18000000 94 }; 95 96 /* UCC fast diagnostic mode */ 97 enum ucc_fast_diag_mode { 98 UCC_FAST_DIAGNOSTIC_NORMAL = 0x0, 99 UCC_FAST_DIAGNOSTIC_LOCAL_LOOP_BACK = 0x40000000, 100 UCC_FAST_DIAGNOSTIC_AUTO_ECHO = 0x80000000, 101 UCC_FAST_DIAGNOSTIC_LOOP_BACK_AND_ECHO = 0xC0000000 102 }; 103 104 /* UCC fast Sync length (transparent mode only) */ 105 enum ucc_fast_sync_len { 106 UCC_FAST_SYNC_LEN_NOT_USED = 0x0, 107 UCC_FAST_SYNC_LEN_AUTOMATIC = 0x00004000, 108 UCC_FAST_SYNC_LEN_8_BIT = 0x00008000, 109 UCC_FAST_SYNC_LEN_16_BIT = 0x0000C000 110 }; 111 112 /* UCC fast RTS mode */ 113 enum ucc_fast_ready_to_send { 114 UCC_FAST_SEND_IDLES_BETWEEN_FRAMES = 0x00000000, 115 UCC_FAST_SEND_FLAGS_BETWEEN_FRAMES = 0x00002000 116 }; 117 118 /* UCC fast receiver decoding mode */ 119 enum ucc_fast_rx_decoding_method { 120 UCC_FAST_RX_ENCODING_NRZ = 0x00000000, 121 UCC_FAST_RX_ENCODING_NRZI = 0x00000800, 122 UCC_FAST_RX_ENCODING_RESERVED0 = 0x00001000, 123 UCC_FAST_RX_ENCODING_RESERVED1 = 0x00001800 124 }; 125 126 /* UCC fast transmitter encoding mode */ 127 enum ucc_fast_tx_encoding_method { 128 UCC_FAST_TX_ENCODING_NRZ = 0x00000000, 129 UCC_FAST_TX_ENCODING_NRZI = 0x00000100, 130 UCC_FAST_TX_ENCODING_RESERVED0 = 0x00000200, 131 UCC_FAST_TX_ENCODING_RESERVED1 = 0x00000300 132 }; 133 134 /* UCC fast CRC length */ 135 enum ucc_fast_transparent_tcrc { 136 UCC_FAST_16_BIT_CRC = 0x00000000, 137 UCC_FAST_CRC_RESERVED0 = 0x00000040, 138 UCC_FAST_32_BIT_CRC = 0x00000080, 139 UCC_FAST_CRC_RESERVED1 = 0x000000C0 140 }; 141 142 /* Fast UCC initialization structure */ 143 struct ucc_fast_info { 144 int ucc_num; 145 int tdm_num; 146 enum qe_clock rx_clock; 147 enum qe_clock tx_clock; 148 enum qe_clock rx_sync; 149 enum qe_clock tx_sync; 150 resource_size_t regs; 151 int irq; 152 u32 uccm_mask; 153 int bd_mem_part; 154 int brkpt_support; 155 int grant_support; 156 int tsa; 157 int cdp; 158 int cds; 159 int ctsp; 160 int ctss; 161 int tci; 162 int txsy; 163 int rtsm; 164 int revd; 165 int rsyn; 166 u16 max_rx_buf_length; 167 u16 urfs; 168 u16 urfet; 169 u16 urfset; 170 u16 utfs; 171 u16 utfet; 172 u16 utftt; 173 u16 ufpt; 174 enum ucc_fast_channel_protocol_mode mode; 175 enum ucc_fast_transparent_txrx ttx_trx; 176 enum ucc_fast_tx_encoding_method tenc; 177 enum ucc_fast_rx_decoding_method renc; 178 enum ucc_fast_transparent_tcrc tcrc; 179 enum ucc_fast_sync_len synl; 180 }; 181 182 struct ucc_fast_private { 183 struct ucc_fast_info *uf_info; 184 struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */ 185 u32 __iomem *p_ucce; /* a pointer to the event register in memory. */ 186 u32 __iomem *p_uccm; /* a pointer to the mask register in memory. */ 187 #ifdef CONFIG_UGETH_TX_ON_DEMAND 188 u16 __iomem *p_utodr; /* pointer to the transmit on demand register */ 189 #endif 190 int enabled_tx; /* Whether channel is enabled for Tx (ENT) */ 191 int enabled_rx; /* Whether channel is enabled for Rx (ENR) */ 192 int stopped_tx; /* Whether channel has been stopped for Tx 193 (STOP_TX, etc.) */ 194 int stopped_rx; /* Whether channel has been stopped for Rx */ 195 u32 ucc_fast_tx_virtual_fifo_base_offset;/* pointer to base of Tx 196 virtual fifo */ 197 u32 ucc_fast_rx_virtual_fifo_base_offset;/* pointer to base of Rx 198 virtual fifo */ 199 #ifdef STATISTICS 200 u32 tx_frames; /* Transmitted frames counter. */ 201 u32 rx_frames; /* Received frames counter (only frames 202 passed to application). */ 203 u32 tx_discarded; /* Discarded tx frames counter (frames that 204 were discarded by the driver due to errors). 205 */ 206 u32 rx_discarded; /* Discarded rx frames counter (frames that 207 were discarded by the driver due to errors). 208 */ 209 #endif /* STATISTICS */ 210 u16 mrblr; /* maximum receive buffer length */ 211 }; 212 213 /* ucc_fast_init 214 * Initializes Fast UCC according to user provided parameters. 215 * 216 * uf_info - (In) pointer to the fast UCC info structure. 217 * uccf_ret - (Out) pointer to the fast UCC structure. 218 */ 219 int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret); 220 221 /* ucc_fast_free 222 * Frees all resources for fast UCC. 223 * 224 * uccf - (In) pointer to the fast UCC structure. 225 */ 226 void ucc_fast_free(struct ucc_fast_private * uccf); 227 228 /* ucc_fast_enable 229 * Enables a fast UCC port. 230 * This routine enables Tx and/or Rx through the General UCC Mode Register. 231 * 232 * uccf - (In) pointer to the fast UCC structure. 233 * mode - (In) TX, RX, or both. 234 */ 235 void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode); 236 237 /* ucc_fast_disable 238 * Disables a fast UCC port. 239 * This routine disables Tx and/or Rx through the General UCC Mode Register. 240 * 241 * uccf - (In) pointer to the fast UCC structure. 242 * mode - (In) TX, RX, or both. 243 */ 244 void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode); 245 246 /* ucc_fast_irq 247 * Handles interrupts on fast UCC. 248 * Called from the general interrupt routine to handle interrupts on fast UCC. 249 * 250 * uccf - (In) pointer to the fast UCC structure. 251 */ 252 void ucc_fast_irq(struct ucc_fast_private * uccf); 253 254 /* ucc_fast_transmit_on_demand 255 * Immediately forces a poll of the transmitter for data to be sent. 256 * Typically, the hardware performs a periodic poll for data that the 257 * transmit routine has set up to be transmitted. In cases where 258 * this polling cycle is not soon enough, this optional routine can 259 * be invoked to force a poll right away, instead. Proper use for 260 * each transmission for which this functionality is desired is to 261 * call the transmit routine and then this routine right after. 262 * 263 * uccf - (In) pointer to the fast UCC structure. 264 */ 265 void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf); 266 267 u32 ucc_fast_get_qe_cr_subblock(int uccf_num); 268 269 void ucc_fast_dump_regs(struct ucc_fast_private * uccf); 270 271 #endif /* __UCC_FAST_H__ */ 272