xref: /openbmc/linux/include/soc/fsl/qe/ucc.h (revision 2874c5fd)
12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
27aa1aa6eSZhao Qiang /*
37aa1aa6eSZhao Qiang  * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
47aa1aa6eSZhao Qiang  *
57aa1aa6eSZhao Qiang  * Authors: 	Shlomi Gridish <gridish@freescale.com>
67aa1aa6eSZhao Qiang  * 		Li Yang <leoli@freescale.com>
77aa1aa6eSZhao Qiang  *
87aa1aa6eSZhao Qiang  * Description:
97aa1aa6eSZhao Qiang  * Internal header file for UCC unit routines.
107aa1aa6eSZhao Qiang  */
117aa1aa6eSZhao Qiang #ifndef __UCC_H__
127aa1aa6eSZhao Qiang #define __UCC_H__
137aa1aa6eSZhao Qiang 
147aa1aa6eSZhao Qiang #include <soc/fsl/qe/immap_qe.h>
157aa1aa6eSZhao Qiang #include <soc/fsl/qe/qe.h>
167aa1aa6eSZhao Qiang 
177aa1aa6eSZhao Qiang #define STATISTICS
187aa1aa6eSZhao Qiang 
197aa1aa6eSZhao Qiang #define UCC_MAX_NUM	8
207aa1aa6eSZhao Qiang 
217aa1aa6eSZhao Qiang /* Slow or fast type for UCCs.
227aa1aa6eSZhao Qiang */
237aa1aa6eSZhao Qiang enum ucc_speed_type {
247aa1aa6eSZhao Qiang 	UCC_SPEED_TYPE_FAST = UCC_GUEMR_MODE_FAST_RX | UCC_GUEMR_MODE_FAST_TX,
257aa1aa6eSZhao Qiang 	UCC_SPEED_TYPE_SLOW = UCC_GUEMR_MODE_SLOW_RX | UCC_GUEMR_MODE_SLOW_TX
267aa1aa6eSZhao Qiang };
277aa1aa6eSZhao Qiang 
287aa1aa6eSZhao Qiang /* ucc_set_type
297aa1aa6eSZhao Qiang  * Sets UCC to slow or fast mode.
307aa1aa6eSZhao Qiang  *
317aa1aa6eSZhao Qiang  * ucc_num - (In) number of UCC (0-7).
327aa1aa6eSZhao Qiang  * speed   - (In) slow or fast mode for UCC.
337aa1aa6eSZhao Qiang  */
347aa1aa6eSZhao Qiang int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed);
357aa1aa6eSZhao Qiang 
367aa1aa6eSZhao Qiang int ucc_set_qe_mux_mii_mng(unsigned int ucc_num);
377aa1aa6eSZhao Qiang 
387aa1aa6eSZhao Qiang int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,
397aa1aa6eSZhao Qiang 	enum comm_dir mode);
40bb8b2062SZhao Qiang int ucc_set_tdm_rxtx_clk(unsigned int tdm_num, enum qe_clock clock,
41bb8b2062SZhao Qiang 			 enum comm_dir mode);
42bb8b2062SZhao Qiang int ucc_set_tdm_rxtx_sync(unsigned int tdm_num, enum qe_clock clock,
43bb8b2062SZhao Qiang 			  enum comm_dir mode);
447aa1aa6eSZhao Qiang 
457aa1aa6eSZhao Qiang int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask);
467aa1aa6eSZhao Qiang 
477aa1aa6eSZhao Qiang /* QE MUX clock routing for UCC
487aa1aa6eSZhao Qiang */
ucc_set_qe_mux_grant(unsigned int ucc_num,int set)497aa1aa6eSZhao Qiang static inline int ucc_set_qe_mux_grant(unsigned int ucc_num, int set)
507aa1aa6eSZhao Qiang {
517aa1aa6eSZhao Qiang 	return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT);
527aa1aa6eSZhao Qiang }
537aa1aa6eSZhao Qiang 
ucc_set_qe_mux_tsa(unsigned int ucc_num,int set)547aa1aa6eSZhao Qiang static inline int ucc_set_qe_mux_tsa(unsigned int ucc_num, int set)
557aa1aa6eSZhao Qiang {
567aa1aa6eSZhao Qiang 	return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA);
577aa1aa6eSZhao Qiang }
587aa1aa6eSZhao Qiang 
ucc_set_qe_mux_bkpt(unsigned int ucc_num,int set)597aa1aa6eSZhao Qiang static inline int ucc_set_qe_mux_bkpt(unsigned int ucc_num, int set)
607aa1aa6eSZhao Qiang {
617aa1aa6eSZhao Qiang 	return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT);
627aa1aa6eSZhao Qiang }
637aa1aa6eSZhao Qiang 
647aa1aa6eSZhao Qiang #endif				/* __UCC_H__ */
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