1 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics 2 * Digitizer with Horizontal PLL registers 3 * 4 * Copyright (C) 2009 Texas Instruments Inc 5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com> 6 * 7 * This code is partially based upon the TVP5150 driver 8 * written by Mauro Carvalho Chehab (mchehab@infradead.org), 9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com> 10 * and the TVP7002 driver in the TI LSP 2.10.00.14 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 */ 22 #ifndef _TVP7002_H_ 23 #define _TVP7002_H_ 24 25 #define TVP7002_MODULE_NAME "tvp7002" 26 27 /** 28 * struct tvp7002_config - Platform dependent data 29 *@clk_polarity: Clock polarity 30 * 0 - Data clocked out on rising edge of DATACLK signal 31 * 1 - Data clocked out on falling edge of DATACLK signal 32 *@hs_polarity: HSYNC polarity 33 * 0 - Active low HSYNC output, 1 - Active high HSYNC output 34 *@vs_polarity: VSYNC Polarity 35 * 0 - Active low VSYNC output, 1 - Active high VSYNC output 36 *@fid_polarity: Active-high Field ID polarity. 37 * 0 - The field ID output is set to logic 1 for an odd field 38 * (field 1) and set to logic 0 for an even field (field 0). 39 * 1 - Operation with polarity inverted. 40 *@sog_polarity: Active high Sync on Green output polarity. 41 * 0 - Normal operation, 1 - Operation with polarity inverted 42 */ 43 struct tvp7002_config { 44 bool clk_polarity; 45 bool hs_polarity; 46 bool vs_polarity; 47 bool fid_polarity; 48 bool sog_polarity; 49 }; 50 #endif 51