1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * ADV7343 header file 4 * 5 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ 6 */ 7 8 #ifndef ADV7343_H 9 #define ADV7343_H 10 11 #define ADV7343_COMPOSITE_ID (0) 12 #define ADV7343_COMPONENT_ID (1) 13 #define ADV7343_SVIDEO_ID (2) 14 15 /** 16 * struct adv7343_power_mode - power mode configuration. 17 * @sleep_mode: on enable the current consumption is reduced to micro ampere 18 * level. All DACs and the internal PLL circuit are disabled. 19 * Registers can be read from and written in sleep mode. 20 * @pll_control: PLL and oversampling control. This control allows internal 21 * PLL 1 circuit to be powered down and the oversampling to be 22 * switched off. 23 * @dac: array to configure power on/off DAC's 1..6 24 * 25 * Power mode register (Register 0x0), for more info refer REGISTER MAP ACCESS 26 * section of datasheet[1], table 17 page no 30. 27 * 28 * [1] http://www.analog.com/static/imported-files/data_sheets/ADV7342_7343.pdf 29 */ 30 struct adv7343_power_mode { 31 bool sleep_mode; 32 bool pll_control; 33 u32 dac[6]; 34 }; 35 36 /** 37 * struct adv7343_sd_config - SD Only Output Configuration. 38 * @sd_dac_out: array configuring SD DAC Outputs 1 and 2 39 */ 40 struct adv7343_sd_config { 41 /* SD only Output Configuration */ 42 u32 sd_dac_out[2]; 43 }; 44 45 /** 46 * struct adv7343_platform_data - Platform data values and access functions. 47 * @mode_config: Configuration for power mode. 48 * @sd_config: SD Only Configuration. 49 */ 50 struct adv7343_platform_data { 51 struct adv7343_power_mode mode_config; 52 struct adv7343_sd_config sd_config; 53 }; 54 55 #endif /* End of #ifndef ADV7343_H */ 56