1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2550a7375SFelipe Balbi /*
3550a7375SFelipe Balbi * This is used to for host and peripheral modes of the driver for
4550a7375SFelipe Balbi * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC.
5550a7375SFelipe Balbi *
6550a7375SFelipe Balbi * Board initialization should put one of these into dev->platform_data,
705ac10ddSFelipe Balbi * probably on some platform_device named "musb-hdrc". It encapsulates
8550a7375SFelipe Balbi * key configuration differences between boards.
9550a7375SFelipe Balbi */
10550a7375SFelipe Balbi
11fbfc396eSMark A. Greer #ifndef __LINUX_USB_MUSB_H
12fbfc396eSMark A. Greer #define __LINUX_USB_MUSB_H
13fbfc396eSMark A. Greer
14550a7375SFelipe Balbi /* The USB role is defined by the connector used on the board, so long as
15550a7375SFelipe Balbi * standards are being followed. (Developer boards sometimes won't.)
16550a7375SFelipe Balbi */
17550a7375SFelipe Balbi enum musb_mode {
18550a7375SFelipe Balbi MUSB_UNDEFINED = 0,
19550a7375SFelipe Balbi MUSB_HOST, /* A or Mini-A connector */
20550a7375SFelipe Balbi MUSB_PERIPHERAL, /* B or Mini-B connector */
21550a7375SFelipe Balbi MUSB_OTG /* Mini-AB connector */
22550a7375SFelipe Balbi };
23550a7375SFelipe Balbi
24550a7375SFelipe Balbi struct clk;
25550a7375SFelipe Balbi
26e6c213b2SFelipe Balbi enum musb_fifo_style {
27e6c213b2SFelipe Balbi FIFO_RXTX,
28e6c213b2SFelipe Balbi FIFO_TX,
29e6c213b2SFelipe Balbi FIFO_RX
30e6c213b2SFelipe Balbi } __attribute__ ((packed));
31e6c213b2SFelipe Balbi
32e6c213b2SFelipe Balbi enum musb_buf_mode {
33e6c213b2SFelipe Balbi BUF_SINGLE,
34e6c213b2SFelipe Balbi BUF_DOUBLE
35e6c213b2SFelipe Balbi } __attribute__ ((packed));
36e6c213b2SFelipe Balbi
37e6c213b2SFelipe Balbi struct musb_fifo_cfg {
38e6c213b2SFelipe Balbi u8 hw_ep_num;
39e6c213b2SFelipe Balbi enum musb_fifo_style style;
40e6c213b2SFelipe Balbi enum musb_buf_mode mode;
41e6c213b2SFelipe Balbi u16 maxpacket;
42e6c213b2SFelipe Balbi };
43e6c213b2SFelipe Balbi
44e6c213b2SFelipe Balbi #define MUSB_EP_FIFO(ep, st, m, pkt) \
45e6c213b2SFelipe Balbi { \
46e6c213b2SFelipe Balbi .hw_ep_num = ep, \
47e6c213b2SFelipe Balbi .style = st, \
48e6c213b2SFelipe Balbi .mode = m, \
49e6c213b2SFelipe Balbi .maxpacket = pkt, \
50e6c213b2SFelipe Balbi }
51e6c213b2SFelipe Balbi
52e6c213b2SFelipe Balbi #define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \
53e6c213b2SFelipe Balbi MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt)
54e6c213b2SFelipe Balbi
55e6c213b2SFelipe Balbi #define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \
56e6c213b2SFelipe Balbi MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt)
57e6c213b2SFelipe Balbi
58ca6d1b13SFelipe Balbi struct musb_hdrc_eps_bits {
59ca6d1b13SFelipe Balbi const char name[16];
60ca6d1b13SFelipe Balbi u8 bits;
61ca6d1b13SFelipe Balbi };
62ca6d1b13SFelipe Balbi
63ca6d1b13SFelipe Balbi struct musb_hdrc_config {
64e6c213b2SFelipe Balbi struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */
65e6c213b2SFelipe Balbi unsigned fifo_cfg_size; /* size of the fifo configuration */
66e6c213b2SFelipe Balbi
67ca6d1b13SFelipe Balbi /* MUSB configuration-specific details */
68ca6d1b13SFelipe Balbi unsigned multipoint:1; /* multipoint device */
69c58bfa6bSFelipe Balbi unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */
70ca6d1b13SFelipe Balbi
71869c5978SDaniel Mack /* need to explicitly de-assert the port reset after resume? */
72869c5978SDaniel Mack unsigned host_port_deassert_reset_at_resume:1;
73869c5978SDaniel Mack
74ca6d1b13SFelipe Balbi u8 num_eps; /* number of endpoints _with_ ep0 */
75ca6d1b13SFelipe Balbi u8 ram_bits; /* ram address size */
76ca6d1b13SFelipe Balbi
779b753764SBin Liu u32 maximum_speed;
78ca6d1b13SFelipe Balbi };
79ca6d1b13SFelipe Balbi
80550a7375SFelipe Balbi struct musb_hdrc_platform_data {
81550a7375SFelipe Balbi /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */
82550a7375SFelipe Balbi u8 mode;
83550a7375SFelipe Balbi
84550a7375SFelipe Balbi /* for clk_get() */
85550a7375SFelipe Balbi const char *clock;
86550a7375SFelipe Balbi
87550a7375SFelipe Balbi /* (HOST or OTG) switch VBUS on/off */
88550a7375SFelipe Balbi int (*set_vbus)(struct device *dev, int is_on);
89550a7375SFelipe Balbi
90550a7375SFelipe Balbi /* (HOST or OTG) mA/2 power supplied on (default = 8mA) */
91550a7375SFelipe Balbi u8 power;
92550a7375SFelipe Balbi
93550a7375SFelipe Balbi /* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */
94550a7375SFelipe Balbi u8 min_power;
95550a7375SFelipe Balbi
96550a7375SFelipe Balbi /* (HOST or OTG) msec/2 after VBUS on till power good */
97550a7375SFelipe Balbi u8 potpgt;
98550a7375SFelipe Balbi
995fc4e779SAjay Kumar Gupta /* (HOST or OTG) program PHY for external Vbus */
1005fc4e779SAjay Kumar Gupta unsigned extvbus:1;
1015fc4e779SAjay Kumar Gupta
102ca6d1b13SFelipe Balbi /* MUSB configuration-specific details */
103ead22cafSPetr Kulhavy const struct musb_hdrc_config *config;
104884b8369SMaulik Mankad
105884b8369SMaulik Mankad /* Architecture specific board data */
106884b8369SMaulik Mankad void *board_data;
107f7ec9437SFelipe Balbi
108f7ec9437SFelipe Balbi /* Platform specific struct musb_ops pointer */
109f7ec9437SFelipe Balbi const void *platform_ops;
110550a7375SFelipe Balbi };
111550a7375SFelipe Balbi
1128055555fSTony Lindgren enum musb_vbus_id_status {
1138055555fSTony Lindgren MUSB_UNKNOWN = 0,
1148055555fSTony Lindgren MUSB_ID_GROUND,
1158055555fSTony Lindgren MUSB_ID_FLOAT,
1168055555fSTony Lindgren MUSB_VBUS_VALID,
1178055555fSTony Lindgren MUSB_VBUS_OFF,
1188055555fSTony Lindgren };
1198055555fSTony Lindgren
1208055555fSTony Lindgren #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
12112b7db2bSTony Lindgren int musb_mailbox(enum musb_vbus_id_status status);
1228055555fSTony Lindgren #else
musb_mailbox(enum musb_vbus_id_status status)12312b7db2bSTony Lindgren static inline int musb_mailbox(enum musb_vbus_id_status status)
1248055555fSTony Lindgren {
12512b7db2bSTony Lindgren return 0;
1268055555fSTony Lindgren }
1278055555fSTony Lindgren #endif
128550a7375SFelipe Balbi
129550a7375SFelipe Balbi /* TUSB 6010 support */
130550a7375SFelipe Balbi
131550a7375SFelipe Balbi #define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */
132550a7375SFelipe Balbi #define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */
133550a7375SFelipe Balbi #define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */
134550a7375SFelipe Balbi
135fbfc396eSMark A. Greer #endif /* __LINUX_USB_MUSB_H */
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