1 /* 2 * Copyright (C) 2005 David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #ifndef __LINUX_SPI_H 16 #define __LINUX_SPI_H 17 18 #include <linux/device.h> 19 #include <linux/mod_devicetable.h> 20 #include <linux/slab.h> 21 #include <linux/kthread.h> 22 #include <linux/completion.h> 23 #include <linux/scatterlist.h> 24 25 struct dma_chan; 26 struct spi_master; 27 struct spi_transfer; 28 29 /* 30 * INTERFACES between SPI master-side drivers and SPI infrastructure. 31 * (There's no SPI slave support for Linux yet...) 32 */ 33 extern struct bus_type spi_bus_type; 34 35 /** 36 * struct spi_statistics - statistics for spi transfers 37 * @lock: lock protecting this structure 38 * 39 * @messages: number of spi-messages handled 40 * @transfers: number of spi_transfers handled 41 * @errors: number of errors during spi_transfer 42 * @timedout: number of timeouts during spi_transfer 43 * 44 * @spi_sync: number of times spi_sync is used 45 * @spi_sync_immediate: 46 * number of times spi_sync is executed immediately 47 * in calling context without queuing and scheduling 48 * @spi_async: number of times spi_async is used 49 * 50 * @bytes: number of bytes transferred to/from device 51 * @bytes_tx: number of bytes sent to device 52 * @bytes_rx: number of bytes received from device 53 * 54 */ 55 struct spi_statistics { 56 spinlock_t lock; /* lock for the whole structure */ 57 58 unsigned long messages; 59 unsigned long transfers; 60 unsigned long errors; 61 unsigned long timedout; 62 63 unsigned long spi_sync; 64 unsigned long spi_sync_immediate; 65 unsigned long spi_async; 66 67 unsigned long long bytes; 68 unsigned long long bytes_rx; 69 unsigned long long bytes_tx; 70 71 }; 72 73 void spi_statistics_add_transfer_stats(struct spi_statistics *stats, 74 struct spi_transfer *xfer, 75 struct spi_master *master); 76 77 #define SPI_STATISTICS_ADD_TO_FIELD(stats, field, count) \ 78 do { \ 79 unsigned long flags; \ 80 spin_lock_irqsave(&(stats)->lock, flags); \ 81 (stats)->field += count; \ 82 spin_unlock_irqrestore(&(stats)->lock, flags); \ 83 } while (0) 84 85 #define SPI_STATISTICS_INCREMENT_FIELD(stats, field) \ 86 SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1) 87 88 /** 89 * struct spi_device - Master side proxy for an SPI slave device 90 * @dev: Driver model representation of the device. 91 * @master: SPI controller used with the device. 92 * @max_speed_hz: Maximum clock rate to be used with this chip 93 * (on this board); may be changed by the device's driver. 94 * The spi_transfer.speed_hz can override this for each transfer. 95 * @chip_select: Chipselect, distinguishing chips handled by @master. 96 * @mode: The spi mode defines how data is clocked out and in. 97 * This may be changed by the device's driver. 98 * The "active low" default for chipselect mode can be overridden 99 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for 100 * each word in a transfer (by specifying SPI_LSB_FIRST). 101 * @bits_per_word: Data transfers involve one or more words; word sizes 102 * like eight or 12 bits are common. In-memory wordsizes are 103 * powers of two bytes (e.g. 20 bit samples use 32 bits). 104 * This may be changed by the device's driver, or left at the 105 * default (0) indicating protocol words are eight bit bytes. 106 * The spi_transfer.bits_per_word can override this for each transfer. 107 * @irq: Negative, or the number passed to request_irq() to receive 108 * interrupts from this device. 109 * @controller_state: Controller's runtime state 110 * @controller_data: Board-specific definitions for controller, such as 111 * FIFO initialization parameters; from board_info.controller_data 112 * @modalias: Name of the driver to use with this device, or an alias 113 * for that name. This appears in the sysfs "modalias" attribute 114 * for driver coldplugging, and in uevents used for hotplugging 115 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when 116 * when not using a GPIO line) 117 * 118 * @statistics: statistics for the spi_device 119 * 120 * A @spi_device is used to interchange data between an SPI slave 121 * (usually a discrete chip) and CPU memory. 122 * 123 * In @dev, the platform_data is used to hold information about this 124 * device that's meaningful to the device's protocol driver, but not 125 * to its controller. One example might be an identifier for a chip 126 * variant with slightly different functionality; another might be 127 * information about how this particular board wires the chip's pins. 128 */ 129 struct spi_device { 130 struct device dev; 131 struct spi_master *master; 132 u32 max_speed_hz; 133 u8 chip_select; 134 u8 bits_per_word; 135 u16 mode; 136 #define SPI_CPHA 0x01 /* clock phase */ 137 #define SPI_CPOL 0x02 /* clock polarity */ 138 #define SPI_MODE_0 (0|0) /* (original MicroWire) */ 139 #define SPI_MODE_1 (0|SPI_CPHA) 140 #define SPI_MODE_2 (SPI_CPOL|0) 141 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 142 #define SPI_CS_HIGH 0x04 /* chipselect active high? */ 143 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ 144 #define SPI_3WIRE 0x10 /* SI/SO signals shared */ 145 #define SPI_LOOP 0x20 /* loopback mode */ 146 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */ 147 #define SPI_READY 0x80 /* slave pulls low to pause */ 148 #define SPI_TX_DUAL 0x100 /* transmit with 2 wires */ 149 #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ 150 #define SPI_RX_DUAL 0x400 /* receive with 2 wires */ 151 #define SPI_RX_QUAD 0x800 /* receive with 4 wires */ 152 int irq; 153 void *controller_state; 154 void *controller_data; 155 char modalias[SPI_NAME_SIZE]; 156 int cs_gpio; /* chip select gpio */ 157 158 /* the statistics */ 159 struct spi_statistics statistics; 160 161 /* 162 * likely need more hooks for more protocol options affecting how 163 * the controller talks to each chip, like: 164 * - memory packing (12 bit samples into low bits, others zeroed) 165 * - priority 166 * - drop chipselect after each word 167 * - chipselect delays 168 * - ... 169 */ 170 }; 171 172 static inline struct spi_device *to_spi_device(struct device *dev) 173 { 174 return dev ? container_of(dev, struct spi_device, dev) : NULL; 175 } 176 177 /* most drivers won't need to care about device refcounting */ 178 static inline struct spi_device *spi_dev_get(struct spi_device *spi) 179 { 180 return (spi && get_device(&spi->dev)) ? spi : NULL; 181 } 182 183 static inline void spi_dev_put(struct spi_device *spi) 184 { 185 if (spi) 186 put_device(&spi->dev); 187 } 188 189 /* ctldata is for the bus_master driver's runtime state */ 190 static inline void *spi_get_ctldata(struct spi_device *spi) 191 { 192 return spi->controller_state; 193 } 194 195 static inline void spi_set_ctldata(struct spi_device *spi, void *state) 196 { 197 spi->controller_state = state; 198 } 199 200 /* device driver data */ 201 202 static inline void spi_set_drvdata(struct spi_device *spi, void *data) 203 { 204 dev_set_drvdata(&spi->dev, data); 205 } 206 207 static inline void *spi_get_drvdata(struct spi_device *spi) 208 { 209 return dev_get_drvdata(&spi->dev); 210 } 211 212 struct spi_message; 213 struct spi_transfer; 214 215 /** 216 * struct spi_driver - Host side "protocol" driver 217 * @id_table: List of SPI devices supported by this driver 218 * @probe: Binds this driver to the spi device. Drivers can verify 219 * that the device is actually present, and may need to configure 220 * characteristics (such as bits_per_word) which weren't needed for 221 * the initial configuration done during system setup. 222 * @remove: Unbinds this driver from the spi device 223 * @shutdown: Standard shutdown callback used during system state 224 * transitions such as powerdown/halt and kexec 225 * @driver: SPI device drivers should initialize the name and owner 226 * field of this structure. 227 * 228 * This represents the kind of device driver that uses SPI messages to 229 * interact with the hardware at the other end of a SPI link. It's called 230 * a "protocol" driver because it works through messages rather than talking 231 * directly to SPI hardware (which is what the underlying SPI controller 232 * driver does to pass those messages). These protocols are defined in the 233 * specification for the device(s) supported by the driver. 234 * 235 * As a rule, those device protocols represent the lowest level interface 236 * supported by a driver, and it will support upper level interfaces too. 237 * Examples of such upper levels include frameworks like MTD, networking, 238 * MMC, RTC, filesystem character device nodes, and hardware monitoring. 239 */ 240 struct spi_driver { 241 const struct spi_device_id *id_table; 242 int (*probe)(struct spi_device *spi); 243 int (*remove)(struct spi_device *spi); 244 void (*shutdown)(struct spi_device *spi); 245 struct device_driver driver; 246 }; 247 248 static inline struct spi_driver *to_spi_driver(struct device_driver *drv) 249 { 250 return drv ? container_of(drv, struct spi_driver, driver) : NULL; 251 } 252 253 extern int spi_register_driver(struct spi_driver *sdrv); 254 255 /** 256 * spi_unregister_driver - reverse effect of spi_register_driver 257 * @sdrv: the driver to unregister 258 * Context: can sleep 259 */ 260 static inline void spi_unregister_driver(struct spi_driver *sdrv) 261 { 262 if (sdrv) 263 driver_unregister(&sdrv->driver); 264 } 265 266 /** 267 * module_spi_driver() - Helper macro for registering a SPI driver 268 * @__spi_driver: spi_driver struct 269 * 270 * Helper macro for SPI drivers which do not do anything special in module 271 * init/exit. This eliminates a lot of boilerplate. Each module may only 272 * use this macro once, and calling it replaces module_init() and module_exit() 273 */ 274 #define module_spi_driver(__spi_driver) \ 275 module_driver(__spi_driver, spi_register_driver, \ 276 spi_unregister_driver) 277 278 /** 279 * struct spi_master - interface to SPI master controller 280 * @dev: device interface to this driver 281 * @list: link with the global spi_master list 282 * @bus_num: board-specific (and often SOC-specific) identifier for a 283 * given SPI controller. 284 * @num_chipselect: chipselects are used to distinguish individual 285 * SPI slaves, and are numbered from zero to num_chipselects. 286 * each slave has a chipselect signal, but it's common that not 287 * every chipselect is connected to a slave. 288 * @dma_alignment: SPI controller constraint on DMA buffers alignment. 289 * @mode_bits: flags understood by this controller driver 290 * @bits_per_word_mask: A mask indicating which values of bits_per_word are 291 * supported by the driver. Bit n indicates that a bits_per_word n+1 is 292 * supported. If set, the SPI core will reject any transfer with an 293 * unsupported bits_per_word. If not set, this value is simply ignored, 294 * and it's up to the individual driver to perform any validation. 295 * @min_speed_hz: Lowest supported transfer speed 296 * @max_speed_hz: Highest supported transfer speed 297 * @flags: other constraints relevant to this driver 298 * @bus_lock_spinlock: spinlock for SPI bus locking 299 * @bus_lock_mutex: mutex for SPI bus locking 300 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use 301 * @setup: updates the device mode and clocking records used by a 302 * device's SPI controller; protocol code may call this. This 303 * must fail if an unrecognized or unsupported mode is requested. 304 * It's always safe to call this unless transfers are pending on 305 * the device whose settings are being modified. 306 * @transfer: adds a message to the controller's transfer queue. 307 * @cleanup: frees controller-specific state 308 * @can_dma: determine whether this master supports DMA 309 * @queued: whether this master is providing an internal message queue 310 * @kworker: thread struct for message pump 311 * @kworker_task: pointer to task for message pump kworker thread 312 * @pump_messages: work struct for scheduling work to the message pump 313 * @queue_lock: spinlock to syncronise access to message queue 314 * @queue: message queue 315 * @idling: the device is entering idle state 316 * @cur_msg: the currently in-flight message 317 * @cur_msg_prepared: spi_prepare_message was called for the currently 318 * in-flight message 319 * @cur_msg_mapped: message has been mapped for DMA 320 * @xfer_completion: used by core transfer_one_message() 321 * @busy: message pump is busy 322 * @running: message pump is running 323 * @rt: whether this queue is set to run as a realtime task 324 * @auto_runtime_pm: the core should ensure a runtime PM reference is held 325 * while the hardware is prepared, using the parent 326 * device for the spidev 327 * @max_dma_len: Maximum length of a DMA transfer for the device. 328 * @prepare_transfer_hardware: a message will soon arrive from the queue 329 * so the subsystem requests the driver to prepare the transfer hardware 330 * by issuing this call 331 * @transfer_one_message: the subsystem calls the driver to transfer a single 332 * message while queuing transfers that arrive in the meantime. When the 333 * driver is finished with this message, it must call 334 * spi_finalize_current_message() so the subsystem can issue the next 335 * message 336 * @unprepare_transfer_hardware: there are currently no more messages on the 337 * queue so the subsystem notifies the driver that it may relax the 338 * hardware by issuing this call 339 * @set_cs: set the logic level of the chip select line. May be called 340 * from interrupt context. 341 * @prepare_message: set up the controller to transfer a single message, 342 * for example doing DMA mapping. Called from threaded 343 * context. 344 * @transfer_one: transfer a single spi_transfer. 345 * - return 0 if the transfer is finished, 346 * - return 1 if the transfer is still in progress. When 347 * the driver is finished with this transfer it must 348 * call spi_finalize_current_transfer() so the subsystem 349 * can issue the next transfer. Note: transfer_one and 350 * transfer_one_message are mutually exclusive; when both 351 * are set, the generic subsystem does not call your 352 * transfer_one callback. 353 * @handle_err: the subsystem calls the driver to handle an error that occurs 354 * in the generic implementation of transfer_one_message(). 355 * @unprepare_message: undo any work done by prepare_message(). 356 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS 357 * number. Any individual value may be -ENOENT for CS lines that 358 * are not GPIOs (driven by the SPI controller itself). 359 * @statistics: statistics for the spi_master 360 * @dma_tx: DMA transmit channel 361 * @dma_rx: DMA receive channel 362 * @dummy_rx: dummy receive buffer for full-duplex devices 363 * @dummy_tx: dummy transmit buffer for full-duplex devices 364 * 365 * Each SPI master controller can communicate with one or more @spi_device 366 * children. These make a small bus, sharing MOSI, MISO and SCK signals 367 * but not chip select signals. Each device may be configured to use a 368 * different clock rate, since those shared signals are ignored unless 369 * the chip is selected. 370 * 371 * The driver for an SPI controller manages access to those devices through 372 * a queue of spi_message transactions, copying data between CPU memory and 373 * an SPI slave device. For each such message it queues, it calls the 374 * message's completion function when the transaction completes. 375 */ 376 struct spi_master { 377 struct device dev; 378 379 struct list_head list; 380 381 /* other than negative (== assign one dynamically), bus_num is fully 382 * board-specific. usually that simplifies to being SOC-specific. 383 * example: one SOC has three SPI controllers, numbered 0..2, 384 * and one board's schematics might show it using SPI-2. software 385 * would normally use bus_num=2 for that controller. 386 */ 387 s16 bus_num; 388 389 /* chipselects will be integral to many controllers; some others 390 * might use board-specific GPIOs. 391 */ 392 u16 num_chipselect; 393 394 /* some SPI controllers pose alignment requirements on DMAable 395 * buffers; let protocol drivers know about these requirements. 396 */ 397 u16 dma_alignment; 398 399 /* spi_device.mode flags understood by this controller driver */ 400 u16 mode_bits; 401 402 /* bitmask of supported bits_per_word for transfers */ 403 u32 bits_per_word_mask; 404 #define SPI_BPW_MASK(bits) BIT((bits) - 1) 405 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) 406 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1)) 407 408 /* limits on transfer speed */ 409 u32 min_speed_hz; 410 u32 max_speed_hz; 411 412 /* other constraints relevant to this driver */ 413 u16 flags; 414 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ 415 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */ 416 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */ 417 #define SPI_MASTER_MUST_RX BIT(3) /* requires rx */ 418 #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */ 419 420 /* lock and mutex for SPI bus locking */ 421 spinlock_t bus_lock_spinlock; 422 struct mutex bus_lock_mutex; 423 424 /* flag indicating that the SPI bus is locked for exclusive use */ 425 bool bus_lock_flag; 426 427 /* Setup mode and clock, etc (spi driver may call many times). 428 * 429 * IMPORTANT: this may be called when transfers to another 430 * device are active. DO NOT UPDATE SHARED REGISTERS in ways 431 * which could break those transfers. 432 */ 433 int (*setup)(struct spi_device *spi); 434 435 /* bidirectional bulk transfers 436 * 437 * + The transfer() method may not sleep; its main role is 438 * just to add the message to the queue. 439 * + For now there's no remove-from-queue operation, or 440 * any other request management 441 * + To a given spi_device, message queueing is pure fifo 442 * 443 * + The master's main job is to process its message queue, 444 * selecting a chip then transferring data 445 * + If there are multiple spi_device children, the i/o queue 446 * arbitration algorithm is unspecified (round robin, fifo, 447 * priority, reservations, preemption, etc) 448 * 449 * + Chipselect stays active during the entire message 450 * (unless modified by spi_transfer.cs_change != 0). 451 * + The message transfers use clock and SPI mode parameters 452 * previously established by setup() for this device 453 */ 454 int (*transfer)(struct spi_device *spi, 455 struct spi_message *mesg); 456 457 /* called on release() to free memory provided by spi_master */ 458 void (*cleanup)(struct spi_device *spi); 459 460 /* 461 * Used to enable core support for DMA handling, if can_dma() 462 * exists and returns true then the transfer will be mapped 463 * prior to transfer_one() being called. The driver should 464 * not modify or store xfer and dma_tx and dma_rx must be set 465 * while the device is prepared. 466 */ 467 bool (*can_dma)(struct spi_master *master, 468 struct spi_device *spi, 469 struct spi_transfer *xfer); 470 471 /* 472 * These hooks are for drivers that want to use the generic 473 * master transfer queueing mechanism. If these are used, the 474 * transfer() function above must NOT be specified by the driver. 475 * Over time we expect SPI drivers to be phased over to this API. 476 */ 477 bool queued; 478 struct kthread_worker kworker; 479 struct task_struct *kworker_task; 480 struct kthread_work pump_messages; 481 spinlock_t queue_lock; 482 struct list_head queue; 483 struct spi_message *cur_msg; 484 bool idling; 485 bool busy; 486 bool running; 487 bool rt; 488 bool auto_runtime_pm; 489 bool cur_msg_prepared; 490 bool cur_msg_mapped; 491 struct completion xfer_completion; 492 size_t max_dma_len; 493 494 int (*prepare_transfer_hardware)(struct spi_master *master); 495 int (*transfer_one_message)(struct spi_master *master, 496 struct spi_message *mesg); 497 int (*unprepare_transfer_hardware)(struct spi_master *master); 498 int (*prepare_message)(struct spi_master *master, 499 struct spi_message *message); 500 int (*unprepare_message)(struct spi_master *master, 501 struct spi_message *message); 502 503 /* 504 * These hooks are for drivers that use a generic implementation 505 * of transfer_one_message() provied by the core. 506 */ 507 void (*set_cs)(struct spi_device *spi, bool enable); 508 int (*transfer_one)(struct spi_master *master, struct spi_device *spi, 509 struct spi_transfer *transfer); 510 void (*handle_err)(struct spi_master *master, 511 struct spi_message *message); 512 513 /* gpio chip select */ 514 int *cs_gpios; 515 516 /* statistics */ 517 struct spi_statistics statistics; 518 519 /* DMA channels for use with core dmaengine helpers */ 520 struct dma_chan *dma_tx; 521 struct dma_chan *dma_rx; 522 523 /* dummy data for full duplex devices */ 524 void *dummy_rx; 525 void *dummy_tx; 526 }; 527 528 static inline void *spi_master_get_devdata(struct spi_master *master) 529 { 530 return dev_get_drvdata(&master->dev); 531 } 532 533 static inline void spi_master_set_devdata(struct spi_master *master, void *data) 534 { 535 dev_set_drvdata(&master->dev, data); 536 } 537 538 static inline struct spi_master *spi_master_get(struct spi_master *master) 539 { 540 if (!master || !get_device(&master->dev)) 541 return NULL; 542 return master; 543 } 544 545 static inline void spi_master_put(struct spi_master *master) 546 { 547 if (master) 548 put_device(&master->dev); 549 } 550 551 /* PM calls that need to be issued by the driver */ 552 extern int spi_master_suspend(struct spi_master *master); 553 extern int spi_master_resume(struct spi_master *master); 554 555 /* Calls the driver make to interact with the message queue */ 556 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master); 557 extern void spi_finalize_current_message(struct spi_master *master); 558 extern void spi_finalize_current_transfer(struct spi_master *master); 559 560 /* the spi driver core manages memory for the spi_master classdev */ 561 extern struct spi_master * 562 spi_alloc_master(struct device *host, unsigned size); 563 564 extern int spi_register_master(struct spi_master *master); 565 extern int devm_spi_register_master(struct device *dev, 566 struct spi_master *master); 567 extern void spi_unregister_master(struct spi_master *master); 568 569 extern struct spi_master *spi_busnum_to_master(u16 busnum); 570 571 /*---------------------------------------------------------------------------*/ 572 573 /* 574 * I/O INTERFACE between SPI controller and protocol drivers 575 * 576 * Protocol drivers use a queue of spi_messages, each transferring data 577 * between the controller and memory buffers. 578 * 579 * The spi_messages themselves consist of a series of read+write transfer 580 * segments. Those segments always read the same number of bits as they 581 * write; but one or the other is easily ignored by passing a null buffer 582 * pointer. (This is unlike most types of I/O API, because SPI hardware 583 * is full duplex.) 584 * 585 * NOTE: Allocation of spi_transfer and spi_message memory is entirely 586 * up to the protocol driver, which guarantees the integrity of both (as 587 * well as the data buffers) for as long as the message is queued. 588 */ 589 590 /** 591 * struct spi_transfer - a read/write buffer pair 592 * @tx_buf: data to be written (dma-safe memory), or NULL 593 * @rx_buf: data to be read (dma-safe memory), or NULL 594 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped 595 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped 596 * @tx_nbits: number of bits used for writing. If 0 the default 597 * (SPI_NBITS_SINGLE) is used. 598 * @rx_nbits: number of bits used for reading. If 0 the default 599 * (SPI_NBITS_SINGLE) is used. 600 * @len: size of rx and tx buffers (in bytes) 601 * @speed_hz: Select a speed other than the device default for this 602 * transfer. If 0 the default (from @spi_device) is used. 603 * @bits_per_word: select a bits_per_word other than the device default 604 * for this transfer. If 0 the default (from @spi_device) is used. 605 * @cs_change: affects chipselect after this transfer completes 606 * @delay_usecs: microseconds to delay after this transfer before 607 * (optionally) changing the chipselect status, then starting 608 * the next transfer or completing this @spi_message. 609 * @transfer_list: transfers are sequenced through @spi_message.transfers 610 * @tx_sg: Scatterlist for transmit, currently not for client use 611 * @rx_sg: Scatterlist for receive, currently not for client use 612 * 613 * SPI transfers always write the same number of bytes as they read. 614 * Protocol drivers should always provide @rx_buf and/or @tx_buf. 615 * In some cases, they may also want to provide DMA addresses for 616 * the data being transferred; that may reduce overhead, when the 617 * underlying driver uses dma. 618 * 619 * If the transmit buffer is null, zeroes will be shifted out 620 * while filling @rx_buf. If the receive buffer is null, the data 621 * shifted in will be discarded. Only "len" bytes shift out (or in). 622 * It's an error to try to shift out a partial word. (For example, by 623 * shifting out three bytes with word size of sixteen or twenty bits; 624 * the former uses two bytes per word, the latter uses four bytes.) 625 * 626 * In-memory data values are always in native CPU byte order, translated 627 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So 628 * for example when bits_per_word is sixteen, buffers are 2N bytes long 629 * (@len = 2N) and hold N sixteen bit words in CPU byte order. 630 * 631 * When the word size of the SPI transfer is not a power-of-two multiple 632 * of eight bits, those in-memory words include extra bits. In-memory 633 * words are always seen by protocol drivers as right-justified, so the 634 * undefined (rx) or unused (tx) bits are always the most significant bits. 635 * 636 * All SPI transfers start with the relevant chipselect active. Normally 637 * it stays selected until after the last transfer in a message. Drivers 638 * can affect the chipselect signal using cs_change. 639 * 640 * (i) If the transfer isn't the last one in the message, this flag is 641 * used to make the chipselect briefly go inactive in the middle of the 642 * message. Toggling chipselect in this way may be needed to terminate 643 * a chip command, letting a single spi_message perform all of group of 644 * chip transactions together. 645 * 646 * (ii) When the transfer is the last one in the message, the chip may 647 * stay selected until the next transfer. On multi-device SPI busses 648 * with nothing blocking messages going to other devices, this is just 649 * a performance hint; starting a message to another device deselects 650 * this one. But in other cases, this can be used to ensure correctness. 651 * Some devices need protocol transactions to be built from a series of 652 * spi_message submissions, where the content of one message is determined 653 * by the results of previous messages and where the whole transaction 654 * ends when the chipselect goes intactive. 655 * 656 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information 657 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these 658 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x) 659 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer. 660 * 661 * The code that submits an spi_message (and its spi_transfers) 662 * to the lower layers is responsible for managing its memory. 663 * Zero-initialize every field you don't set up explicitly, to 664 * insulate against future API updates. After you submit a message 665 * and its transfers, ignore them until its completion callback. 666 */ 667 struct spi_transfer { 668 /* it's ok if tx_buf == rx_buf (right?) 669 * for MicroWire, one buffer must be null 670 * buffers must work with dma_*map_single() calls, unless 671 * spi_message.is_dma_mapped reports a pre-existing mapping 672 */ 673 const void *tx_buf; 674 void *rx_buf; 675 unsigned len; 676 677 dma_addr_t tx_dma; 678 dma_addr_t rx_dma; 679 struct sg_table tx_sg; 680 struct sg_table rx_sg; 681 682 unsigned cs_change:1; 683 unsigned tx_nbits:3; 684 unsigned rx_nbits:3; 685 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ 686 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ 687 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ 688 u8 bits_per_word; 689 u16 delay_usecs; 690 u32 speed_hz; 691 692 struct list_head transfer_list; 693 }; 694 695 /** 696 * struct spi_message - one multi-segment SPI transaction 697 * @transfers: list of transfer segments in this transaction 698 * @spi: SPI device to which the transaction is queued 699 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual 700 * addresses for each transfer buffer 701 * @complete: called to report transaction completions 702 * @context: the argument to complete() when it's called 703 * @frame_length: the total number of bytes in the message 704 * @actual_length: the total number of bytes that were transferred in all 705 * successful segments 706 * @status: zero for success, else negative errno 707 * @queue: for use by whichever driver currently owns the message 708 * @state: for use by whichever driver currently owns the message 709 * 710 * A @spi_message is used to execute an atomic sequence of data transfers, 711 * each represented by a struct spi_transfer. The sequence is "atomic" 712 * in the sense that no other spi_message may use that SPI bus until that 713 * sequence completes. On some systems, many such sequences can execute as 714 * as single programmed DMA transfer. On all systems, these messages are 715 * queued, and might complete after transactions to other devices. Messages 716 * sent to a given spi_device are always executed in FIFO order. 717 * 718 * The code that submits an spi_message (and its spi_transfers) 719 * to the lower layers is responsible for managing its memory. 720 * Zero-initialize every field you don't set up explicitly, to 721 * insulate against future API updates. After you submit a message 722 * and its transfers, ignore them until its completion callback. 723 */ 724 struct spi_message { 725 struct list_head transfers; 726 727 struct spi_device *spi; 728 729 unsigned is_dma_mapped:1; 730 731 /* REVISIT: we might want a flag affecting the behavior of the 732 * last transfer ... allowing things like "read 16 bit length L" 733 * immediately followed by "read L bytes". Basically imposing 734 * a specific message scheduling algorithm. 735 * 736 * Some controller drivers (message-at-a-time queue processing) 737 * could provide that as their default scheduling algorithm. But 738 * others (with multi-message pipelines) could need a flag to 739 * tell them about such special cases. 740 */ 741 742 /* completion is reported through a callback */ 743 void (*complete)(void *context); 744 void *context; 745 unsigned frame_length; 746 unsigned actual_length; 747 int status; 748 749 /* for optional use by whatever driver currently owns the 750 * spi_message ... between calls to spi_async and then later 751 * complete(), that's the spi_master controller driver. 752 */ 753 struct list_head queue; 754 void *state; 755 }; 756 757 static inline void spi_message_init(struct spi_message *m) 758 { 759 memset(m, 0, sizeof *m); 760 INIT_LIST_HEAD(&m->transfers); 761 } 762 763 static inline void 764 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) 765 { 766 list_add_tail(&t->transfer_list, &m->transfers); 767 } 768 769 static inline void 770 spi_transfer_del(struct spi_transfer *t) 771 { 772 list_del(&t->transfer_list); 773 } 774 775 /** 776 * spi_message_init_with_transfers - Initialize spi_message and append transfers 777 * @m: spi_message to be initialized 778 * @xfers: An array of spi transfers 779 * @num_xfers: Number of items in the xfer array 780 * 781 * This function initializes the given spi_message and adds each spi_transfer in 782 * the given array to the message. 783 */ 784 static inline void 785 spi_message_init_with_transfers(struct spi_message *m, 786 struct spi_transfer *xfers, unsigned int num_xfers) 787 { 788 unsigned int i; 789 790 spi_message_init(m); 791 for (i = 0; i < num_xfers; ++i) 792 spi_message_add_tail(&xfers[i], m); 793 } 794 795 /* It's fine to embed message and transaction structures in other data 796 * structures so long as you don't free them while they're in use. 797 */ 798 799 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) 800 { 801 struct spi_message *m; 802 803 m = kzalloc(sizeof(struct spi_message) 804 + ntrans * sizeof(struct spi_transfer), 805 flags); 806 if (m) { 807 unsigned i; 808 struct spi_transfer *t = (struct spi_transfer *)(m + 1); 809 810 INIT_LIST_HEAD(&m->transfers); 811 for (i = 0; i < ntrans; i++, t++) 812 spi_message_add_tail(t, m); 813 } 814 return m; 815 } 816 817 static inline void spi_message_free(struct spi_message *m) 818 { 819 kfree(m); 820 } 821 822 extern int spi_setup(struct spi_device *spi); 823 extern int spi_async(struct spi_device *spi, struct spi_message *message); 824 extern int spi_async_locked(struct spi_device *spi, 825 struct spi_message *message); 826 827 /*---------------------------------------------------------------------------*/ 828 829 /* All these synchronous SPI transfer routines are utilities layered 830 * over the core async transfer primitive. Here, "synchronous" means 831 * they will sleep uninterruptibly until the async transfer completes. 832 */ 833 834 extern int spi_sync(struct spi_device *spi, struct spi_message *message); 835 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message); 836 extern int spi_bus_lock(struct spi_master *master); 837 extern int spi_bus_unlock(struct spi_master *master); 838 839 /** 840 * spi_write - SPI synchronous write 841 * @spi: device to which data will be written 842 * @buf: data buffer 843 * @len: data buffer size 844 * Context: can sleep 845 * 846 * This writes the buffer and returns zero or a negative error code. 847 * Callable only from contexts that can sleep. 848 */ 849 static inline int 850 spi_write(struct spi_device *spi, const void *buf, size_t len) 851 { 852 struct spi_transfer t = { 853 .tx_buf = buf, 854 .len = len, 855 }; 856 struct spi_message m; 857 858 spi_message_init(&m); 859 spi_message_add_tail(&t, &m); 860 return spi_sync(spi, &m); 861 } 862 863 /** 864 * spi_read - SPI synchronous read 865 * @spi: device from which data will be read 866 * @buf: data buffer 867 * @len: data buffer size 868 * Context: can sleep 869 * 870 * This reads the buffer and returns zero or a negative error code. 871 * Callable only from contexts that can sleep. 872 */ 873 static inline int 874 spi_read(struct spi_device *spi, void *buf, size_t len) 875 { 876 struct spi_transfer t = { 877 .rx_buf = buf, 878 .len = len, 879 }; 880 struct spi_message m; 881 882 spi_message_init(&m); 883 spi_message_add_tail(&t, &m); 884 return spi_sync(spi, &m); 885 } 886 887 /** 888 * spi_sync_transfer - synchronous SPI data transfer 889 * @spi: device with which data will be exchanged 890 * @xfers: An array of spi_transfers 891 * @num_xfers: Number of items in the xfer array 892 * Context: can sleep 893 * 894 * Does a synchronous SPI data transfer of the given spi_transfer array. 895 * 896 * For more specific semantics see spi_sync(). 897 * 898 * It returns zero on success, else a negative error code. 899 */ 900 static inline int 901 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, 902 unsigned int num_xfers) 903 { 904 struct spi_message msg; 905 906 spi_message_init_with_transfers(&msg, xfers, num_xfers); 907 908 return spi_sync(spi, &msg); 909 } 910 911 /* this copies txbuf and rxbuf data; for small transfers only! */ 912 extern int spi_write_then_read(struct spi_device *spi, 913 const void *txbuf, unsigned n_tx, 914 void *rxbuf, unsigned n_rx); 915 916 /** 917 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read 918 * @spi: device with which data will be exchanged 919 * @cmd: command to be written before data is read back 920 * Context: can sleep 921 * 922 * This returns the (unsigned) eight bit number returned by the 923 * device, or else a negative error code. Callable only from 924 * contexts that can sleep. 925 */ 926 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) 927 { 928 ssize_t status; 929 u8 result; 930 931 status = spi_write_then_read(spi, &cmd, 1, &result, 1); 932 933 /* return negative errno or unsigned value */ 934 return (status < 0) ? status : result; 935 } 936 937 /** 938 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read 939 * @spi: device with which data will be exchanged 940 * @cmd: command to be written before data is read back 941 * Context: can sleep 942 * 943 * This returns the (unsigned) sixteen bit number returned by the 944 * device, or else a negative error code. Callable only from 945 * contexts that can sleep. 946 * 947 * The number is returned in wire-order, which is at least sometimes 948 * big-endian. 949 */ 950 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) 951 { 952 ssize_t status; 953 u16 result; 954 955 status = spi_write_then_read(spi, &cmd, 1, &result, 2); 956 957 /* return negative errno or unsigned value */ 958 return (status < 0) ? status : result; 959 } 960 961 /** 962 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read 963 * @spi: device with which data will be exchanged 964 * @cmd: command to be written before data is read back 965 * Context: can sleep 966 * 967 * This returns the (unsigned) sixteen bit number returned by the device in cpu 968 * endianness, or else a negative error code. Callable only from contexts that 969 * can sleep. 970 * 971 * This function is similar to spi_w8r16, with the exception that it will 972 * convert the read 16 bit data word from big-endian to native endianness. 973 * 974 */ 975 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) 976 977 { 978 ssize_t status; 979 __be16 result; 980 981 status = spi_write_then_read(spi, &cmd, 1, &result, 2); 982 if (status < 0) 983 return status; 984 985 return be16_to_cpu(result); 986 } 987 988 /*---------------------------------------------------------------------------*/ 989 990 /* 991 * INTERFACE between board init code and SPI infrastructure. 992 * 993 * No SPI driver ever sees these SPI device table segments, but 994 * it's how the SPI core (or adapters that get hotplugged) grows 995 * the driver model tree. 996 * 997 * As a rule, SPI devices can't be probed. Instead, board init code 998 * provides a table listing the devices which are present, with enough 999 * information to bind and set up the device's driver. There's basic 1000 * support for nonstatic configurations too; enough to handle adding 1001 * parport adapters, or microcontrollers acting as USB-to-SPI bridges. 1002 */ 1003 1004 /** 1005 * struct spi_board_info - board-specific template for a SPI device 1006 * @modalias: Initializes spi_device.modalias; identifies the driver. 1007 * @platform_data: Initializes spi_device.platform_data; the particular 1008 * data stored there is driver-specific. 1009 * @controller_data: Initializes spi_device.controller_data; some 1010 * controllers need hints about hardware setup, e.g. for DMA. 1011 * @irq: Initializes spi_device.irq; depends on how the board is wired. 1012 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits 1013 * from the chip datasheet and board-specific signal quality issues. 1014 * @bus_num: Identifies which spi_master parents the spi_device; unused 1015 * by spi_new_device(), and otherwise depends on board wiring. 1016 * @chip_select: Initializes spi_device.chip_select; depends on how 1017 * the board is wired. 1018 * @mode: Initializes spi_device.mode; based on the chip datasheet, board 1019 * wiring (some devices support both 3WIRE and standard modes), and 1020 * possibly presence of an inverter in the chipselect path. 1021 * 1022 * When adding new SPI devices to the device tree, these structures serve 1023 * as a partial device template. They hold information which can't always 1024 * be determined by drivers. Information that probe() can establish (such 1025 * as the default transfer wordsize) is not included here. 1026 * 1027 * These structures are used in two places. Their primary role is to 1028 * be stored in tables of board-specific device descriptors, which are 1029 * declared early in board initialization and then used (much later) to 1030 * populate a controller's device tree after the that controller's driver 1031 * initializes. A secondary (and atypical) role is as a parameter to 1032 * spi_new_device() call, which happens after those controller drivers 1033 * are active in some dynamic board configuration models. 1034 */ 1035 struct spi_board_info { 1036 /* the device name and module name are coupled, like platform_bus; 1037 * "modalias" is normally the driver name. 1038 * 1039 * platform_data goes to spi_device.dev.platform_data, 1040 * controller_data goes to spi_device.controller_data, 1041 * irq is copied too 1042 */ 1043 char modalias[SPI_NAME_SIZE]; 1044 const void *platform_data; 1045 void *controller_data; 1046 int irq; 1047 1048 /* slower signaling on noisy or low voltage boards */ 1049 u32 max_speed_hz; 1050 1051 1052 /* bus_num is board specific and matches the bus_num of some 1053 * spi_master that will probably be registered later. 1054 * 1055 * chip_select reflects how this chip is wired to that master; 1056 * it's less than num_chipselect. 1057 */ 1058 u16 bus_num; 1059 u16 chip_select; 1060 1061 /* mode becomes spi_device.mode, and is essential for chips 1062 * where the default of SPI_CS_HIGH = 0 is wrong. 1063 */ 1064 u16 mode; 1065 1066 /* ... may need additional spi_device chip config data here. 1067 * avoid stuff protocol drivers can set; but include stuff 1068 * needed to behave without being bound to a driver: 1069 * - quirks like clock rate mattering when not selected 1070 */ 1071 }; 1072 1073 #ifdef CONFIG_SPI 1074 extern int 1075 spi_register_board_info(struct spi_board_info const *info, unsigned n); 1076 #else 1077 /* board init code may ignore whether SPI is configured or not */ 1078 static inline int 1079 spi_register_board_info(struct spi_board_info const *info, unsigned n) 1080 { return 0; } 1081 #endif 1082 1083 1084 /* If you're hotplugging an adapter with devices (parport, usb, etc) 1085 * use spi_new_device() to describe each device. You can also call 1086 * spi_unregister_device() to start making that device vanish, but 1087 * normally that would be handled by spi_unregister_master(). 1088 * 1089 * You can also use spi_alloc_device() and spi_add_device() to use a two 1090 * stage registration sequence for each spi_device. This gives the caller 1091 * some more control over the spi_device structure before it is registered, 1092 * but requires that caller to initialize fields that would otherwise 1093 * be defined using the board info. 1094 */ 1095 extern struct spi_device * 1096 spi_alloc_device(struct spi_master *master); 1097 1098 extern int 1099 spi_add_device(struct spi_device *spi); 1100 1101 extern struct spi_device * 1102 spi_new_device(struct spi_master *, struct spi_board_info *); 1103 1104 static inline void 1105 spi_unregister_device(struct spi_device *spi) 1106 { 1107 if (spi) 1108 device_unregister(&spi->dev); 1109 } 1110 1111 extern const struct spi_device_id * 1112 spi_get_device_id(const struct spi_device *sdev); 1113 1114 static inline bool 1115 spi_transfer_is_last(struct spi_master *master, struct spi_transfer *xfer) 1116 { 1117 return list_is_last(&xfer->transfer_list, &master->cur_msg->transfers); 1118 } 1119 1120 #endif /* __LINUX_SPI_H */ 1121