1392f1045SVinod Koul /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2392f1045SVinod Koul /* Copyright(c) 2015-17 Intel Corporation. */
371bb8a1bSVinod Koul 
471bb8a1bSVinod Koul #ifndef __SDW_INTEL_H
571bb8a1bSVinod Koul #define __SDW_INTEL_H
671bb8a1bSVinod Koul 
76cd1d670SBard Liao #include <linux/irqreturn.h>
86cd1d670SBard Liao 
971bb8a1bSVinod Koul /**
104b206d34SRander Wang  * struct sdw_intel_stream_params_data: configuration passed during
114b206d34SRander Wang  * the @params_stream callback, e.g. for interaction with DSP
124b206d34SRander Wang  * firmware.
134b206d34SRander Wang  */
144b206d34SRander Wang struct sdw_intel_stream_params_data {
154b206d34SRander Wang 	struct snd_pcm_substream *substream;
164b206d34SRander Wang 	struct snd_soc_dai *dai;
174b206d34SRander Wang 	struct snd_pcm_hw_params *hw_params;
184b206d34SRander Wang 	int link_id;
194b206d34SRander Wang 	int alh_stream_id;
204b206d34SRander Wang };
214b206d34SRander Wang 
224b206d34SRander Wang /**
234b206d34SRander Wang  * struct sdw_intel_stream_free_data: configuration passed during
244b206d34SRander Wang  * the @free_stream callback, e.g. for interaction with DSP
254b206d34SRander Wang  * firmware.
264b206d34SRander Wang  */
274b206d34SRander Wang struct sdw_intel_stream_free_data {
284b206d34SRander Wang 	struct snd_pcm_substream *substream;
294b206d34SRander Wang 	struct snd_soc_dai *dai;
304b206d34SRander Wang 	int link_id;
314b206d34SRander Wang };
324b206d34SRander Wang 
334b206d34SRander Wang /**
34c46302ecSVinod Koul  * struct sdw_intel_ops: Intel audio driver callback ops
35c46302ecSVinod Koul  *
36c46302ecSVinod Koul  */
37c46302ecSVinod Koul struct sdw_intel_ops {
384b206d34SRander Wang 	int (*params_stream)(struct device *dev,
394b206d34SRander Wang 			     struct sdw_intel_stream_params_data *params_data);
404b206d34SRander Wang 	int (*free_stream)(struct device *dev,
414b206d34SRander Wang 			   struct sdw_intel_stream_free_data *free_data);
42c46302ecSVinod Koul };
43c46302ecSVinod Koul 
44c46302ecSVinod Koul /**
45f98f690fSPierre-Louis Bossart  * struct sdw_intel_acpi_info - Soundwire Intel information found in ACPI tables
46f98f690fSPierre-Louis Bossart  * @handle: ACPI controller handle
47f98f690fSPierre-Louis Bossart  * @count: link count found with "sdw-master-count" property
48f98f690fSPierre-Louis Bossart  * @link_mask: bit-wise mask listing links enabled by BIOS menu
49f98f690fSPierre-Louis Bossart  *
50f98f690fSPierre-Louis Bossart  * this structure could be expanded to e.g. provide all the _ADR
51f98f690fSPierre-Louis Bossart  * information in case the link_mask is not sufficient to identify
52f98f690fSPierre-Louis Bossart  * platform capabilities.
53f98f690fSPierre-Louis Bossart  */
54f98f690fSPierre-Louis Bossart struct sdw_intel_acpi_info {
55f98f690fSPierre-Louis Bossart 	acpi_handle handle;
56f98f690fSPierre-Louis Bossart 	int count;
57f98f690fSPierre-Louis Bossart 	u32 link_mask;
58f98f690fSPierre-Louis Bossart };
59f98f690fSPierre-Louis Bossart 
60f98f690fSPierre-Louis Bossart struct sdw_intel_link_res;
61f98f690fSPierre-Louis Bossart 
6209f6a72dSPierre-Louis Bossart /* Intel clock-stop/pm_runtime quirk definitions */
6309f6a72dSPierre-Louis Bossart 
6409f6a72dSPierre-Louis Bossart /*
6509f6a72dSPierre-Louis Bossart  * Force the clock to remain on during pm_runtime suspend. This might
6609f6a72dSPierre-Louis Bossart  * be needed if Slave devices do not have an alternate clock source or
6709f6a72dSPierre-Louis Bossart  * if the latency requirements are very strict.
6809f6a72dSPierre-Louis Bossart  */
6909f6a72dSPierre-Louis Bossart #define SDW_INTEL_CLK_STOP_NOT_ALLOWED		BIT(0)
7009f6a72dSPierre-Louis Bossart 
7109f6a72dSPierre-Louis Bossart /*
7209f6a72dSPierre-Louis Bossart  * Stop the bus during pm_runtime suspend. If set, a complete bus
7309f6a72dSPierre-Louis Bossart  * reset and re-enumeration will be performed when the bus
7409f6a72dSPierre-Louis Bossart  * restarts. This mode shall not be used if Slave devices can generate
7509f6a72dSPierre-Louis Bossart  * in-band wakes.
7609f6a72dSPierre-Louis Bossart  */
7709f6a72dSPierre-Louis Bossart #define SDW_INTEL_CLK_STOP_TEARDOWN		BIT(1)
7809f6a72dSPierre-Louis Bossart 
7909f6a72dSPierre-Louis Bossart /*
8009f6a72dSPierre-Louis Bossart  * Stop the bus during pm_suspend if Slaves are not wake capable
8109f6a72dSPierre-Louis Bossart  * (e.g. speaker amplifiers). The clock-stop mode is typically
8209f6a72dSPierre-Louis Bossart  * slightly higher power than when the IP is completely powered-off.
8309f6a72dSPierre-Louis Bossart  */
8409f6a72dSPierre-Louis Bossart #define SDW_INTEL_CLK_STOP_WAKE_CAPABLE_ONLY	BIT(2)
8509f6a72dSPierre-Louis Bossart 
8609f6a72dSPierre-Louis Bossart /*
8709f6a72dSPierre-Louis Bossart  * Require a bus reset (and complete re-enumeration) when exiting
8809f6a72dSPierre-Louis Bossart  * clock stop modes. This may be needed if the controller power was
8909f6a72dSPierre-Louis Bossart  * turned off and all context lost. This quirk shall not be used if a
9009f6a72dSPierre-Louis Bossart  * Slave device needs to remain enumerated and keep its context,
9109f6a72dSPierre-Louis Bossart  * e.g. to provide the reasons for the wake, report acoustic events or
9209f6a72dSPierre-Louis Bossart  * pass a history buffer.
9309f6a72dSPierre-Louis Bossart  */
9409f6a72dSPierre-Louis Bossart #define SDW_INTEL_CLK_STOP_BUS_RESET		BIT(3)
9509f6a72dSPierre-Louis Bossart 
96f98f690fSPierre-Louis Bossart /**
97f98f690fSPierre-Louis Bossart  * struct sdw_intel_ctx - context allocated by the controller
98f98f690fSPierre-Louis Bossart  * driver probe
99f98f690fSPierre-Louis Bossart  * @count: link count
100f98f690fSPierre-Louis Bossart  * @mmio_base: mmio base of SoundWire registers, only used to check
101f98f690fSPierre-Louis Bossart  * hardware capabilities after all power dependencies are settled.
102f98f690fSPierre-Louis Bossart  * @link_mask: bit-wise mask listing SoundWire links reported by the
103f98f690fSPierre-Louis Bossart  * Controller
104f98f690fSPierre-Louis Bossart  * @handle: ACPI parent handle
105f98f690fSPierre-Louis Bossart  * @links: information for each link (controller-specific and kept
106f98f690fSPierre-Louis Bossart  * opaque here)
107eae0b60dSBard Liao  * @link_list: list to handle interrupts across all links
1084da0680fSPierre-Louis Bossart  * @shim_lock: mutex to handle concurrent rmw access to shared SHIM registers.
109f98f690fSPierre-Louis Bossart  */
110f98f690fSPierre-Louis Bossart struct sdw_intel_ctx {
111f98f690fSPierre-Louis Bossart 	int count;
112f98f690fSPierre-Louis Bossart 	void __iomem *mmio_base;
113f98f690fSPierre-Louis Bossart 	u32 link_mask;
114f98f690fSPierre-Louis Bossart 	acpi_handle handle;
115f98f690fSPierre-Louis Bossart 	struct sdw_intel_link_res *links;
116eae0b60dSBard Liao 	struct list_head link_list;
1174da0680fSPierre-Louis Bossart 	struct mutex shim_lock; /* lock for access to shared SHIM registers */
118f98f690fSPierre-Louis Bossart };
119f98f690fSPierre-Louis Bossart 
120f98f690fSPierre-Louis Bossart /**
121f98f690fSPierre-Louis Bossart  * struct sdw_intel_res - Soundwire Intel global resource structure,
122f98f690fSPierre-Louis Bossart  * typically populated by the DSP driver
123f98f690fSPierre-Louis Bossart  *
124f98f690fSPierre-Louis Bossart  * @count: link count
12571bb8a1bSVinod Koul  * @mmio_base: mmio base of SoundWire registers
12671bb8a1bSVinod Koul  * @irq: interrupt number
12771bb8a1bSVinod Koul  * @handle: ACPI parent handle
12871bb8a1bSVinod Koul  * @parent: parent device
129c46302ecSVinod Koul  * @ops: callback ops
130f98f690fSPierre-Louis Bossart  * @dev: device implementing hwparams and free callbacks
131f98f690fSPierre-Louis Bossart  * @link_mask: bit-wise mask listing links selected by the DSP driver
132f98f690fSPierre-Louis Bossart  * This mask may be a subset of the one reported by the controller since
133f98f690fSPierre-Louis Bossart  * machine-specific quirks are handled in the DSP driver.
13409f6a72dSPierre-Louis Bossart  * @clock_stop_quirks: mask array of possible behaviors requested by the
13509f6a72dSPierre-Louis Bossart  * DSP driver. The quirks are common for all links for now.
13671bb8a1bSVinod Koul  */
13771bb8a1bSVinod Koul struct sdw_intel_res {
138f98f690fSPierre-Louis Bossart 	int count;
13971bb8a1bSVinod Koul 	void __iomem *mmio_base;
14071bb8a1bSVinod Koul 	int irq;
14171bb8a1bSVinod Koul 	acpi_handle handle;
14271bb8a1bSVinod Koul 	struct device *parent;
143c46302ecSVinod Koul 	const struct sdw_intel_ops *ops;
144f98f690fSPierre-Louis Bossart 	struct device *dev;
145f98f690fSPierre-Louis Bossart 	u32 link_mask;
14609f6a72dSPierre-Louis Bossart 	u32 clock_stop_quirks;
14771bb8a1bSVinod Koul };
14871bb8a1bSVinod Koul 
149f98f690fSPierre-Louis Bossart /*
150f98f690fSPierre-Louis Bossart  * On Intel platforms, the SoundWire IP has dependencies on power
151f98f690fSPierre-Louis Bossart  * rails shared with the DSP, and the initialization steps are split
152f98f690fSPierre-Louis Bossart  * in three. First an ACPI scan to check what the firmware describes
153f98f690fSPierre-Louis Bossart  * in DSDT tables, then an allocation step (with no hardware
154f98f690fSPierre-Louis Bossart  * configuration but with all the relevant devices created) and last
155f98f690fSPierre-Louis Bossart  * the actual hardware configuration. The final stage is a global
156f98f690fSPierre-Louis Bossart  * interrupt enable which is controlled by the DSP driver. Splitting
157f98f690fSPierre-Louis Bossart  * these phases helps simplify the boot flow and make early decisions
158f98f690fSPierre-Louis Bossart  * on e.g. which machine driver to select (I2S mode, HDaudio or
159f98f690fSPierre-Louis Bossart  * SoundWire).
160f98f690fSPierre-Louis Bossart  */
161f98f690fSPierre-Louis Bossart int sdw_intel_acpi_scan(acpi_handle *parent_handle,
162f98f690fSPierre-Louis Bossart 			struct sdw_intel_acpi_info *info);
163f98f690fSPierre-Louis Bossart 
164905b5a81SRander Wang void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx);
165905b5a81SRander Wang 
166f98f690fSPierre-Louis Bossart struct sdw_intel_ctx *
167f98f690fSPierre-Louis Bossart sdw_intel_probe(struct sdw_intel_res *res);
168f98f690fSPierre-Louis Bossart 
169f98f690fSPierre-Louis Bossart int sdw_intel_startup(struct sdw_intel_ctx *ctx);
170f98f690fSPierre-Louis Bossart 
171f98f690fSPierre-Louis Bossart void sdw_intel_exit(struct sdw_intel_ctx *ctx);
172f98f690fSPierre-Louis Bossart 
173f98f690fSPierre-Louis Bossart void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable);
174d62a7d41SVinod Koul 
1756cd1d670SBard Liao irqreturn_t sdw_intel_thread(int irq, void *dev_id);
1766cd1d670SBard Liao 
17771bb8a1bSVinod Koul #endif
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