19dc03ffdSArnd Bergmann /* SPDX-License-Identifier: GPL-2.0-or-later */
29dc03ffdSArnd Bergmann /*
39dc03ffdSArnd Bergmann  * Author: Kevin Wells <kevin.wells@nxp.com>
49dc03ffdSArnd Bergmann  *
59dc03ffdSArnd Bergmann  * Copyright (C) 2010 NXP Semiconductors
69dc03ffdSArnd Bergmann  */
79dc03ffdSArnd Bergmann 
89dc03ffdSArnd Bergmann #ifndef __SOC_LPC32XX_MISC_H
99dc03ffdSArnd Bergmann #define __SOC_LPC32XX_MISC_H
109dc03ffdSArnd Bergmann 
119dc03ffdSArnd Bergmann #include <linux/types.h>
12ecca1a62SArnd Bergmann #include <linux/phy.h>
139dc03ffdSArnd Bergmann 
149dc03ffdSArnd Bergmann #ifdef CONFIG_ARCH_LPC32XX
159dc03ffdSArnd Bergmann extern u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr);
16ecca1a62SArnd Bergmann extern void lpc32xx_set_phy_interface_mode(phy_interface_t mode);
17ffba29c9SArnd Bergmann extern void lpc32xx_loopback_set(resource_size_t mapbase, int state);
189dc03ffdSArnd Bergmann #else
lpc32xx_return_iram(void __iomem ** mapbase,dma_addr_t * dmaaddr)199dc03ffdSArnd Bergmann static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr)
209dc03ffdSArnd Bergmann {
219dc03ffdSArnd Bergmann 	*mapbase = NULL;
229dc03ffdSArnd Bergmann 	*dmaaddr = 0;
239dc03ffdSArnd Bergmann 	return 0;
249dc03ffdSArnd Bergmann }
lpc32xx_set_phy_interface_mode(phy_interface_t mode)25ecca1a62SArnd Bergmann static inline void lpc32xx_set_phy_interface_mode(phy_interface_t mode)
26ecca1a62SArnd Bergmann {
27ecca1a62SArnd Bergmann }
lpc32xx_loopback_set(resource_size_t mapbase,int state)28ffba29c9SArnd Bergmann static inline void lpc32xx_loopback_set(resource_size_t mapbase, int state)
29ffba29c9SArnd Bergmann {
30ffba29c9SArnd Bergmann }
319dc03ffdSArnd Bergmann #endif
329dc03ffdSArnd Bergmann 
339dc03ffdSArnd Bergmann #endif  /* __SOC_LPC32XX_MISC_H */
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