1804775dfSFelix Fietkau #ifndef __MTK_WED_H 2804775dfSFelix Fietkau #define __MTK_WED_H 3804775dfSFelix Fietkau 4804775dfSFelix Fietkau #include <linux/kernel.h> 5804775dfSFelix Fietkau #include <linux/rcupdate.h> 6804775dfSFelix Fietkau #include <linux/regmap.h> 7804775dfSFelix Fietkau #include <linux/pci.h> 8804775dfSFelix Fietkau 9804775dfSFelix Fietkau #define MTK_WED_TX_QUEUES 2 10*084d60ceSLorenzo Bianconi #define MTK_WED_RX_QUEUES 2 11804775dfSFelix Fietkau 12804775dfSFelix Fietkau struct mtk_wed_hw; 13804775dfSFelix Fietkau struct mtk_wdma_desc; 14804775dfSFelix Fietkau 15cc514101SSujuan Chen enum mtk_wed_wo_cmd { 16cc514101SSujuan Chen MTK_WED_WO_CMD_WED_CFG, 17cc514101SSujuan Chen MTK_WED_WO_CMD_WED_RX_STAT, 18cc514101SSujuan Chen MTK_WED_WO_CMD_RRO_SER, 19cc514101SSujuan Chen MTK_WED_WO_CMD_DBG_INFO, 20cc514101SSujuan Chen MTK_WED_WO_CMD_DEV_INFO, 21cc514101SSujuan Chen MTK_WED_WO_CMD_BSS_INFO, 22cc514101SSujuan Chen MTK_WED_WO_CMD_STA_REC, 23cc514101SSujuan Chen MTK_WED_WO_CMD_DEV_INFO_DUMP, 24cc514101SSujuan Chen MTK_WED_WO_CMD_BSS_INFO_DUMP, 25cc514101SSujuan Chen MTK_WED_WO_CMD_STA_REC_DUMP, 26cc514101SSujuan Chen MTK_WED_WO_CMD_BA_INFO_DUMP, 27cc514101SSujuan Chen MTK_WED_WO_CMD_FBCMD_Q_DUMP, 28cc514101SSujuan Chen MTK_WED_WO_CMD_FW_LOG_CTRL, 29cc514101SSujuan Chen MTK_WED_WO_CMD_LOG_FLUSH, 30cc514101SSujuan Chen MTK_WED_WO_CMD_CHANGE_STATE, 31cc514101SSujuan Chen MTK_WED_WO_CMD_CPU_STATS_ENABLE, 32cc514101SSujuan Chen MTK_WED_WO_CMD_CPU_STATS_DUMP, 33cc514101SSujuan Chen MTK_WED_WO_CMD_EXCEPTION_INIT, 34cc514101SSujuan Chen MTK_WED_WO_CMD_PROF_CTRL, 35cc514101SSujuan Chen MTK_WED_WO_CMD_STA_BA_DUMP, 36cc514101SSujuan Chen MTK_WED_WO_CMD_BA_CTRL_DUMP, 37cc514101SSujuan Chen MTK_WED_WO_CMD_RXCNT_CTRL, 38cc514101SSujuan Chen MTK_WED_WO_CMD_RXCNT_INFO, 39cc514101SSujuan Chen MTK_WED_WO_CMD_SET_CAP, 40cc514101SSujuan Chen MTK_WED_WO_CMD_CCIF_RING_DUMP, 41cc514101SSujuan Chen MTK_WED_WO_CMD_WED_END 42cc514101SSujuan Chen }; 43cc514101SSujuan Chen 442b2ba3ecSLorenzo Bianconi enum mtk_wed_bus_tye { 452b2ba3ecSLorenzo Bianconi MTK_WED_BUS_PCIE, 462b2ba3ecSLorenzo Bianconi MTK_WED_BUS_AXI, 472b2ba3ecSLorenzo Bianconi }; 482b2ba3ecSLorenzo Bianconi 49804775dfSFelix Fietkau struct mtk_wed_ring { 50804775dfSFelix Fietkau struct mtk_wdma_desc *desc; 51804775dfSFelix Fietkau dma_addr_t desc_phys; 52de84a090SLorenzo Bianconi u32 desc_size; 53804775dfSFelix Fietkau int size; 54804775dfSFelix Fietkau 55804775dfSFelix Fietkau u32 reg_base; 56804775dfSFelix Fietkau void __iomem *wpdma; 57804775dfSFelix Fietkau }; 58804775dfSFelix Fietkau 59804775dfSFelix Fietkau struct mtk_wed_device { 60804775dfSFelix Fietkau #ifdef CONFIG_NET_MEDIATEK_SOC_WED 61804775dfSFelix Fietkau const struct mtk_wed_ops *ops; 62804775dfSFelix Fietkau struct device *dev; 63804775dfSFelix Fietkau struct mtk_wed_hw *hw; 64804775dfSFelix Fietkau bool init_done, running; 65804775dfSFelix Fietkau int wdma_idx; 66804775dfSFelix Fietkau int irq; 67804775dfSFelix Fietkau 68804775dfSFelix Fietkau struct mtk_wed_ring tx_ring[MTK_WED_TX_QUEUES]; 69804775dfSFelix Fietkau struct mtk_wed_ring txfree_ring; 70*084d60ceSLorenzo Bianconi struct mtk_wed_ring rx_wdma[MTK_WED_RX_QUEUES]; 71804775dfSFelix Fietkau 72804775dfSFelix Fietkau struct { 73804775dfSFelix Fietkau int size; 74804775dfSFelix Fietkau void **pages; 75804775dfSFelix Fietkau struct mtk_wdma_desc *desc; 76804775dfSFelix Fietkau dma_addr_t desc_phys; 77804775dfSFelix Fietkau } buf_ring; 78804775dfSFelix Fietkau 79804775dfSFelix Fietkau /* filled by driver: */ 80804775dfSFelix Fietkau struct { 812b2ba3ecSLorenzo Bianconi union { 822b2ba3ecSLorenzo Bianconi struct platform_device *platform_dev; 83804775dfSFelix Fietkau struct pci_dev *pci_dev; 842b2ba3ecSLorenzo Bianconi }; 852b2ba3ecSLorenzo Bianconi enum mtk_wed_bus_tye bus_type; 86804775dfSFelix Fietkau 87804775dfSFelix Fietkau u32 wpdma_phys; 88de84a090SLorenzo Bianconi u32 wpdma_int; 89de84a090SLorenzo Bianconi u32 wpdma_mask; 90de84a090SLorenzo Bianconi u32 wpdma_tx; 91de84a090SLorenzo Bianconi u32 wpdma_txfree; 92804775dfSFelix Fietkau 93804775dfSFelix Fietkau u16 token_start; 94804775dfSFelix Fietkau unsigned int nbuf; 95804775dfSFelix Fietkau 96de84a090SLorenzo Bianconi u8 tx_tbit[MTK_WED_TX_QUEUES]; 97de84a090SLorenzo Bianconi u8 txfree_tbit; 98de84a090SLorenzo Bianconi 99804775dfSFelix Fietkau u32 (*init_buf)(void *ptr, dma_addr_t phys, int token_id); 100804775dfSFelix Fietkau int (*offload_enable)(struct mtk_wed_device *wed); 101804775dfSFelix Fietkau void (*offload_disable)(struct mtk_wed_device *wed); 102804775dfSFelix Fietkau } wlan; 103804775dfSFelix Fietkau #endif 104804775dfSFelix Fietkau }; 105804775dfSFelix Fietkau 106804775dfSFelix Fietkau struct mtk_wed_ops { 107804775dfSFelix Fietkau int (*attach)(struct mtk_wed_device *dev); 108804775dfSFelix Fietkau int (*tx_ring_setup)(struct mtk_wed_device *dev, int ring, 109804775dfSFelix Fietkau void __iomem *regs); 110804775dfSFelix Fietkau int (*txfree_ring_setup)(struct mtk_wed_device *dev, 111804775dfSFelix Fietkau void __iomem *regs); 112804775dfSFelix Fietkau void (*detach)(struct mtk_wed_device *dev); 113804775dfSFelix Fietkau 114804775dfSFelix Fietkau void (*stop)(struct mtk_wed_device *dev); 115804775dfSFelix Fietkau void (*start)(struct mtk_wed_device *dev, u32 irq_mask); 116804775dfSFelix Fietkau void (*reset_dma)(struct mtk_wed_device *dev); 117804775dfSFelix Fietkau 118804775dfSFelix Fietkau u32 (*reg_read)(struct mtk_wed_device *dev, u32 reg); 119804775dfSFelix Fietkau void (*reg_write)(struct mtk_wed_device *dev, u32 reg, u32 val); 120804775dfSFelix Fietkau 121804775dfSFelix Fietkau u32 (*irq_get)(struct mtk_wed_device *dev, u32 mask); 122804775dfSFelix Fietkau void (*irq_set_mask)(struct mtk_wed_device *dev, u32 mask); 123804775dfSFelix Fietkau }; 124804775dfSFelix Fietkau 125804775dfSFelix Fietkau extern const struct mtk_wed_ops __rcu *mtk_soc_wed_ops; 126804775dfSFelix Fietkau 127804775dfSFelix Fietkau static inline int 128804775dfSFelix Fietkau mtk_wed_device_attach(struct mtk_wed_device *dev) 129804775dfSFelix Fietkau { 130804775dfSFelix Fietkau int ret = -ENODEV; 131804775dfSFelix Fietkau 132804775dfSFelix Fietkau #ifdef CONFIG_NET_MEDIATEK_SOC_WED 133804775dfSFelix Fietkau rcu_read_lock(); 134804775dfSFelix Fietkau dev->ops = rcu_dereference(mtk_soc_wed_ops); 135804775dfSFelix Fietkau if (dev->ops) 136804775dfSFelix Fietkau ret = dev->ops->attach(dev); 137804775dfSFelix Fietkau else 138804775dfSFelix Fietkau rcu_read_unlock(); 139804775dfSFelix Fietkau 140804775dfSFelix Fietkau if (ret) 141804775dfSFelix Fietkau dev->ops = NULL; 142804775dfSFelix Fietkau #endif 143804775dfSFelix Fietkau 144804775dfSFelix Fietkau return ret; 145804775dfSFelix Fietkau } 146804775dfSFelix Fietkau 147804775dfSFelix Fietkau #ifdef CONFIG_NET_MEDIATEK_SOC_WED 148804775dfSFelix Fietkau #define mtk_wed_device_active(_dev) !!(_dev)->ops 149804775dfSFelix Fietkau #define mtk_wed_device_detach(_dev) (_dev)->ops->detach(_dev) 150804775dfSFelix Fietkau #define mtk_wed_device_start(_dev, _mask) (_dev)->ops->start(_dev, _mask) 151804775dfSFelix Fietkau #define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs) \ 152804775dfSFelix Fietkau (_dev)->ops->tx_ring_setup(_dev, _ring, _regs) 153804775dfSFelix Fietkau #define mtk_wed_device_txfree_ring_setup(_dev, _regs) \ 154804775dfSFelix Fietkau (_dev)->ops->txfree_ring_setup(_dev, _regs) 155804775dfSFelix Fietkau #define mtk_wed_device_reg_read(_dev, _reg) \ 156804775dfSFelix Fietkau (_dev)->ops->reg_read(_dev, _reg) 157804775dfSFelix Fietkau #define mtk_wed_device_reg_write(_dev, _reg, _val) \ 158804775dfSFelix Fietkau (_dev)->ops->reg_write(_dev, _reg, _val) 159804775dfSFelix Fietkau #define mtk_wed_device_irq_get(_dev, _mask) \ 160804775dfSFelix Fietkau (_dev)->ops->irq_get(_dev, _mask) 161804775dfSFelix Fietkau #define mtk_wed_device_irq_set_mask(_dev, _mask) \ 162804775dfSFelix Fietkau (_dev)->ops->irq_set_mask(_dev, _mask) 163804775dfSFelix Fietkau #else 164804775dfSFelix Fietkau static inline bool mtk_wed_device_active(struct mtk_wed_device *dev) 165804775dfSFelix Fietkau { 166804775dfSFelix Fietkau return false; 167804775dfSFelix Fietkau } 168804775dfSFelix Fietkau #define mtk_wed_device_detach(_dev) do {} while (0) 169804775dfSFelix Fietkau #define mtk_wed_device_start(_dev, _mask) do {} while (0) 170804775dfSFelix Fietkau #define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs) -ENODEV 171804775dfSFelix Fietkau #define mtk_wed_device_txfree_ring_setup(_dev, _ring, _regs) -ENODEV 172804775dfSFelix Fietkau #define mtk_wed_device_reg_read(_dev, _reg) 0 173804775dfSFelix Fietkau #define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0) 174804775dfSFelix Fietkau #define mtk_wed_device_irq_get(_dev, _mask) 0 175804775dfSFelix Fietkau #define mtk_wed_device_irq_set_mask(_dev, _mask) do {} while (0) 176804775dfSFelix Fietkau #endif 177804775dfSFelix Fietkau 178804775dfSFelix Fietkau #endif 179