xref: /openbmc/linux/include/linux/serial_sci.h (revision afb46f79)
1 #ifndef __LINUX_SERIAL_SCI_H
2 #define __LINUX_SERIAL_SCI_H
3 
4 #include <linux/serial_core.h>
5 #include <linux/sh_dma.h>
6 
7 /*
8  * Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts)
9  */
10 
11 #define SCIx_NOT_SUPPORTED	(-1)
12 
13 /* SCSMR (Serial Mode Register) */
14 #define SCSMR_CHR	(1 << 6)	/* 7-bit Character Length */
15 #define SCSMR_PE	(1 << 5)	/* Parity Enable */
16 #define SCSMR_ODD	(1 << 4)	/* Odd Parity */
17 #define SCSMR_STOP	(1 << 3)	/* Stop Bit Length */
18 #define SCSMR_CKS	0x0003		/* Clock Select */
19 
20 /* Serial Control Register (@ = not supported by all parts) */
21 #define SCSCR_TIE	(1 << 7)	/* Transmit Interrupt Enable */
22 #define SCSCR_RIE	(1 << 6)	/* Receive Interrupt Enable */
23 #define SCSCR_TE	(1 << 5)	/* Transmit Enable */
24 #define SCSCR_RE	(1 << 4)	/* Receive Enable */
25 #define SCSCR_REIE	(1 << 3)	/* Receive Error Interrupt Enable @ */
26 #define SCSCR_TOIE	(1 << 2)	/* Timeout Interrupt Enable @ */
27 #define SCSCR_CKE1	(1 << 1)	/* Clock Enable 1 */
28 #define SCSCR_CKE0	(1 << 0)	/* Clock Enable 0 */
29 /* SCIFA/SCIFB only */
30 #define SCSCR_TDRQE	(1 << 15)	/* Tx Data Transfer Request Enable */
31 #define SCSCR_RDRQE	(1 << 14)	/* Rx Data Transfer Request Enable */
32 
33 /* SCxSR (Serial Status Register) on SCI */
34 #define SCI_TDRE  0x80			/* Transmit Data Register Empty */
35 #define SCI_RDRF  0x40			/* Receive Data Register Full */
36 #define SCI_ORER  0x20			/* Overrun Error */
37 #define SCI_FER   0x10			/* Framing Error */
38 #define SCI_PER   0x08			/* Parity Error */
39 #define SCI_TEND  0x04			/* Transmit End */
40 
41 #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER)
42 
43 /* SCxSR (Serial Status Register) on SCIF, HSCIF */
44 #define SCIF_ER    0x0080		/* Receive Error */
45 #define SCIF_TEND  0x0040		/* Transmission End */
46 #define SCIF_TDFE  0x0020		/* Transmit FIFO Data Empty */
47 #define SCIF_BRK   0x0010		/* Break Detect */
48 #define SCIF_FER   0x0008		/* Framing Error */
49 #define SCIF_PER   0x0004		/* Parity Error */
50 #define SCIF_RDF   0x0002		/* Receive FIFO Data Full */
51 #define SCIF_DR    0x0001		/* Receive Data Ready */
52 
53 #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
54 
55 /* SCFCR (FIFO Control Register) */
56 #define SCFCR_LOOP	(1 << 0)	/* Loopback Test */
57 
58 /* SCSPTR (Serial Port Register), optional */
59 #define SCSPTR_RTSIO	(1 << 7)	/* Serial Port RTS Pin Input/Output */
60 #define SCSPTR_CTSIO	(1 << 5)	/* Serial Port CTS Pin Input/Output */
61 #define SCSPTR_SPB2IO	(1 << 1)	/* Serial Port Break Input/Output */
62 #define SCSPTR_SPB2DT	(1 << 0)	/* Serial Port Break Data */
63 
64 /* HSSRR HSCIF */
65 #define HSCIF_SRE	0x8000		/* Sampling Rate Register Enable */
66 
67 enum {
68 	SCIx_PROBE_REGTYPE,
69 
70 	SCIx_SCI_REGTYPE,
71 	SCIx_IRDA_REGTYPE,
72 	SCIx_SCIFA_REGTYPE,
73 	SCIx_SCIFB_REGTYPE,
74 	SCIx_SH2_SCIF_FIFODATA_REGTYPE,
75 	SCIx_SH3_SCIF_REGTYPE,
76 	SCIx_SH4_SCIF_REGTYPE,
77 	SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
78 	SCIx_SH4_SCIF_FIFODATA_REGTYPE,
79 	SCIx_SH7705_SCIF_REGTYPE,
80 	SCIx_HSCIF_REGTYPE,
81 
82 	SCIx_NR_REGTYPES,
83 };
84 
85 /*
86  * SCI register subset common for all port types.
87  * Not all registers will exist on all parts.
88  */
89 enum {
90 	SCSMR,				/* Serial Mode Register */
91 	SCBRR,				/* Bit Rate Register */
92 	SCSCR,				/* Serial Control Register */
93 	SCxSR,				/* Serial Status Register */
94 	SCFCR,				/* FIFO Control Register */
95 	SCFDR,				/* FIFO Data Count Register */
96 	SCxTDR,				/* Transmit (FIFO) Data Register */
97 	SCxRDR,				/* Receive (FIFO) Data Register */
98 	SCLSR,				/* Line Status Register */
99 	SCTFDR,				/* Transmit FIFO Data Count Register */
100 	SCRFDR,				/* Receive FIFO Data Count Register */
101 	SCSPTR,				/* Serial Port Register */
102 	HSSRR,				/* Sampling Rate Register */
103 
104 	SCIx_NR_REGS,
105 };
106 
107 struct device;
108 
109 struct plat_sci_port_ops {
110 	void (*init_pins)(struct uart_port *, unsigned int cflag);
111 };
112 
113 /*
114  * Port-specific capabilities
115  */
116 #define SCIx_HAVE_RTSCTS	(1 << 0)
117 
118 /*
119  * Platform device specific platform_data struct
120  */
121 struct plat_sci_port {
122 	unsigned int	type;			/* SCI / SCIF / IRDA / HSCIF */
123 	upf_t		flags;			/* UPF_* flags */
124 	unsigned long	capabilities;		/* Port features/capabilities */
125 
126 	unsigned int	sampling_rate;
127 	unsigned int	scscr;			/* SCSCR initialization */
128 
129 	/*
130 	 * Platform overrides if necessary, defaults otherwise.
131 	 */
132 	int		port_reg;
133 	unsigned char	regshift;
134 	unsigned char	regtype;
135 
136 	struct plat_sci_port_ops	*ops;
137 
138 	unsigned int	dma_slave_tx;
139 	unsigned int	dma_slave_rx;
140 };
141 
142 #endif /* __LINUX_SERIAL_SCI_H */
143