141d9d44dSDave Gerlach /* SPDX-License-Identifier: GPL-2.0 */ 241d9d44dSDave Gerlach /* 341d9d44dSDave Gerlach * TI pm33xx platform data 441d9d44dSDave Gerlach * 541d9d44dSDave Gerlach * Copyright (C) 2016-2018 Texas Instruments, Inc. 641d9d44dSDave Gerlach * Dave Gerlach <d-gerlach@ti.com> 741d9d44dSDave Gerlach */ 841d9d44dSDave Gerlach 941d9d44dSDave Gerlach #ifndef _LINUX_PLATFORM_DATA_PM33XX_H 1041d9d44dSDave Gerlach #define _LINUX_PLATFORM_DATA_PM33XX_H 1141d9d44dSDave Gerlach 1241d9d44dSDave Gerlach #include <linux/kbuild.h> 1341d9d44dSDave Gerlach #include <linux/types.h> 1441d9d44dSDave Gerlach 1574655749SDave Gerlach /* 1674655749SDave Gerlach * WFI Flags for sleep code control 1774655749SDave Gerlach * 1874655749SDave Gerlach * These flags allow PM code to exclude certain operations from happening 1974655749SDave Gerlach * in the low level ASM code found in sleep33xx.S and sleep43xx.S 2074655749SDave Gerlach * 2174655749SDave Gerlach * WFI_FLAG_FLUSH_CACHE: Flush the ARM caches and disable caching. Only 2274655749SDave Gerlach * needed when MPU will lose context. 2374655749SDave Gerlach * WFI_FLAG_SELF_REFRESH: Let EMIF place DDR memory into self-refresh and 2474655749SDave Gerlach * disable EMIF. 2574655749SDave Gerlach * WFI_FLAG_SAVE_EMIF: Save context of all EMIF registers and restore in 2674655749SDave Gerlach * resume path. Only needed if PER domain loses context 2774655749SDave Gerlach * and must also have WFI_FLAG_SELF_REFRESH set. 2874655749SDave Gerlach * WFI_FLAG_WAKE_M3: Disable MPU clock or clockdomain to cause wkup_m3 to 2974655749SDave Gerlach * execute when WFI instruction executes. 3074655749SDave Gerlach * WFI_FLAG_RTC_ONLY: Configure the RTC to enter RTC+DDR mode. 3174655749SDave Gerlach */ 3274655749SDave Gerlach #define WFI_FLAG_FLUSH_CACHE BIT(0) 3374655749SDave Gerlach #define WFI_FLAG_SELF_REFRESH BIT(1) 3474655749SDave Gerlach #define WFI_FLAG_SAVE_EMIF BIT(2) 3574655749SDave Gerlach #define WFI_FLAG_WAKE_M3 BIT(3) 3674655749SDave Gerlach #define WFI_FLAG_RTC_ONLY BIT(4) 3774655749SDave Gerlach 3841d9d44dSDave Gerlach #ifndef __ASSEMBLER__ 3941d9d44dSDave Gerlach struct am33xx_pm_sram_addr { 4041d9d44dSDave Gerlach void (*do_wfi)(void); 4141d9d44dSDave Gerlach unsigned long *do_wfi_sz; 4241d9d44dSDave Gerlach unsigned long *resume_offset; 4341d9d44dSDave Gerlach unsigned long *emif_sram_table; 4441d9d44dSDave Gerlach unsigned long *ro_sram_data; 4541d9d44dSDave Gerlach }; 4641d9d44dSDave Gerlach 4741d9d44dSDave Gerlach struct am33xx_pm_platform_data { 4841d9d44dSDave Gerlach int (*init)(void); 4974655749SDave Gerlach int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long), 5074655749SDave Gerlach unsigned long args); 5141d9d44dSDave Gerlach struct am33xx_pm_sram_addr *(*get_sram_addrs)(void); 5241d9d44dSDave Gerlach }; 5341d9d44dSDave Gerlach 5441d9d44dSDave Gerlach struct am33xx_pm_sram_data { 5541d9d44dSDave Gerlach u32 wfi_flags; 5641d9d44dSDave Gerlach u32 l2_aux_ctrl_val; 5741d9d44dSDave Gerlach u32 l2_prefetch_ctrl_val; 5841d9d44dSDave Gerlach } __packed __aligned(8); 5941d9d44dSDave Gerlach 6041d9d44dSDave Gerlach struct am33xx_pm_ro_sram_data { 6141d9d44dSDave Gerlach u32 amx3_pm_sram_data_virt; 6241d9d44dSDave Gerlach u32 amx3_pm_sram_data_phys; 6341d9d44dSDave Gerlach } __packed __aligned(8); 6441d9d44dSDave Gerlach 6541d9d44dSDave Gerlach #endif /* __ASSEMBLER__ */ 6641d9d44dSDave Gerlach #endif /* _LINUX_PLATFORM_DATA_PM33XX_H */ 67