1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_PGTABLE_H 3 #define _LINUX_PGTABLE_H 4 5 #include <linux/pfn.h> 6 #include <asm/pgtable.h> 7 8 #ifndef __ASSEMBLY__ 9 #ifdef CONFIG_MMU 10 11 #include <linux/mm_types.h> 12 #include <linux/bug.h> 13 #include <linux/errno.h> 14 #include <asm-generic/pgtable_uffd.h> 15 #include <linux/page_table_check.h> 16 17 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \ 18 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS 19 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED 20 #endif 21 22 /* 23 * On almost all architectures and configurations, 0 can be used as the 24 * upper ceiling to free_pgtables(): on many architectures it has the same 25 * effect as using TASK_SIZE. However, there is one configuration which 26 * must impose a more careful limit, to avoid freeing kernel pgtables. 27 */ 28 #ifndef USER_PGTABLES_CEILING 29 #define USER_PGTABLES_CEILING 0UL 30 #endif 31 32 /* 33 * This defines the first usable user address. Platforms 34 * can override its value with custom FIRST_USER_ADDRESS 35 * defined in their respective <asm/pgtable.h>. 36 */ 37 #ifndef FIRST_USER_ADDRESS 38 #define FIRST_USER_ADDRESS 0UL 39 #endif 40 41 /* 42 * This defines the generic helper for accessing PMD page 43 * table page. Although platforms can still override this 44 * via their respective <asm/pgtable.h>. 45 */ 46 #ifndef pmd_pgtable 47 #define pmd_pgtable(pmd) pmd_page(pmd) 48 #endif 49 50 /* 51 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD] 52 * 53 * The pXx_index() functions return the index of the entry in the page 54 * table page which would control the given virtual address 55 * 56 * As these functions may be used by the same code for different levels of 57 * the page table folding, they are always available, regardless of 58 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0 59 * because in such cases PTRS_PER_PxD equals 1. 60 */ 61 62 static inline unsigned long pte_index(unsigned long address) 63 { 64 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 65 } 66 #define pte_index pte_index 67 68 #ifndef pmd_index 69 static inline unsigned long pmd_index(unsigned long address) 70 { 71 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 72 } 73 #define pmd_index pmd_index 74 #endif 75 76 #ifndef pud_index 77 static inline unsigned long pud_index(unsigned long address) 78 { 79 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 80 } 81 #define pud_index pud_index 82 #endif 83 84 #ifndef pgd_index 85 /* Must be a compile-time constant, so implement it as a macro */ 86 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 87 #endif 88 89 #ifndef pte_offset_kernel 90 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 91 { 92 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 93 } 94 #define pte_offset_kernel pte_offset_kernel 95 #endif 96 97 #if defined(CONFIG_HIGHPTE) 98 #define pte_offset_map(dir, address) \ 99 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \ 100 pte_index((address))) 101 #define pte_unmap(pte) kunmap_atomic((pte)) 102 #else 103 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) 104 #define pte_unmap(pte) ((void)(pte)) /* NOP */ 105 #endif 106 107 /* Find an entry in the second-level page table.. */ 108 #ifndef pmd_offset 109 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 110 { 111 return pud_pgtable(*pud) + pmd_index(address); 112 } 113 #define pmd_offset pmd_offset 114 #endif 115 116 #ifndef pud_offset 117 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 118 { 119 return p4d_pgtable(*p4d) + pud_index(address); 120 } 121 #define pud_offset pud_offset 122 #endif 123 124 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address) 125 { 126 return (pgd + pgd_index(address)); 127 }; 128 129 /* 130 * a shortcut to get a pgd_t in a given mm 131 */ 132 #ifndef pgd_offset 133 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 134 #endif 135 136 /* 137 * a shortcut which implies the use of the kernel's pgd, instead 138 * of a process's 139 */ 140 #ifndef pgd_offset_k 141 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 142 #endif 143 144 /* 145 * In many cases it is known that a virtual address is mapped at PMD or PTE 146 * level, so instead of traversing all the page table levels, we can get a 147 * pointer to the PMD entry in user or kernel page table or translate a virtual 148 * address to the pointer in the PTE in the kernel page tables with simple 149 * helpers. 150 */ 151 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va) 152 { 153 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va); 154 } 155 156 static inline pmd_t *pmd_off_k(unsigned long va) 157 { 158 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va); 159 } 160 161 static inline pte_t *virt_to_kpte(unsigned long vaddr) 162 { 163 pmd_t *pmd = pmd_off_k(vaddr); 164 165 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr); 166 } 167 168 #ifndef pmd_young 169 static inline int pmd_young(pmd_t pmd) 170 { 171 return 0; 172 } 173 #endif 174 175 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 176 extern int ptep_set_access_flags(struct vm_area_struct *vma, 177 unsigned long address, pte_t *ptep, 178 pte_t entry, int dirty); 179 #endif 180 181 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 182 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 183 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 184 unsigned long address, pmd_t *pmdp, 185 pmd_t entry, int dirty); 186 extern int pudp_set_access_flags(struct vm_area_struct *vma, 187 unsigned long address, pud_t *pudp, 188 pud_t entry, int dirty); 189 #else 190 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 191 unsigned long address, pmd_t *pmdp, 192 pmd_t entry, int dirty) 193 { 194 BUILD_BUG(); 195 return 0; 196 } 197 static inline int pudp_set_access_flags(struct vm_area_struct *vma, 198 unsigned long address, pud_t *pudp, 199 pud_t entry, int dirty) 200 { 201 BUILD_BUG(); 202 return 0; 203 } 204 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 205 #endif 206 207 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 208 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 209 unsigned long address, 210 pte_t *ptep) 211 { 212 pte_t pte = *ptep; 213 int r = 1; 214 if (!pte_young(pte)) 215 r = 0; 216 else 217 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); 218 return r; 219 } 220 #endif 221 222 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 223 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG) 224 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 225 unsigned long address, 226 pmd_t *pmdp) 227 { 228 pmd_t pmd = *pmdp; 229 int r = 1; 230 if (!pmd_young(pmd)) 231 r = 0; 232 else 233 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); 234 return r; 235 } 236 #else 237 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 238 unsigned long address, 239 pmd_t *pmdp) 240 { 241 BUILD_BUG(); 242 return 0; 243 } 244 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */ 245 #endif 246 247 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 248 int ptep_clear_flush_young(struct vm_area_struct *vma, 249 unsigned long address, pte_t *ptep); 250 #endif 251 252 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 253 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 254 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 255 unsigned long address, pmd_t *pmdp); 256 #else 257 /* 258 * Despite relevant to THP only, this API is called from generic rmap code 259 * under PageTransHuge(), hence needs a dummy implementation for !THP 260 */ 261 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma, 262 unsigned long address, pmd_t *pmdp) 263 { 264 BUILD_BUG(); 265 return 0; 266 } 267 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 268 #endif 269 270 #ifndef arch_has_hw_nonleaf_pmd_young 271 /* 272 * Return whether the accessed bit in non-leaf PMD entries is supported on the 273 * local CPU. 274 */ 275 static inline bool arch_has_hw_nonleaf_pmd_young(void) 276 { 277 return IS_ENABLED(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG); 278 } 279 #endif 280 281 #ifndef arch_has_hw_pte_young 282 /* 283 * Return whether the accessed bit is supported on the local CPU. 284 * 285 * This stub assumes accessing through an old PTE triggers a page fault. 286 * Architectures that automatically set the access bit should overwrite it. 287 */ 288 static inline bool arch_has_hw_pte_young(void) 289 { 290 return false; 291 } 292 #endif 293 294 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR 295 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 296 unsigned long address, 297 pte_t *ptep) 298 { 299 pte_t pte = *ptep; 300 pte_clear(mm, address, ptep); 301 page_table_check_pte_clear(mm, address, pte); 302 return pte; 303 } 304 #endif 305 306 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr, 307 pte_t *ptep) 308 { 309 ptep_get_and_clear(mm, addr, ptep); 310 } 311 312 #ifndef ptep_get 313 static inline pte_t ptep_get(pte_t *ptep) 314 { 315 return READ_ONCE(*ptep); 316 } 317 #endif 318 319 #ifndef pmdp_get 320 static inline pmd_t pmdp_get(pmd_t *pmdp) 321 { 322 return READ_ONCE(*pmdp); 323 } 324 #endif 325 326 #ifdef CONFIG_GUP_GET_PXX_LOW_HIGH 327 /* 328 * For walking the pagetables without holding any locks. Some architectures 329 * (eg x86-32 PAE) cannot load the entries atomically without using expensive 330 * instructions. We are guaranteed that a PTE will only either go from not 331 * present to present, or present to not present -- it will not switch to a 332 * completely different present page without a TLB flush inbetween; which we 333 * are blocking by holding interrupts off. 334 * 335 * Setting ptes from not present to present goes: 336 * 337 * ptep->pte_high = h; 338 * smp_wmb(); 339 * ptep->pte_low = l; 340 * 341 * And present to not present goes: 342 * 343 * ptep->pte_low = 0; 344 * smp_wmb(); 345 * ptep->pte_high = 0; 346 * 347 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'. 348 * We load pte_high *after* loading pte_low, which ensures we don't see an older 349 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't 350 * picked up a changed pte high. We might have gotten rubbish values from 351 * pte_low and pte_high, but we are guaranteed that pte_low will not have the 352 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only 353 * operates on present ptes we're safe. 354 */ 355 static inline pte_t ptep_get_lockless(pte_t *ptep) 356 { 357 pte_t pte; 358 359 do { 360 pte.pte_low = ptep->pte_low; 361 smp_rmb(); 362 pte.pte_high = ptep->pte_high; 363 smp_rmb(); 364 } while (unlikely(pte.pte_low != ptep->pte_low)); 365 366 return pte; 367 } 368 #define ptep_get_lockless ptep_get_lockless 369 370 #if CONFIG_PGTABLE_LEVELS > 2 371 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp) 372 { 373 pmd_t pmd; 374 375 do { 376 pmd.pmd_low = pmdp->pmd_low; 377 smp_rmb(); 378 pmd.pmd_high = pmdp->pmd_high; 379 smp_rmb(); 380 } while (unlikely(pmd.pmd_low != pmdp->pmd_low)); 381 382 return pmd; 383 } 384 #define pmdp_get_lockless pmdp_get_lockless 385 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 386 #endif /* CONFIG_GUP_GET_PXX_LOW_HIGH */ 387 388 /* 389 * We require that the PTE can be read atomically. 390 */ 391 #ifndef ptep_get_lockless 392 static inline pte_t ptep_get_lockless(pte_t *ptep) 393 { 394 return ptep_get(ptep); 395 } 396 #endif 397 398 #ifndef pmdp_get_lockless 399 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp) 400 { 401 return pmdp_get(pmdp); 402 } 403 #endif 404 405 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 406 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 407 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 408 unsigned long address, 409 pmd_t *pmdp) 410 { 411 pmd_t pmd = *pmdp; 412 413 pmd_clear(pmdp); 414 page_table_check_pmd_clear(mm, address, pmd); 415 416 return pmd; 417 } 418 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */ 419 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 420 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 421 unsigned long address, 422 pud_t *pudp) 423 { 424 pud_t pud = *pudp; 425 426 pud_clear(pudp); 427 page_table_check_pud_clear(mm, address, pud); 428 429 return pud; 430 } 431 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */ 432 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 433 434 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 435 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL 436 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma, 437 unsigned long address, pmd_t *pmdp, 438 int full) 439 { 440 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp); 441 } 442 #endif 443 444 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL 445 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm, 446 unsigned long address, pud_t *pudp, 447 int full) 448 { 449 return pudp_huge_get_and_clear(mm, address, pudp); 450 } 451 #endif 452 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 453 454 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 455 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 456 unsigned long address, pte_t *ptep, 457 int full) 458 { 459 return ptep_get_and_clear(mm, address, ptep); 460 } 461 #endif 462 463 464 /* 465 * If two threads concurrently fault at the same page, the thread that 466 * won the race updates the PTE and its local TLB/Cache. The other thread 467 * gives up, simply does nothing, and continues; on architectures where 468 * software can update TLB, local TLB can be updated here to avoid next page 469 * fault. This function updates TLB only, do nothing with cache or others. 470 * It is the difference with function update_mmu_cache. 471 */ 472 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB 473 static inline void update_mmu_tlb(struct vm_area_struct *vma, 474 unsigned long address, pte_t *ptep) 475 { 476 } 477 #define __HAVE_ARCH_UPDATE_MMU_TLB 478 #endif 479 480 /* 481 * Some architectures may be able to avoid expensive synchronization 482 * primitives when modifications are made to PTE's which are already 483 * not present, or in the process of an address space destruction. 484 */ 485 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL 486 static inline void pte_clear_not_present_full(struct mm_struct *mm, 487 unsigned long address, 488 pte_t *ptep, 489 int full) 490 { 491 pte_clear(mm, address, ptep); 492 } 493 #endif 494 495 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 496 extern pte_t ptep_clear_flush(struct vm_area_struct *vma, 497 unsigned long address, 498 pte_t *ptep); 499 #endif 500 501 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH 502 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, 503 unsigned long address, 504 pmd_t *pmdp); 505 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma, 506 unsigned long address, 507 pud_t *pudp); 508 #endif 509 510 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT 511 struct mm_struct; 512 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 513 { 514 pte_t old_pte = *ptep; 515 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); 516 } 517 #endif 518 519 /* 520 * On some architectures hardware does not set page access bit when accessing 521 * memory page, it is responsibility of software setting this bit. It brings 522 * out extra page fault penalty to track page access bit. For optimization page 523 * access bit can be set during all page fault flow on these arches. 524 * To be differentiate with macro pte_mkyoung, this macro is used on platforms 525 * where software maintains page access bit. 526 */ 527 #ifndef pte_sw_mkyoung 528 static inline pte_t pte_sw_mkyoung(pte_t pte) 529 { 530 return pte; 531 } 532 #define pte_sw_mkyoung pte_sw_mkyoung 533 #endif 534 535 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT 536 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 537 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 538 unsigned long address, pmd_t *pmdp) 539 { 540 pmd_t old_pmd = *pmdp; 541 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); 542 } 543 #else 544 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 545 unsigned long address, pmd_t *pmdp) 546 { 547 BUILD_BUG(); 548 } 549 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 550 #endif 551 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT 552 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 553 static inline void pudp_set_wrprotect(struct mm_struct *mm, 554 unsigned long address, pud_t *pudp) 555 { 556 pud_t old_pud = *pudp; 557 558 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud)); 559 } 560 #else 561 static inline void pudp_set_wrprotect(struct mm_struct *mm, 562 unsigned long address, pud_t *pudp) 563 { 564 BUILD_BUG(); 565 } 566 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ 567 #endif 568 569 #ifndef pmdp_collapse_flush 570 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 571 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 572 unsigned long address, pmd_t *pmdp); 573 #else 574 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 575 unsigned long address, 576 pmd_t *pmdp) 577 { 578 BUILD_BUG(); 579 return *pmdp; 580 } 581 #define pmdp_collapse_flush pmdp_collapse_flush 582 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 583 #endif 584 585 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT 586 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 587 pgtable_t pgtable); 588 #endif 589 590 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW 591 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 592 #endif 593 594 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 595 /* 596 * This is an implementation of pmdp_establish() that is only suitable for an 597 * architecture that doesn't have hardware dirty/accessed bits. In this case we 598 * can't race with CPU which sets these bits and non-atomic approach is fine. 599 */ 600 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma, 601 unsigned long address, pmd_t *pmdp, pmd_t pmd) 602 { 603 pmd_t old_pmd = *pmdp; 604 set_pmd_at(vma->vm_mm, address, pmdp, pmd); 605 return old_pmd; 606 } 607 #endif 608 609 #ifndef __HAVE_ARCH_PMDP_INVALIDATE 610 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 611 pmd_t *pmdp); 612 #endif 613 614 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD 615 616 /* 617 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent 618 * hugepage mapping in the page tables. This function is similar to 619 * pmdp_invalidate(), but should only be used if the access and dirty bits would 620 * not be cleared by the software in the new PMD value. The function ensures 621 * that hardware changes of the access and dirty bits updates would not be lost. 622 * 623 * Doing so can allow in certain architectures to avoid a TLB flush in most 624 * cases. Yet, another TLB flush might be necessary later if the PMD update 625 * itself requires such flush (e.g., if protection was set to be stricter). Yet, 626 * even when a TLB flush is needed because of the update, the caller may be able 627 * to batch these TLB flushing operations, so fewer TLB flush operations are 628 * needed. 629 */ 630 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 631 unsigned long address, pmd_t *pmdp); 632 #endif 633 634 #ifndef __HAVE_ARCH_PTE_SAME 635 static inline int pte_same(pte_t pte_a, pte_t pte_b) 636 { 637 return pte_val(pte_a) == pte_val(pte_b); 638 } 639 #endif 640 641 #ifndef __HAVE_ARCH_PTE_UNUSED 642 /* 643 * Some architectures provide facilities to virtualization guests 644 * so that they can flag allocated pages as unused. This allows the 645 * host to transparently reclaim unused pages. This function returns 646 * whether the pte's page is unused. 647 */ 648 static inline int pte_unused(pte_t pte) 649 { 650 return 0; 651 } 652 #endif 653 654 #ifndef pte_access_permitted 655 #define pte_access_permitted(pte, write) \ 656 (pte_present(pte) && (!(write) || pte_write(pte))) 657 #endif 658 659 #ifndef pmd_access_permitted 660 #define pmd_access_permitted(pmd, write) \ 661 (pmd_present(pmd) && (!(write) || pmd_write(pmd))) 662 #endif 663 664 #ifndef pud_access_permitted 665 #define pud_access_permitted(pud, write) \ 666 (pud_present(pud) && (!(write) || pud_write(pud))) 667 #endif 668 669 #ifndef p4d_access_permitted 670 #define p4d_access_permitted(p4d, write) \ 671 (p4d_present(p4d) && (!(write) || p4d_write(p4d))) 672 #endif 673 674 #ifndef pgd_access_permitted 675 #define pgd_access_permitted(pgd, write) \ 676 (pgd_present(pgd) && (!(write) || pgd_write(pgd))) 677 #endif 678 679 #ifndef __HAVE_ARCH_PMD_SAME 680 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) 681 { 682 return pmd_val(pmd_a) == pmd_val(pmd_b); 683 } 684 685 static inline int pud_same(pud_t pud_a, pud_t pud_b) 686 { 687 return pud_val(pud_a) == pud_val(pud_b); 688 } 689 #endif 690 691 #ifndef __HAVE_ARCH_P4D_SAME 692 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b) 693 { 694 return p4d_val(p4d_a) == p4d_val(p4d_b); 695 } 696 #endif 697 698 #ifndef __HAVE_ARCH_PGD_SAME 699 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b) 700 { 701 return pgd_val(pgd_a) == pgd_val(pgd_b); 702 } 703 #endif 704 705 /* 706 * Use set_p*_safe(), and elide TLB flushing, when confident that *no* 707 * TLB flush will be required as a result of the "set". For example, use 708 * in scenarios where it is known ahead of time that the routine is 709 * setting non-present entries, or re-setting an existing entry to the 710 * same value. Otherwise, use the typical "set" helpers and flush the 711 * TLB. 712 */ 713 #define set_pte_safe(ptep, pte) \ 714 ({ \ 715 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \ 716 set_pte(ptep, pte); \ 717 }) 718 719 #define set_pmd_safe(pmdp, pmd) \ 720 ({ \ 721 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \ 722 set_pmd(pmdp, pmd); \ 723 }) 724 725 #define set_pud_safe(pudp, pud) \ 726 ({ \ 727 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \ 728 set_pud(pudp, pud); \ 729 }) 730 731 #define set_p4d_safe(p4dp, p4d) \ 732 ({ \ 733 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \ 734 set_p4d(p4dp, p4d); \ 735 }) 736 737 #define set_pgd_safe(pgdp, pgd) \ 738 ({ \ 739 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \ 740 set_pgd(pgdp, pgd); \ 741 }) 742 743 #ifndef __HAVE_ARCH_DO_SWAP_PAGE 744 /* 745 * Some architectures support metadata associated with a page. When a 746 * page is being swapped out, this metadata must be saved so it can be 747 * restored when the page is swapped back in. SPARC M7 and newer 748 * processors support an ADI (Application Data Integrity) tag for the 749 * page as metadata for the page. arch_do_swap_page() can restore this 750 * metadata when a page is swapped back in. 751 */ 752 static inline void arch_do_swap_page(struct mm_struct *mm, 753 struct vm_area_struct *vma, 754 unsigned long addr, 755 pte_t pte, pte_t oldpte) 756 { 757 758 } 759 #endif 760 761 #ifndef __HAVE_ARCH_UNMAP_ONE 762 /* 763 * Some architectures support metadata associated with a page. When a 764 * page is being swapped out, this metadata must be saved so it can be 765 * restored when the page is swapped back in. SPARC M7 and newer 766 * processors support an ADI (Application Data Integrity) tag for the 767 * page as metadata for the page. arch_unmap_one() can save this 768 * metadata on a swap-out of a page. 769 */ 770 static inline int arch_unmap_one(struct mm_struct *mm, 771 struct vm_area_struct *vma, 772 unsigned long addr, 773 pte_t orig_pte) 774 { 775 return 0; 776 } 777 #endif 778 779 /* 780 * Allow architectures to preserve additional metadata associated with 781 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function 782 * prototypes must be defined in the arch-specific asm/pgtable.h file. 783 */ 784 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP 785 static inline int arch_prepare_to_swap(struct page *page) 786 { 787 return 0; 788 } 789 #endif 790 791 #ifndef __HAVE_ARCH_SWAP_INVALIDATE 792 static inline void arch_swap_invalidate_page(int type, pgoff_t offset) 793 { 794 } 795 796 static inline void arch_swap_invalidate_area(int type) 797 { 798 } 799 #endif 800 801 #ifndef __HAVE_ARCH_SWAP_RESTORE 802 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio) 803 { 804 } 805 #endif 806 807 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE 808 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) 809 #endif 810 811 #ifndef __HAVE_ARCH_MOVE_PTE 812 #define move_pte(pte, prot, old_addr, new_addr) (pte) 813 #endif 814 815 #ifndef pte_accessible 816 # define pte_accessible(mm, pte) ((void)(pte), 1) 817 #endif 818 819 #ifndef flush_tlb_fix_spurious_fault 820 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address) 821 #endif 822 823 /* 824 * When walking page tables, get the address of the next boundary, 825 * or the end address of the range if that comes earlier. Although no 826 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. 827 */ 828 829 #define pgd_addr_end(addr, end) \ 830 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ 831 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 832 }) 833 834 #ifndef p4d_addr_end 835 #define p4d_addr_end(addr, end) \ 836 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \ 837 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 838 }) 839 #endif 840 841 #ifndef pud_addr_end 842 #define pud_addr_end(addr, end) \ 843 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ 844 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 845 }) 846 #endif 847 848 #ifndef pmd_addr_end 849 #define pmd_addr_end(addr, end) \ 850 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ 851 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 852 }) 853 #endif 854 855 /* 856 * When walking page tables, we usually want to skip any p?d_none entries; 857 * and any p?d_bad entries - reporting the error before resetting to none. 858 * Do the tests inline, but report and clear the bad entry in mm/memory.c. 859 */ 860 void pgd_clear_bad(pgd_t *); 861 862 #ifndef __PAGETABLE_P4D_FOLDED 863 void p4d_clear_bad(p4d_t *); 864 #else 865 #define p4d_clear_bad(p4d) do { } while (0) 866 #endif 867 868 #ifndef __PAGETABLE_PUD_FOLDED 869 void pud_clear_bad(pud_t *); 870 #else 871 #define pud_clear_bad(p4d) do { } while (0) 872 #endif 873 874 void pmd_clear_bad(pmd_t *); 875 876 static inline int pgd_none_or_clear_bad(pgd_t *pgd) 877 { 878 if (pgd_none(*pgd)) 879 return 1; 880 if (unlikely(pgd_bad(*pgd))) { 881 pgd_clear_bad(pgd); 882 return 1; 883 } 884 return 0; 885 } 886 887 static inline int p4d_none_or_clear_bad(p4d_t *p4d) 888 { 889 if (p4d_none(*p4d)) 890 return 1; 891 if (unlikely(p4d_bad(*p4d))) { 892 p4d_clear_bad(p4d); 893 return 1; 894 } 895 return 0; 896 } 897 898 static inline int pud_none_or_clear_bad(pud_t *pud) 899 { 900 if (pud_none(*pud)) 901 return 1; 902 if (unlikely(pud_bad(*pud))) { 903 pud_clear_bad(pud); 904 return 1; 905 } 906 return 0; 907 } 908 909 static inline int pmd_none_or_clear_bad(pmd_t *pmd) 910 { 911 if (pmd_none(*pmd)) 912 return 1; 913 if (unlikely(pmd_bad(*pmd))) { 914 pmd_clear_bad(pmd); 915 return 1; 916 } 917 return 0; 918 } 919 920 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma, 921 unsigned long addr, 922 pte_t *ptep) 923 { 924 /* 925 * Get the current pte state, but zero it out to make it 926 * non-present, preventing the hardware from asynchronously 927 * updating it. 928 */ 929 return ptep_get_and_clear(vma->vm_mm, addr, ptep); 930 } 931 932 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma, 933 unsigned long addr, 934 pte_t *ptep, pte_t pte) 935 { 936 /* 937 * The pte is non-present, so there's no hardware state to 938 * preserve. 939 */ 940 set_pte_at(vma->vm_mm, addr, ptep, pte); 941 } 942 943 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 944 /* 945 * Start a pte protection read-modify-write transaction, which 946 * protects against asynchronous hardware modifications to the pte. 947 * The intention is not to prevent the hardware from making pte 948 * updates, but to prevent any updates it may make from being lost. 949 * 950 * This does not protect against other software modifications of the 951 * pte; the appropriate pte lock must be held over the transaction. 952 * 953 * Note that this interface is intended to be batchable, meaning that 954 * ptep_modify_prot_commit may not actually update the pte, but merely 955 * queue the update to be done at some later time. The update must be 956 * actually committed before the pte lock is released, however. 957 */ 958 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, 959 unsigned long addr, 960 pte_t *ptep) 961 { 962 return __ptep_modify_prot_start(vma, addr, ptep); 963 } 964 965 /* 966 * Commit an update to a pte, leaving any hardware-controlled bits in 967 * the PTE unmodified. 968 */ 969 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 970 unsigned long addr, 971 pte_t *ptep, pte_t old_pte, pte_t pte) 972 { 973 __ptep_modify_prot_commit(vma, addr, ptep, pte); 974 } 975 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 976 #endif /* CONFIG_MMU */ 977 978 /* 979 * No-op macros that just return the current protection value. Defined here 980 * because these macros can be used even if CONFIG_MMU is not defined. 981 */ 982 983 #ifndef pgprot_nx 984 #define pgprot_nx(prot) (prot) 985 #endif 986 987 #ifndef pgprot_noncached 988 #define pgprot_noncached(prot) (prot) 989 #endif 990 991 #ifndef pgprot_writecombine 992 #define pgprot_writecombine pgprot_noncached 993 #endif 994 995 #ifndef pgprot_writethrough 996 #define pgprot_writethrough pgprot_noncached 997 #endif 998 999 #ifndef pgprot_device 1000 #define pgprot_device pgprot_noncached 1001 #endif 1002 1003 #ifndef pgprot_mhp 1004 #define pgprot_mhp(prot) (prot) 1005 #endif 1006 1007 #ifdef CONFIG_MMU 1008 #ifndef pgprot_modify 1009 #define pgprot_modify pgprot_modify 1010 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 1011 { 1012 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) 1013 newprot = pgprot_noncached(newprot); 1014 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) 1015 newprot = pgprot_writecombine(newprot); 1016 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) 1017 newprot = pgprot_device(newprot); 1018 return newprot; 1019 } 1020 #endif 1021 #endif /* CONFIG_MMU */ 1022 1023 #ifndef pgprot_encrypted 1024 #define pgprot_encrypted(prot) (prot) 1025 #endif 1026 1027 #ifndef pgprot_decrypted 1028 #define pgprot_decrypted(prot) (prot) 1029 #endif 1030 1031 /* 1032 * A facility to provide lazy MMU batching. This allows PTE updates and 1033 * page invalidations to be delayed until a call to leave lazy MMU mode 1034 * is issued. Some architectures may benefit from doing this, and it is 1035 * beneficial for both shadow and direct mode hypervisors, which may batch 1036 * the PTE updates which happen during this window. Note that using this 1037 * interface requires that read hazards be removed from the code. A read 1038 * hazard could result in the direct mode hypervisor case, since the actual 1039 * write to the page tables may not yet have taken place, so reads though 1040 * a raw PTE pointer after it has been modified are not guaranteed to be 1041 * up to date. This mode can only be entered and left under the protection of 1042 * the page table locks for all page tables which may be modified. In the UP 1043 * case, this is required so that preemption is disabled, and in the SMP case, 1044 * it must synchronize the delayed page table writes properly on other CPUs. 1045 */ 1046 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE 1047 #define arch_enter_lazy_mmu_mode() do {} while (0) 1048 #define arch_leave_lazy_mmu_mode() do {} while (0) 1049 #define arch_flush_lazy_mmu_mode() do {} while (0) 1050 #endif 1051 1052 /* 1053 * A facility to provide batching of the reload of page tables and 1054 * other process state with the actual context switch code for 1055 * paravirtualized guests. By convention, only one of the batched 1056 * update (lazy) modes (CPU, MMU) should be active at any given time, 1057 * entry should never be nested, and entry and exits should always be 1058 * paired. This is for sanity of maintaining and reasoning about the 1059 * kernel code. In this case, the exit (end of the context switch) is 1060 * in architecture-specific code, and so doesn't need a generic 1061 * definition. 1062 */ 1063 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH 1064 #define arch_start_context_switch(prev) do {} while (0) 1065 #endif 1066 1067 /* 1068 * When replacing an anonymous page by a real (!non) swap entry, we clear 1069 * PG_anon_exclusive from the page and instead remember whether the flag was 1070 * set in the swp pte. During fork(), we have to mark the entry as !exclusive 1071 * (possibly shared). On swapin, we use that information to restore 1072 * PG_anon_exclusive, which is very helpful in cases where we might have 1073 * additional (e.g., FOLL_GET) references on a page and wouldn't be able to 1074 * detect exclusivity. 1075 * 1076 * These functions don't apply to non-swap entries (e.g., migration, hwpoison, 1077 * ...). 1078 */ 1079 #ifndef __HAVE_ARCH_PTE_SWP_EXCLUSIVE 1080 static inline pte_t pte_swp_mkexclusive(pte_t pte) 1081 { 1082 return pte; 1083 } 1084 1085 static inline int pte_swp_exclusive(pte_t pte) 1086 { 1087 return false; 1088 } 1089 1090 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 1091 { 1092 return pte; 1093 } 1094 #endif 1095 1096 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1097 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION 1098 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1099 { 1100 return pmd; 1101 } 1102 1103 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1104 { 1105 return 0; 1106 } 1107 1108 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1109 { 1110 return pmd; 1111 } 1112 #endif 1113 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */ 1114 static inline int pte_soft_dirty(pte_t pte) 1115 { 1116 return 0; 1117 } 1118 1119 static inline int pmd_soft_dirty(pmd_t pmd) 1120 { 1121 return 0; 1122 } 1123 1124 static inline pte_t pte_mksoft_dirty(pte_t pte) 1125 { 1126 return pte; 1127 } 1128 1129 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 1130 { 1131 return pmd; 1132 } 1133 1134 static inline pte_t pte_clear_soft_dirty(pte_t pte) 1135 { 1136 return pte; 1137 } 1138 1139 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 1140 { 1141 return pmd; 1142 } 1143 1144 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1145 { 1146 return pte; 1147 } 1148 1149 static inline int pte_swp_soft_dirty(pte_t pte) 1150 { 1151 return 0; 1152 } 1153 1154 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1155 { 1156 return pte; 1157 } 1158 1159 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1160 { 1161 return pmd; 1162 } 1163 1164 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1165 { 1166 return 0; 1167 } 1168 1169 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1170 { 1171 return pmd; 1172 } 1173 #endif 1174 1175 #ifndef __HAVE_PFNMAP_TRACKING 1176 /* 1177 * Interfaces that can be used by architecture code to keep track of 1178 * memory type of pfn mappings specified by the remap_pfn_range, 1179 * vmf_insert_pfn. 1180 */ 1181 1182 /* 1183 * track_pfn_remap is called when a _new_ pfn mapping is being established 1184 * by remap_pfn_range() for physical range indicated by pfn and size. 1185 */ 1186 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1187 unsigned long pfn, unsigned long addr, 1188 unsigned long size) 1189 { 1190 return 0; 1191 } 1192 1193 /* 1194 * track_pfn_insert is called when a _new_ single pfn is established 1195 * by vmf_insert_pfn(). 1196 */ 1197 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1198 pfn_t pfn) 1199 { 1200 } 1201 1202 /* 1203 * track_pfn_copy is called when vma that is covering the pfnmap gets 1204 * copied through copy_page_range(). 1205 */ 1206 static inline int track_pfn_copy(struct vm_area_struct *vma) 1207 { 1208 return 0; 1209 } 1210 1211 /* 1212 * untrack_pfn is called while unmapping a pfnmap for a region. 1213 * untrack can be called for a specific region indicated by pfn and size or 1214 * can be for the entire vma (in which case pfn, size are zero). 1215 */ 1216 static inline void untrack_pfn(struct vm_area_struct *vma, 1217 unsigned long pfn, unsigned long size) 1218 { 1219 } 1220 1221 /* 1222 * untrack_pfn_moved is called while mremapping a pfnmap for a new region. 1223 */ 1224 static inline void untrack_pfn_moved(struct vm_area_struct *vma) 1225 { 1226 } 1227 #else 1228 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1229 unsigned long pfn, unsigned long addr, 1230 unsigned long size); 1231 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1232 pfn_t pfn); 1233 extern int track_pfn_copy(struct vm_area_struct *vma); 1234 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, 1235 unsigned long size); 1236 extern void untrack_pfn_moved(struct vm_area_struct *vma); 1237 #endif 1238 1239 #ifdef CONFIG_MMU 1240 #ifdef __HAVE_COLOR_ZERO_PAGE 1241 static inline int is_zero_pfn(unsigned long pfn) 1242 { 1243 extern unsigned long zero_pfn; 1244 unsigned long offset_from_zero_pfn = pfn - zero_pfn; 1245 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); 1246 } 1247 1248 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) 1249 1250 #else 1251 static inline int is_zero_pfn(unsigned long pfn) 1252 { 1253 extern unsigned long zero_pfn; 1254 return pfn == zero_pfn; 1255 } 1256 1257 static inline unsigned long my_zero_pfn(unsigned long addr) 1258 { 1259 extern unsigned long zero_pfn; 1260 return zero_pfn; 1261 } 1262 #endif 1263 #else 1264 static inline int is_zero_pfn(unsigned long pfn) 1265 { 1266 return 0; 1267 } 1268 1269 static inline unsigned long my_zero_pfn(unsigned long addr) 1270 { 1271 return 0; 1272 } 1273 #endif /* CONFIG_MMU */ 1274 1275 #ifdef CONFIG_MMU 1276 1277 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 1278 static inline int pmd_trans_huge(pmd_t pmd) 1279 { 1280 return 0; 1281 } 1282 #ifndef pmd_write 1283 static inline int pmd_write(pmd_t pmd) 1284 { 1285 BUG(); 1286 return 0; 1287 } 1288 #endif /* pmd_write */ 1289 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1290 1291 #ifndef pud_write 1292 static inline int pud_write(pud_t pud) 1293 { 1294 BUG(); 1295 return 0; 1296 } 1297 #endif /* pud_write */ 1298 1299 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE) 1300 static inline int pmd_devmap(pmd_t pmd) 1301 { 1302 return 0; 1303 } 1304 static inline int pud_devmap(pud_t pud) 1305 { 1306 return 0; 1307 } 1308 static inline int pgd_devmap(pgd_t pgd) 1309 { 1310 return 0; 1311 } 1312 #endif 1313 1314 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \ 1315 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1316 static inline int pud_trans_huge(pud_t pud) 1317 { 1318 return 0; 1319 } 1320 #endif 1321 1322 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */ 1323 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud) 1324 { 1325 pud_t pudval = READ_ONCE(*pud); 1326 1327 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval)) 1328 return 1; 1329 if (unlikely(pud_bad(pudval))) { 1330 pud_clear_bad(pud); 1331 return 1; 1332 } 1333 return 0; 1334 } 1335 1336 /* See pmd_trans_unstable for discussion. */ 1337 static inline int pud_trans_unstable(pud_t *pud) 1338 { 1339 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1340 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1341 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud); 1342 #else 1343 return 0; 1344 #endif 1345 } 1346 1347 #ifndef arch_needs_pgtable_deposit 1348 #define arch_needs_pgtable_deposit() (false) 1349 #endif 1350 /* 1351 * This function is meant to be used by sites walking pagetables with 1352 * the mmap_lock held in read mode to protect against MADV_DONTNEED and 1353 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd 1354 * into a null pmd and the transhuge page fault can convert a null pmd 1355 * into an hugepmd or into a regular pmd (if the hugepage allocation 1356 * fails). While holding the mmap_lock in read mode the pmd becomes 1357 * stable and stops changing under us only if it's not null and not a 1358 * transhuge pmd. When those races occurs and this function makes a 1359 * difference vs the standard pmd_none_or_clear_bad, the result is 1360 * undefined so behaving like if the pmd was none is safe (because it 1361 * can return none anyway). The compiler level barrier() is critically 1362 * important to compute the two checks atomically on the same pmdval. 1363 * 1364 * For 32bit kernels with a 64bit large pmd_t this automatically takes 1365 * care of reading the pmd atomically to avoid SMP race conditions 1366 * against pmd_populate() when the mmap_lock is hold for reading by the 1367 * caller (a special atomic read not done by "gcc" as in the generic 1368 * version above, is also needed when THP is disabled because the page 1369 * fault can populate the pmd from under us). 1370 */ 1371 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) 1372 { 1373 pmd_t pmdval = pmdp_get_lockless(pmd); 1374 /* 1375 * The barrier will stabilize the pmdval in a register or on 1376 * the stack so that it will stop changing under the code. 1377 * 1378 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE, 1379 * pmdp_get_lockless is allowed to return a not atomic pmdval 1380 * (for example pointing to an hugepage that has never been 1381 * mapped in the pmd). The below checks will only care about 1382 * the low part of the pmd with 32bit PAE x86 anyway, with the 1383 * exception of pmd_none(). So the important thing is that if 1384 * the low part of the pmd is found null, the high part will 1385 * be also null or the pmd_none() check below would be 1386 * confused. 1387 */ 1388 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1389 barrier(); 1390 #endif 1391 /* 1392 * !pmd_present() checks for pmd migration entries 1393 * 1394 * The complete check uses is_pmd_migration_entry() in linux/swapops.h 1395 * But using that requires moving current function and pmd_trans_unstable() 1396 * to linux/swapops.h to resolve dependency, which is too much code move. 1397 * 1398 * !pmd_present() is equivalent to is_pmd_migration_entry() currently, 1399 * because !pmd_present() pages can only be under migration not swapped 1400 * out. 1401 * 1402 * pmd_none() is preserved for future condition checks on pmd migration 1403 * entries and not confusing with this function name, although it is 1404 * redundant with !pmd_present(). 1405 */ 1406 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) || 1407 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval))) 1408 return 1; 1409 if (unlikely(pmd_bad(pmdval))) { 1410 pmd_clear_bad(pmd); 1411 return 1; 1412 } 1413 return 0; 1414 } 1415 1416 /* 1417 * This is a noop if Transparent Hugepage Support is not built into 1418 * the kernel. Otherwise it is equivalent to 1419 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in 1420 * places that already verified the pmd is not none and they want to 1421 * walk ptes while holding the mmap sem in read mode (write mode don't 1422 * need this). If THP is not enabled, the pmd can't go away under the 1423 * code even if MADV_DONTNEED runs, but if THP is enabled we need to 1424 * run a pmd_trans_unstable before walking the ptes after 1425 * split_huge_pmd returns (because it may have run when the pmd become 1426 * null, but then a page fault can map in a THP and not a regular page). 1427 */ 1428 static inline int pmd_trans_unstable(pmd_t *pmd) 1429 { 1430 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1431 return pmd_none_or_trans_huge_or_clear_bad(pmd); 1432 #else 1433 return 0; 1434 #endif 1435 } 1436 1437 /* 1438 * the ordering of these checks is important for pmds with _page_devmap set. 1439 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check 1440 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly 1441 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output. 1442 */ 1443 static inline int pmd_devmap_trans_unstable(pmd_t *pmd) 1444 { 1445 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd); 1446 } 1447 1448 #ifndef CONFIG_NUMA_BALANCING 1449 /* 1450 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but 1451 * the only case the kernel cares is for NUMA balancing and is only ever set 1452 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked 1453 * _PAGE_PROTNONE so by default, implement the helper as "always no". It 1454 * is the responsibility of the caller to distinguish between PROT_NONE 1455 * protections and NUMA hinting fault protections. 1456 */ 1457 static inline int pte_protnone(pte_t pte) 1458 { 1459 return 0; 1460 } 1461 1462 static inline int pmd_protnone(pmd_t pmd) 1463 { 1464 return 0; 1465 } 1466 #endif /* CONFIG_NUMA_BALANCING */ 1467 1468 #endif /* CONFIG_MMU */ 1469 1470 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP 1471 1472 #ifndef __PAGETABLE_P4D_FOLDED 1473 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot); 1474 void p4d_clear_huge(p4d_t *p4d); 1475 #else 1476 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1477 { 1478 return 0; 1479 } 1480 static inline void p4d_clear_huge(p4d_t *p4d) { } 1481 #endif /* !__PAGETABLE_P4D_FOLDED */ 1482 1483 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); 1484 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); 1485 int pud_clear_huge(pud_t *pud); 1486 int pmd_clear_huge(pmd_t *pmd); 1487 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr); 1488 int pud_free_pmd_page(pud_t *pud, unsigned long addr); 1489 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr); 1490 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ 1491 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1492 { 1493 return 0; 1494 } 1495 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) 1496 { 1497 return 0; 1498 } 1499 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) 1500 { 1501 return 0; 1502 } 1503 static inline void p4d_clear_huge(p4d_t *p4d) { } 1504 static inline int pud_clear_huge(pud_t *pud) 1505 { 1506 return 0; 1507 } 1508 static inline int pmd_clear_huge(pmd_t *pmd) 1509 { 1510 return 0; 1511 } 1512 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 1513 { 1514 return 0; 1515 } 1516 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr) 1517 { 1518 return 0; 1519 } 1520 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) 1521 { 1522 return 0; 1523 } 1524 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ 1525 1526 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 1527 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1528 /* 1529 * ARCHes with special requirements for evicting THP backing TLB entries can 1530 * implement this. Otherwise also, it can help optimize normal TLB flush in 1531 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the 1532 * entire TLB if flush span is greater than a threshold, which will 1533 * likely be true for a single huge page. Thus a single THP flush will 1534 * invalidate the entire TLB which is not desirable. 1535 * e.g. see arch/arc: flush_pmd_tlb_range 1536 */ 1537 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1538 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1539 #else 1540 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG() 1541 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG() 1542 #endif 1543 #endif 1544 1545 struct file; 1546 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 1547 unsigned long size, pgprot_t *vma_prot); 1548 1549 #ifndef CONFIG_X86_ESPFIX64 1550 static inline void init_espfix_bsp(void) { } 1551 #endif 1552 1553 extern void __init pgtable_cache_init(void); 1554 1555 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED 1556 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) 1557 { 1558 return true; 1559 } 1560 1561 static inline bool arch_has_pfn_modify_check(void) 1562 { 1563 return false; 1564 } 1565 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */ 1566 1567 /* 1568 * Architecture PAGE_KERNEL_* fallbacks 1569 * 1570 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either 1571 * because they really don't support them, or the port needs to be updated to 1572 * reflect the required functionality. Below are a set of relatively safe 1573 * fallbacks, as best effort, which we can count on in lieu of the architectures 1574 * not defining them on their own yet. 1575 */ 1576 1577 #ifndef PAGE_KERNEL_RO 1578 # define PAGE_KERNEL_RO PAGE_KERNEL 1579 #endif 1580 1581 #ifndef PAGE_KERNEL_EXEC 1582 # define PAGE_KERNEL_EXEC PAGE_KERNEL 1583 #endif 1584 1585 /* 1586 * Page Table Modification bits for pgtbl_mod_mask. 1587 * 1588 * These are used by the p?d_alloc_track*() set of functions an in the generic 1589 * vmalloc/ioremap code to track at which page-table levels entries have been 1590 * modified. Based on that the code can better decide when vmalloc and ioremap 1591 * mapping changes need to be synchronized to other page-tables in the system. 1592 */ 1593 #define __PGTBL_PGD_MODIFIED 0 1594 #define __PGTBL_P4D_MODIFIED 1 1595 #define __PGTBL_PUD_MODIFIED 2 1596 #define __PGTBL_PMD_MODIFIED 3 1597 #define __PGTBL_PTE_MODIFIED 4 1598 1599 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED) 1600 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED) 1601 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED) 1602 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED) 1603 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED) 1604 1605 /* Page-Table Modification Mask */ 1606 typedef unsigned int pgtbl_mod_mask; 1607 1608 #endif /* !__ASSEMBLY__ */ 1609 1610 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT) 1611 #ifdef CONFIG_PHYS_ADDR_T_64BIT 1612 /* 1613 * ZSMALLOC needs to know the highest PFN on 32-bit architectures 1614 * with physical address space extension, but falls back to 1615 * BITS_PER_LONG otherwise. 1616 */ 1617 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition 1618 #else 1619 #define MAX_POSSIBLE_PHYSMEM_BITS 32 1620 #endif 1621 #endif 1622 1623 #ifndef has_transparent_hugepage 1624 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE) 1625 #endif 1626 1627 /* 1628 * On some architectures it depends on the mm if the p4d/pud or pmd 1629 * layer of the page table hierarchy is folded or not. 1630 */ 1631 #ifndef mm_p4d_folded 1632 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED) 1633 #endif 1634 1635 #ifndef mm_pud_folded 1636 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED) 1637 #endif 1638 1639 #ifndef mm_pmd_folded 1640 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED) 1641 #endif 1642 1643 #ifndef p4d_offset_lockless 1644 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address) 1645 #endif 1646 #ifndef pud_offset_lockless 1647 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address) 1648 #endif 1649 #ifndef pmd_offset_lockless 1650 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address) 1651 #endif 1652 1653 /* 1654 * p?d_leaf() - true if this entry is a final mapping to a physical address. 1655 * This differs from p?d_huge() by the fact that they are always available (if 1656 * the architecture supports large pages at the appropriate level) even 1657 * if CONFIG_HUGETLB_PAGE is not defined. 1658 * Only meaningful when called on a valid entry. 1659 */ 1660 #ifndef pgd_leaf 1661 #define pgd_leaf(x) 0 1662 #endif 1663 #ifndef p4d_leaf 1664 #define p4d_leaf(x) 0 1665 #endif 1666 #ifndef pud_leaf 1667 #define pud_leaf(x) 0 1668 #endif 1669 #ifndef pmd_leaf 1670 #define pmd_leaf(x) 0 1671 #endif 1672 1673 #ifndef pgd_leaf_size 1674 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT) 1675 #endif 1676 #ifndef p4d_leaf_size 1677 #define p4d_leaf_size(x) P4D_SIZE 1678 #endif 1679 #ifndef pud_leaf_size 1680 #define pud_leaf_size(x) PUD_SIZE 1681 #endif 1682 #ifndef pmd_leaf_size 1683 #define pmd_leaf_size(x) PMD_SIZE 1684 #endif 1685 #ifndef pte_leaf_size 1686 #define pte_leaf_size(x) PAGE_SIZE 1687 #endif 1688 1689 /* 1690 * Some architectures have MMUs that are configurable or selectable at boot 1691 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it 1692 * helps to have a static maximum value. 1693 */ 1694 1695 #ifndef MAX_PTRS_PER_PTE 1696 #define MAX_PTRS_PER_PTE PTRS_PER_PTE 1697 #endif 1698 1699 #ifndef MAX_PTRS_PER_PMD 1700 #define MAX_PTRS_PER_PMD PTRS_PER_PMD 1701 #endif 1702 1703 #ifndef MAX_PTRS_PER_PUD 1704 #define MAX_PTRS_PER_PUD PTRS_PER_PUD 1705 #endif 1706 1707 #ifndef MAX_PTRS_PER_P4D 1708 #define MAX_PTRS_PER_P4D PTRS_PER_P4D 1709 #endif 1710 1711 /* description of effects of mapping type and prot in current implementation. 1712 * this is due to the limited x86 page protection hardware. The expected 1713 * behavior is in parens: 1714 * 1715 * map_type prot 1716 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC 1717 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1718 * w: (no) no w: (no) no w: (yes) yes w: (no) no 1719 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1720 * 1721 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1722 * w: (no) no w: (no) no w: (copy) copy w: (no) no 1723 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1724 * 1725 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and 1726 * MAP_PRIVATE (with Enhanced PAN supported): 1727 * r: (no) no 1728 * w: (no) no 1729 * x: (yes) yes 1730 */ 1731 #define DECLARE_VM_GET_PAGE_PROT \ 1732 pgprot_t vm_get_page_prot(unsigned long vm_flags) \ 1733 { \ 1734 return protection_map[vm_flags & \ 1735 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \ 1736 } \ 1737 EXPORT_SYMBOL(vm_get_page_prot); 1738 1739 #endif /* _LINUX_PGTABLE_H */ 1740