1 /** 2 * PCI Endpoint *Controller* (EPC) header file 3 * 4 * Copyright (C) 2017 Texas Instruments 5 * Author: Kishon Vijay Abraham I <kishon@ti.com> 6 * 7 * This program is free software: you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 of 9 * the License as published by the Free Software Foundation. 10 */ 11 12 #ifndef __LINUX_PCI_EPC_H 13 #define __LINUX_PCI_EPC_H 14 15 #include <linux/pci-epf.h> 16 17 struct pci_epc; 18 19 enum pci_epc_irq_type { 20 PCI_EPC_IRQ_UNKNOWN, 21 PCI_EPC_IRQ_LEGACY, 22 PCI_EPC_IRQ_MSI, 23 }; 24 25 /** 26 * struct pci_epc_ops - set of function pointers for performing EPC operations 27 * @write_header: ops to populate configuration space header 28 * @set_bar: ops to configure the BAR 29 * @clear_bar: ops to reset the BAR 30 * @map_addr: ops to map CPU address to PCI address 31 * @unmap_addr: ops to unmap CPU address and PCI address 32 * @set_msi: ops to set the requested number of MSI interrupts in the MSI 33 * capability register 34 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from 35 * the MSI capability register 36 * @raise_irq: ops to raise a legacy or MSI interrupt 37 * @start: ops to start the PCI link 38 * @stop: ops to stop the PCI link 39 * @owner: the module owner containing the ops 40 */ 41 struct pci_epc_ops { 42 int (*write_header)(struct pci_epc *pci_epc, 43 struct pci_epf_header *hdr); 44 int (*set_bar)(struct pci_epc *epc, enum pci_barno bar, 45 dma_addr_t bar_phys, size_t size, int flags); 46 void (*clear_bar)(struct pci_epc *epc, enum pci_barno bar); 47 int (*map_addr)(struct pci_epc *epc, phys_addr_t addr, 48 u64 pci_addr, size_t size); 49 void (*unmap_addr)(struct pci_epc *epc, phys_addr_t addr); 50 int (*set_msi)(struct pci_epc *epc, u8 interrupts); 51 int (*get_msi)(struct pci_epc *epc); 52 int (*raise_irq)(struct pci_epc *pci_epc, 53 enum pci_epc_irq_type type, u8 interrupt_num); 54 int (*start)(struct pci_epc *epc); 55 void (*stop)(struct pci_epc *epc); 56 struct module *owner; 57 }; 58 59 /** 60 * struct pci_epc_mem - address space of the endpoint controller 61 * @phys_base: physical base address of the PCI address space 62 * @size: the size of the PCI address space 63 * @bitmap: bitmap to manage the PCI address space 64 * @pages: number of bits representing the address region 65 * @page_size: size of each page 66 */ 67 struct pci_epc_mem { 68 phys_addr_t phys_base; 69 size_t size; 70 unsigned long *bitmap; 71 size_t page_size; 72 int pages; 73 }; 74 75 /** 76 * struct pci_epc - represents the PCI EPC device 77 * @dev: PCI EPC device 78 * @pci_epf: list of endpoint functions present in this EPC device 79 * @ops: function pointers for performing endpoint operations 80 * @mem: address space of the endpoint controller 81 * @max_functions: max number of functions that can be configured in this EPC 82 * @group: configfs group representing the PCI EPC device 83 * @lock: spinlock to protect pci_epc ops 84 */ 85 struct pci_epc { 86 struct device dev; 87 struct list_head pci_epf; 88 const struct pci_epc_ops *ops; 89 struct pci_epc_mem *mem; 90 u8 max_functions; 91 struct config_group *group; 92 /* spinlock to protect against concurrent access of EP controller */ 93 spinlock_t lock; 94 }; 95 96 #define to_pci_epc(device) container_of((device), struct pci_epc, dev) 97 98 #define pci_epc_create(dev, ops) \ 99 __pci_epc_create((dev), (ops), THIS_MODULE) 100 #define devm_pci_epc_create(dev, ops) \ 101 __devm_pci_epc_create((dev), (ops), THIS_MODULE) 102 103 #define pci_epc_mem_init(epc, phys_addr, size) \ 104 __pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE) 105 106 static inline void epc_set_drvdata(struct pci_epc *epc, void *data) 107 { 108 dev_set_drvdata(&epc->dev, data); 109 } 110 111 static inline void *epc_get_drvdata(struct pci_epc *epc) 112 { 113 return dev_get_drvdata(&epc->dev); 114 } 115 116 struct pci_epc * 117 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 118 struct module *owner); 119 struct pci_epc * 120 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 121 struct module *owner); 122 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc); 123 void pci_epc_destroy(struct pci_epc *epc); 124 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf); 125 void pci_epc_linkup(struct pci_epc *epc); 126 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf); 127 int pci_epc_write_header(struct pci_epc *epc, struct pci_epf_header *hdr); 128 int pci_epc_set_bar(struct pci_epc *epc, enum pci_barno bar, 129 dma_addr_t bar_phys, size_t size, int flags); 130 void pci_epc_clear_bar(struct pci_epc *epc, int bar); 131 int pci_epc_map_addr(struct pci_epc *epc, phys_addr_t phys_addr, 132 u64 pci_addr, size_t size); 133 void pci_epc_unmap_addr(struct pci_epc *epc, phys_addr_t phys_addr); 134 int pci_epc_set_msi(struct pci_epc *epc, u8 interrupts); 135 int pci_epc_get_msi(struct pci_epc *epc); 136 int pci_epc_raise_irq(struct pci_epc *epc, enum pci_epc_irq_type type, 137 u8 interrupt_num); 138 int pci_epc_start(struct pci_epc *epc); 139 void pci_epc_stop(struct pci_epc *epc); 140 struct pci_epc *pci_epc_get(const char *epc_name); 141 void pci_epc_put(struct pci_epc *epc); 142 143 int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size, 144 size_t page_size); 145 void pci_epc_mem_exit(struct pci_epc *epc); 146 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc, 147 phys_addr_t *phys_addr, size_t size); 148 void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr, 149 void __iomem *virt_addr, size_t size); 150 #endif /* __LINUX_PCI_EPC_H */ 151