1da7fbe58SPierre Ossman /* 2da7fbe58SPierre Ossman * Header for MultiMediaCard (MMC) 3da7fbe58SPierre Ossman * 4da7fbe58SPierre Ossman * Copyright 2002 Hewlett-Packard Company 5da7fbe58SPierre Ossman * 6da7fbe58SPierre Ossman * Use consistent with the GNU GPL is permitted, 7da7fbe58SPierre Ossman * provided that this copyright notice is 8da7fbe58SPierre Ossman * preserved in its entirety in all copies and derived works. 9da7fbe58SPierre Ossman * 10da7fbe58SPierre Ossman * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, 11da7fbe58SPierre Ossman * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS 12da7fbe58SPierre Ossman * FITNESS FOR ANY PARTICULAR PURPOSE. 13da7fbe58SPierre Ossman * 14da7fbe58SPierre Ossman * Many thanks to Alessandro Rubini and Jonathan Corbet! 15da7fbe58SPierre Ossman * 16da7fbe58SPierre Ossman * Based strongly on code by: 17da7fbe58SPierre Ossman * 18da7fbe58SPierre Ossman * Author: Yong-iL Joh <tolkien@mizi.com> 19da7fbe58SPierre Ossman * 20da7fbe58SPierre Ossman * Author: Andrew Christian 21da7fbe58SPierre Ossman * 15 May 2002 22da7fbe58SPierre Ossman */ 23da7fbe58SPierre Ossman 24da7fbe58SPierre Ossman #ifndef MMC_MMC_H 25da7fbe58SPierre Ossman #define MMC_MMC_H 26da7fbe58SPierre Ossman 27da7fbe58SPierre Ossman /* Standard MMC commands (4.1) type argument response */ 28da7fbe58SPierre Ossman /* class 1 */ 29da7fbe58SPierre Ossman #define MMC_GO_IDLE_STATE 0 /* bc */ 30da7fbe58SPierre Ossman #define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ 31da7fbe58SPierre Ossman #define MMC_ALL_SEND_CID 2 /* bcr R2 */ 32da7fbe58SPierre Ossman #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ 33da7fbe58SPierre Ossman #define MMC_SET_DSR 4 /* bc [31:16] RCA */ 34b1ebe384SJarkko Lavinen #define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */ 35da7fbe58SPierre Ossman #define MMC_SWITCH 6 /* ac [31:0] See below R1b */ 36da7fbe58SPierre Ossman #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ 37da7fbe58SPierre Ossman #define MMC_SEND_EXT_CSD 8 /* adtc R1 */ 38da7fbe58SPierre Ossman #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ 39da7fbe58SPierre Ossman #define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ 40da7fbe58SPierre Ossman #define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ 41da7fbe58SPierre Ossman #define MMC_STOP_TRANSMISSION 12 /* ac R1b */ 42da7fbe58SPierre Ossman #define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ 43da7fbe58SPierre Ossman #define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ 4497018580SDavid Brownell #define MMC_SPI_READ_OCR 58 /* spi spi_R3 */ 4597018580SDavid Brownell #define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */ 46da7fbe58SPierre Ossman 47da7fbe58SPierre Ossman /* class 2 */ 48da7fbe58SPierre Ossman #define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ 49da7fbe58SPierre Ossman #define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ 50da7fbe58SPierre Ossman #define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ 51da7fbe58SPierre Ossman 52da7fbe58SPierre Ossman /* class 3 */ 53da7fbe58SPierre Ossman #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ 54da7fbe58SPierre Ossman 55da7fbe58SPierre Ossman /* class 4 */ 56da7fbe58SPierre Ossman #define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ 57da7fbe58SPierre Ossman #define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ 58da7fbe58SPierre Ossman #define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ 59da7fbe58SPierre Ossman #define MMC_PROGRAM_CID 26 /* adtc R1 */ 60da7fbe58SPierre Ossman #define MMC_PROGRAM_CSD 27 /* adtc R1 */ 61da7fbe58SPierre Ossman 62da7fbe58SPierre Ossman /* class 6 */ 63da7fbe58SPierre Ossman #define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ 64da7fbe58SPierre Ossman #define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ 65da7fbe58SPierre Ossman #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ 66da7fbe58SPierre Ossman 67da7fbe58SPierre Ossman /* class 5 */ 68da7fbe58SPierre Ossman #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ 69da7fbe58SPierre Ossman #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ 70da7fbe58SPierre Ossman #define MMC_ERASE 38 /* ac R1b */ 71da7fbe58SPierre Ossman 72da7fbe58SPierre Ossman /* class 9 */ 73da7fbe58SPierre Ossman #define MMC_FAST_IO 39 /* ac <Complex> R4 */ 74da7fbe58SPierre Ossman #define MMC_GO_IRQ_STATE 40 /* bcr R5 */ 75da7fbe58SPierre Ossman 76da7fbe58SPierre Ossman /* class 7 */ 77da7fbe58SPierre Ossman #define MMC_LOCK_UNLOCK 42 /* adtc R1b */ 78da7fbe58SPierre Ossman 79da7fbe58SPierre Ossman /* class 8 */ 80da7fbe58SPierre Ossman #define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ 81da7fbe58SPierre Ossman #define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */ 82da7fbe58SPierre Ossman 83da7fbe58SPierre Ossman /* 84da7fbe58SPierre Ossman * MMC_SWITCH argument format: 85da7fbe58SPierre Ossman * 86da7fbe58SPierre Ossman * [31:26] Always 0 87da7fbe58SPierre Ossman * [25:24] Access Mode 88da7fbe58SPierre Ossman * [23:16] Location of target Byte in EXT_CSD 89da7fbe58SPierre Ossman * [15:08] Value Byte 90da7fbe58SPierre Ossman * [07:03] Always 0 91da7fbe58SPierre Ossman * [02:00] Command Set 92da7fbe58SPierre Ossman */ 93da7fbe58SPierre Ossman 94da7fbe58SPierre Ossman /* 9597018580SDavid Brownell MMC status in R1, for native mode (SPI bits are different) 96da7fbe58SPierre Ossman Type 97da7fbe58SPierre Ossman e : error bit 98da7fbe58SPierre Ossman s : status bit 99da7fbe58SPierre Ossman r : detected and set for the actual command response 100da7fbe58SPierre Ossman x : detected and set during command execution. the host must poll 101da7fbe58SPierre Ossman the card by sending status command in order to read these bits. 102da7fbe58SPierre Ossman Clear condition 103da7fbe58SPierre Ossman a : according to the card state 104da7fbe58SPierre Ossman b : always related to the previous command. Reception of 105da7fbe58SPierre Ossman a valid command will clear it (with a delay of one command) 106da7fbe58SPierre Ossman c : clear by read 107da7fbe58SPierre Ossman */ 108da7fbe58SPierre Ossman 109da7fbe58SPierre Ossman #define R1_OUT_OF_RANGE (1 << 31) /* er, c */ 110da7fbe58SPierre Ossman #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ 111da7fbe58SPierre Ossman #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ 112da7fbe58SPierre Ossman #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ 113da7fbe58SPierre Ossman #define R1_ERASE_PARAM (1 << 27) /* ex, c */ 114da7fbe58SPierre Ossman #define R1_WP_VIOLATION (1 << 26) /* erx, c */ 115da7fbe58SPierre Ossman #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ 116da7fbe58SPierre Ossman #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ 117da7fbe58SPierre Ossman #define R1_COM_CRC_ERROR (1 << 23) /* er, b */ 118da7fbe58SPierre Ossman #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ 119da7fbe58SPierre Ossman #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ 120da7fbe58SPierre Ossman #define R1_CC_ERROR (1 << 20) /* erx, c */ 121da7fbe58SPierre Ossman #define R1_ERROR (1 << 19) /* erx, c */ 122da7fbe58SPierre Ossman #define R1_UNDERRUN (1 << 18) /* ex, c */ 123da7fbe58SPierre Ossman #define R1_OVERRUN (1 << 17) /* ex, c */ 124da7fbe58SPierre Ossman #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ 125da7fbe58SPierre Ossman #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ 126da7fbe58SPierre Ossman #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ 127da7fbe58SPierre Ossman #define R1_ERASE_RESET (1 << 13) /* sr, c */ 128da7fbe58SPierre Ossman #define R1_STATUS(x) (x & 0xFFFFE000) 129da7fbe58SPierre Ossman #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ 130da7fbe58SPierre Ossman #define R1_READY_FOR_DATA (1 << 8) /* sx, a */ 131ef0b27d4SAdrian Hunter #define R1_SWITCH_ERROR (1 << 7) /* sx, c */ 132da7fbe58SPierre Ossman #define R1_APP_CMD (1 << 5) /* sr, c */ 133da7fbe58SPierre Ossman 13497018580SDavid Brownell /* 13597018580SDavid Brownell * MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS 13697018580SDavid Brownell * R1 is the low order byte; R2 is the next highest byte, when present. 13797018580SDavid Brownell */ 13897018580SDavid Brownell #define R1_SPI_IDLE (1 << 0) 13997018580SDavid Brownell #define R1_SPI_ERASE_RESET (1 << 1) 14097018580SDavid Brownell #define R1_SPI_ILLEGAL_COMMAND (1 << 2) 14197018580SDavid Brownell #define R1_SPI_COM_CRC (1 << 3) 14297018580SDavid Brownell #define R1_SPI_ERASE_SEQ (1 << 4) 14397018580SDavid Brownell #define R1_SPI_ADDRESS (1 << 5) 14497018580SDavid Brownell #define R1_SPI_PARAMETER (1 << 6) 14597018580SDavid Brownell /* R1 bit 7 is always zero */ 14697018580SDavid Brownell #define R2_SPI_CARD_LOCKED (1 << 8) 14797018580SDavid Brownell #define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */ 14897018580SDavid Brownell #define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP 14997018580SDavid Brownell #define R2_SPI_ERROR (1 << 10) 15097018580SDavid Brownell #define R2_SPI_CC_ERROR (1 << 11) 15197018580SDavid Brownell #define R2_SPI_CARD_ECC_ERROR (1 << 12) 15297018580SDavid Brownell #define R2_SPI_WP_VIOLATION (1 << 13) 15397018580SDavid Brownell #define R2_SPI_ERASE_PARAM (1 << 14) 15497018580SDavid Brownell #define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */ 15597018580SDavid Brownell #define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE 15697018580SDavid Brownell 157da7fbe58SPierre Ossman /* These are unpacked versions of the actual responses */ 158da7fbe58SPierre Ossman 159da7fbe58SPierre Ossman struct _mmc_csd { 160da7fbe58SPierre Ossman u8 csd_structure; 161da7fbe58SPierre Ossman u8 spec_vers; 162da7fbe58SPierre Ossman u8 taac; 163da7fbe58SPierre Ossman u8 nsac; 164da7fbe58SPierre Ossman u8 tran_speed; 165da7fbe58SPierre Ossman u16 ccc; 166da7fbe58SPierre Ossman u8 read_bl_len; 167da7fbe58SPierre Ossman u8 read_bl_partial; 168da7fbe58SPierre Ossman u8 write_blk_misalign; 169da7fbe58SPierre Ossman u8 read_blk_misalign; 170da7fbe58SPierre Ossman u8 dsr_imp; 171da7fbe58SPierre Ossman u16 c_size; 172da7fbe58SPierre Ossman u8 vdd_r_curr_min; 173da7fbe58SPierre Ossman u8 vdd_r_curr_max; 174da7fbe58SPierre Ossman u8 vdd_w_curr_min; 175da7fbe58SPierre Ossman u8 vdd_w_curr_max; 176da7fbe58SPierre Ossman u8 c_size_mult; 177da7fbe58SPierre Ossman union { 178da7fbe58SPierre Ossman struct { /* MMC system specification version 3.1 */ 179da7fbe58SPierre Ossman u8 erase_grp_size; 180da7fbe58SPierre Ossman u8 erase_grp_mult; 181da7fbe58SPierre Ossman } v31; 182da7fbe58SPierre Ossman struct { /* MMC system specification version 2.2 */ 183da7fbe58SPierre Ossman u8 sector_size; 184da7fbe58SPierre Ossman u8 erase_grp_size; 185da7fbe58SPierre Ossman } v22; 186da7fbe58SPierre Ossman } erase; 187da7fbe58SPierre Ossman u8 wp_grp_size; 188da7fbe58SPierre Ossman u8 wp_grp_enable; 189da7fbe58SPierre Ossman u8 default_ecc; 190da7fbe58SPierre Ossman u8 r2w_factor; 191da7fbe58SPierre Ossman u8 write_bl_len; 192da7fbe58SPierre Ossman u8 write_bl_partial; 193da7fbe58SPierre Ossman u8 file_format_grp; 194da7fbe58SPierre Ossman u8 copy; 195da7fbe58SPierre Ossman u8 perm_write_protect; 196da7fbe58SPierre Ossman u8 tmp_write_protect; 197da7fbe58SPierre Ossman u8 file_format; 198da7fbe58SPierre Ossman u8 ecc; 199da7fbe58SPierre Ossman }; 200da7fbe58SPierre Ossman 201da7fbe58SPierre Ossman /* 202da7fbe58SPierre Ossman * OCR bits are mostly in host.h 203da7fbe58SPierre Ossman */ 204da7fbe58SPierre Ossman #define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ 205da7fbe58SPierre Ossman 206da7fbe58SPierre Ossman /* 207da7fbe58SPierre Ossman * Card Command Classes (CCC) 208da7fbe58SPierre Ossman */ 209da7fbe58SPierre Ossman #define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ 210da7fbe58SPierre Ossman /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ 21197018580SDavid Brownell /* (and for SPI, CMD58,59) */ 212da7fbe58SPierre Ossman #define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ 213da7fbe58SPierre Ossman /* (CMD11) */ 214da7fbe58SPierre Ossman #define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ 215da7fbe58SPierre Ossman /* (CMD16,17,18) */ 216da7fbe58SPierre Ossman #define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */ 217da7fbe58SPierre Ossman /* (CMD20) */ 218da7fbe58SPierre Ossman #define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */ 219da7fbe58SPierre Ossman /* (CMD16,24,25,26,27) */ 220da7fbe58SPierre Ossman #define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */ 221da7fbe58SPierre Ossman /* (CMD32,33,34,35,36,37,38,39) */ 222da7fbe58SPierre Ossman #define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */ 223da7fbe58SPierre Ossman /* (CMD28,29,30) */ 224da7fbe58SPierre Ossman #define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */ 225da7fbe58SPierre Ossman /* (CMD16,CMD42) */ 226da7fbe58SPierre Ossman #define CCC_APP_SPEC (1<<8) /* (8) Application specific */ 227da7fbe58SPierre Ossman /* (CMD55,56,57,ACMD*) */ 228da7fbe58SPierre Ossman #define CCC_IO_MODE (1<<9) /* (9) I/O mode */ 229da7fbe58SPierre Ossman /* (CMD5,39,40,52,53) */ 230da7fbe58SPierre Ossman #define CCC_SWITCH (1<<10) /* (10) High speed switch */ 231da7fbe58SPierre Ossman /* (CMD6,34,35,36,37,50) */ 232da7fbe58SPierre Ossman /* (11) Reserved */ 233da7fbe58SPierre Ossman /* (CMD?) */ 234da7fbe58SPierre Ossman 235da7fbe58SPierre Ossman /* 236da7fbe58SPierre Ossman * CSD field definitions 237da7fbe58SPierre Ossman */ 238da7fbe58SPierre Ossman 239da7fbe58SPierre Ossman #define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ 240da7fbe58SPierre Ossman #define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ 241da7fbe58SPierre Ossman #define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */ 242da7fbe58SPierre Ossman #define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */ 243da7fbe58SPierre Ossman 244da7fbe58SPierre Ossman #define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ 245da7fbe58SPierre Ossman #define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ 246da7fbe58SPierre Ossman #define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ 247da7fbe58SPierre Ossman #define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */ 248da7fbe58SPierre Ossman #define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */ 249da7fbe58SPierre Ossman 250da7fbe58SPierre Ossman /* 251da7fbe58SPierre Ossman * EXT_CSD fields 252da7fbe58SPierre Ossman */ 253da7fbe58SPierre Ossman 254da7fbe58SPierre Ossman #define EXT_CSD_BUS_WIDTH 183 /* R/W */ 255da7fbe58SPierre Ossman #define EXT_CSD_HS_TIMING 185 /* R/W */ 256da7fbe58SPierre Ossman #define EXT_CSD_CARD_TYPE 196 /* RO */ 257d7604d76SPierre Ossman #define EXT_CSD_REV 192 /* RO */ 258da7fbe58SPierre Ossman #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 259b1ebe384SJarkko Lavinen #define EXT_CSD_S_A_TIMEOUT 217 260da7fbe58SPierre Ossman 261da7fbe58SPierre Ossman /* 262da7fbe58SPierre Ossman * EXT_CSD field definitions 263da7fbe58SPierre Ossman */ 264da7fbe58SPierre Ossman 265da7fbe58SPierre Ossman #define EXT_CSD_CMD_SET_NORMAL (1<<0) 266da7fbe58SPierre Ossman #define EXT_CSD_CMD_SET_SECURE (1<<1) 267da7fbe58SPierre Ossman #define EXT_CSD_CMD_SET_CPSECURE (1<<2) 268da7fbe58SPierre Ossman 269da7fbe58SPierre Ossman #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ 270da7fbe58SPierre Ossman #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ 271da7fbe58SPierre Ossman 272da7fbe58SPierre Ossman #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 273da7fbe58SPierre Ossman #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 274da7fbe58SPierre Ossman #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ 275da7fbe58SPierre Ossman 276da7fbe58SPierre Ossman /* 277da7fbe58SPierre Ossman * MMC_SWITCH access modes 278da7fbe58SPierre Ossman */ 279da7fbe58SPierre Ossman 280da7fbe58SPierre Ossman #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ 281da7fbe58SPierre Ossman #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */ 282da7fbe58SPierre Ossman #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */ 283da7fbe58SPierre Ossman #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */ 284da7fbe58SPierre Ossman 285da7fbe58SPierre Ossman #endif /* MMC_MMC_PROTOCOL_H */ 286da7fbe58SPierre Ossman 287