17701707cSSaeed Mahameed /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 27701707cSSaeed Mahameed /* Copyright (c) 2018 Mellanox Technologies. */ 37701707cSSaeed Mahameed 47701707cSSaeed Mahameed #ifndef MLX5_CORE_EQ_H 57701707cSSaeed Mahameed #define MLX5_CORE_EQ_H 67701707cSSaeed Mahameed 77701707cSSaeed Mahameed #include <linux/mlx5/driver.h> 87701707cSSaeed Mahameed 97701707cSSaeed Mahameed enum { 107701707cSSaeed Mahameed MLX5_EQ_PAGEREQ_IDX = 0, 117701707cSSaeed Mahameed MLX5_EQ_CMD_IDX = 1, 127701707cSSaeed Mahameed MLX5_EQ_ASYNC_IDX = 2, 137701707cSSaeed Mahameed /* reserved to be used by mlx5_core ulps (mlx5e/mlx5_ib) */ 147701707cSSaeed Mahameed MLX5_EQ_PFAULT_IDX = 3, 157701707cSSaeed Mahameed MLX5_EQ_MAX_ASYNC_EQS, 167701707cSSaeed Mahameed /* completion eqs vector indices start here */ 177701707cSSaeed Mahameed MLX5_EQ_VEC_COMP_BASE = MLX5_EQ_MAX_ASYNC_EQS, 187701707cSSaeed Mahameed }; 197701707cSSaeed Mahameed 207701707cSSaeed Mahameed struct mlx5_eq; 217701707cSSaeed Mahameed 227701707cSSaeed Mahameed struct mlx5_eq_param { 237701707cSSaeed Mahameed u8 index; 247701707cSSaeed Mahameed int nent; 257701707cSSaeed Mahameed u64 mask; 267701707cSSaeed Mahameed void *context; 277701707cSSaeed Mahameed irq_handler_t handler; 287701707cSSaeed Mahameed }; 297701707cSSaeed Mahameed 307701707cSSaeed Mahameed struct mlx5_eq * 317701707cSSaeed Mahameed mlx5_eq_create_generic(struct mlx5_core_dev *dev, const char *name, 327701707cSSaeed Mahameed struct mlx5_eq_param *param); 337701707cSSaeed Mahameed int 347701707cSSaeed Mahameed mlx5_eq_destroy_generic(struct mlx5_core_dev *dev, struct mlx5_eq *eq); 357701707cSSaeed Mahameed 367701707cSSaeed Mahameed struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq *eq, u32 cc); 377701707cSSaeed Mahameed void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm); 387701707cSSaeed Mahameed 397701707cSSaeed Mahameed #endif /* MLX5_CORE_EQ_H */ 40