xref: /openbmc/linux/include/linux/mfd/wm8994/pdata.h (revision 1ac7072c)
12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
29e501086SMark Brown /*
39e501086SMark Brown  * include/linux/mfd/wm8994/pdata.h -- Platform data for WM8994
49e501086SMark Brown  *
59e501086SMark Brown  * Copyright 2009 Wolfson Microelectronics PLC.
69e501086SMark Brown  *
79e501086SMark Brown  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
89e501086SMark Brown  */
99e501086SMark Brown 
109e501086SMark Brown #ifndef __MFD_WM8994_PDATA_H__
119e501086SMark Brown #define __MFD_WM8994_PDATA_H__
129e501086SMark Brown 
139e501086SMark Brown #define WM8994_NUM_LDO   2
149e501086SMark Brown #define WM8994_NUM_GPIO 11
153cf956eeSMark Brown #define WM8994_NUM_AIF   3
169e501086SMark Brown 
179e501086SMark Brown struct wm8994_ldo_pdata {
1843913e5eSMark Brown 	const struct regulator_init_data *init_data;
199e501086SMark Brown };
209e501086SMark Brown 
218efcc57dSMark Brown #define WM8994_CONFIGURE_GPIO 0x10000
229e501086SMark Brown 
239e501086SMark Brown #define WM8994_DRC_REGS 5
243fcc0afbSUk Kim #define WM8994_EQ_REGS  20
25131d8106SMark Brown #define WM8958_MBC_CUTOFF_REGS 20
26131d8106SMark Brown #define WM8958_MBC_COEFF_REGS  48
2709e10d7fSMark Brown #define WM8958_MBC_COMBINED_REGS 56
2809e10d7fSMark Brown #define WM8958_VSS_HPF_REGS 2
2909e10d7fSMark Brown #define WM8958_VSS_REGS 148
3031215871SMark Brown #define WM8958_ENH_EQ_REGS 32
319e501086SMark Brown 
329e501086SMark Brown /**
339e501086SMark Brown  * DRC configurations are specified with a label and a set of register
349e501086SMark Brown  * values to write (the enable bits will be ignored).  At runtime an
359e501086SMark Brown  * enumerated control will be presented for each DRC block allowing
361ac7072cSGeert Uytterhoeven  * the user to choose the configuration to use.
379e501086SMark Brown  *
389e501086SMark Brown  * Configurations may be generated by hand or by using the DRC control
399e501086SMark Brown  * panel provided by the WISCE - see  http://www.wolfsonmicro.com/wisce/
409e501086SMark Brown  * for details.
419e501086SMark Brown  */
429e501086SMark Brown struct wm8994_drc_cfg {
439e501086SMark Brown         const char *name;
449e501086SMark Brown         u16 regs[WM8994_DRC_REGS];
459e501086SMark Brown };
469e501086SMark Brown 
479e501086SMark Brown /**
489e501086SMark Brown  * ReTune Mobile configurations are specified with a label, sample
499e501086SMark Brown  * rate and set of values to write (the enable bits will be ignored).
509e501086SMark Brown  *
519e501086SMark Brown  * Configurations are expected to be generated using the ReTune Mobile
529e501086SMark Brown  * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
539e501086SMark Brown  */
549e501086SMark Brown struct wm8994_retune_mobile_cfg {
559e501086SMark Brown         const char *name;
569e501086SMark Brown         unsigned int rate;
579e501086SMark Brown         u16 regs[WM8994_EQ_REGS];
589e501086SMark Brown };
599e501086SMark Brown 
60131d8106SMark Brown /**
61131d8106SMark Brown  * Multiband compressor configurations are specified with a label and
62131d8106SMark Brown  * two sets of values to write.  Configurations are expected to be
63131d8106SMark Brown  * generated using the multiband compressor configuration panel in
64131d8106SMark Brown  * WISCE - see http://www.wolfsonmicro.com/wisce/
65131d8106SMark Brown  */
66131d8106SMark Brown struct wm8958_mbc_cfg {
67131d8106SMark Brown 	const char *name;
68131d8106SMark Brown 	u16 cutoff_regs[WM8958_MBC_CUTOFF_REGS];
69131d8106SMark Brown 	u16 coeff_regs[WM8958_MBC_COEFF_REGS];
7009e10d7fSMark Brown 
7109e10d7fSMark Brown 	/* Coefficient layout when using MBC+VSS firmware */
7209e10d7fSMark Brown 	u16 combined_regs[WM8958_MBC_COMBINED_REGS];
7309e10d7fSMark Brown };
7409e10d7fSMark Brown 
7509e10d7fSMark Brown /**
7609e10d7fSMark Brown  * VSS HPF configurations are specified with a label and two values to
7709e10d7fSMark Brown  * write.  Configurations are expected to be generated using the
7809e10d7fSMark Brown  * multiband compressor configuration panel in WISCE - see
7909e10d7fSMark Brown  * http://www.wolfsonmicro.com/wisce/
8009e10d7fSMark Brown  */
8109e10d7fSMark Brown struct wm8958_vss_hpf_cfg {
8209e10d7fSMark Brown 	const char *name;
8309e10d7fSMark Brown 	u16 regs[WM8958_VSS_HPF_REGS];
8409e10d7fSMark Brown };
8509e10d7fSMark Brown 
8609e10d7fSMark Brown /**
8709e10d7fSMark Brown  * VSS configurations are specified with a label and array of values
8809e10d7fSMark Brown  * to write.  Configurations are expected to be generated using the
8909e10d7fSMark Brown  * multiband compressor configuration panel in WISCE - see
9009e10d7fSMark Brown  * http://www.wolfsonmicro.com/wisce/
9109e10d7fSMark Brown  */
9209e10d7fSMark Brown struct wm8958_vss_cfg {
9309e10d7fSMark Brown 	const char *name;
9409e10d7fSMark Brown 	u16 regs[WM8958_VSS_REGS];
95131d8106SMark Brown };
96131d8106SMark Brown 
9731215871SMark Brown /**
9831215871SMark Brown  * Enhanced EQ configurations are specified with a label and array of
9931215871SMark Brown  * values to write.  Configurations are expected to be generated using
10031215871SMark Brown  * the multiband compressor configuration panel in WISCE - see
10131215871SMark Brown  * http://www.wolfsonmicro.com/wisce/
10231215871SMark Brown  */
10331215871SMark Brown struct wm8958_enh_eq_cfg {
10431215871SMark Brown 	const char *name;
10531215871SMark Brown 	u16 regs[WM8958_ENH_EQ_REGS];
10631215871SMark Brown };
10731215871SMark Brown 
108cd1707a9SMark Brown /**
109cd1707a9SMark Brown  * Microphone detection rates, used to tune response rates and power
110cd1707a9SMark Brown  * consumption for WM8958/WM1811 microphone detection.
111cd1707a9SMark Brown  *
112cd1707a9SMark Brown  * @sysclk: System clock rate to use this configuration for.
113cd1707a9SMark Brown  * @idle: True if this configuration should use when no accessory is detected,
114cd1707a9SMark Brown  *        false otherwise.
115cd1707a9SMark Brown  * @start: Value for MICD_BIAS_START_TIME register field (not shifted).
116cd1707a9SMark Brown  * @rate: Value for MICD_RATE register field (not shifted).
117cd1707a9SMark Brown  */
118cd1707a9SMark Brown struct wm8958_micd_rate {
119cd1707a9SMark Brown 	int sysclk;
120cd1707a9SMark Brown 	bool idle;
121cd1707a9SMark Brown 	int start;
122cd1707a9SMark Brown 	int rate;
123cd1707a9SMark Brown };
124cd1707a9SMark Brown 
1259e501086SMark Brown struct wm8994_pdata {
1269e501086SMark Brown 	int gpio_base;
1279e501086SMark Brown 
1289e501086SMark Brown 	/**
1299e501086SMark Brown 	 * Default values for GPIOs if non-zero, WM8994_CONFIGURE_GPIO
1309e501086SMark Brown 	 * can be used for all zero values.
1319e501086SMark Brown 	 */
1329e501086SMark Brown 	int gpio_defaults[WM8994_NUM_GPIO];
1339e501086SMark Brown 
1349e501086SMark Brown 	struct wm8994_ldo_pdata ldo[WM8994_NUM_LDO];
1359e501086SMark Brown 
136c9fbf7e0SMark Brown 	int irq_base;  /** Base IRQ number for WM8994, required for IRQs */
137b0ab907dSMark Brown 	unsigned long irq_flags; /** user irq flags */
1389e501086SMark Brown 
1399e501086SMark Brown         int num_drc_cfgs;
1409e501086SMark Brown         struct wm8994_drc_cfg *drc_cfgs;
1419e501086SMark Brown 
1429e501086SMark Brown         int num_retune_mobile_cfgs;
1439e501086SMark Brown         struct wm8994_retune_mobile_cfg *retune_mobile_cfgs;
1449e501086SMark Brown 
145131d8106SMark Brown 	int num_mbc_cfgs;
146131d8106SMark Brown 	struct wm8958_mbc_cfg *mbc_cfgs;
147131d8106SMark Brown 
14809e10d7fSMark Brown 	int num_vss_cfgs;
14909e10d7fSMark Brown 	struct wm8958_vss_cfg *vss_cfgs;
15009e10d7fSMark Brown 
15109e10d7fSMark Brown 	int num_vss_hpf_cfgs;
15209e10d7fSMark Brown 	struct wm8958_vss_hpf_cfg *vss_hpf_cfgs;
15309e10d7fSMark Brown 
15431215871SMark Brown 	int num_enh_eq_cfgs;
15531215871SMark Brown 	struct wm8958_enh_eq_cfg *enh_eq_cfgs;
15631215871SMark Brown 
157cd1707a9SMark Brown 	int num_micd_rates;
158cd1707a9SMark Brown 	struct wm8958_micd_rate *micd_rates;
159cd1707a9SMark Brown 
16002e79476SMark Brown 	/* Power up delays to add after microphone bias power up (ms) */
16102e79476SMark Brown 	int micb1_delay;
16202e79476SMark Brown 	int micb2_delay;
16302e79476SMark Brown 
1649e501086SMark Brown         /* LINEOUT can be differential or single ended */
1659e501086SMark Brown         unsigned int lineout1_diff:1;
1669e501086SMark Brown         unsigned int lineout2_diff:1;
1679e501086SMark Brown 
1689e501086SMark Brown         /* Common mode feedback */
1699e501086SMark Brown         unsigned int lineout1fb:1;
1709e501086SMark Brown         unsigned int lineout2fb:1;
1719e501086SMark Brown 
172c0cc3f16SMark Brown 	/* Delay between detecting a jack and starting microphone
173c0cc3f16SMark Brown 	 * detect (specified in ms)
174c0cc3f16SMark Brown 	 */
175c0cc3f16SMark Brown 	int micdet_delay;
176c0cc3f16SMark Brown 
1772da1c4bfSMark Brown 	/* Delay between microphone detect completing and reporting on
1782da1c4bfSMark Brown 	 * insert (specified in ms)
1792da1c4bfSMark Brown 	 */
1802da1c4bfSMark Brown 	int mic_id_delay;
1812da1c4bfSMark Brown 
1829b7c525dSMark Brown 	/* IRQ for microphone detection if brought out directly as a
1839b7c525dSMark Brown 	 * signal.
1849b7c525dSMark Brown 	 */
1859b7c525dSMark Brown 	int micdet_irq;
1869b7c525dSMark Brown 
18748e028ecSMark Brown         /* WM8994 microphone biases: 0=0.9*AVDD1 1=0.65*AVVD1 */
1889e501086SMark Brown         unsigned int micbias1_lvl:1;
1899e501086SMark Brown         unsigned int micbias2_lvl:1;
1909e501086SMark Brown 
19148e028ecSMark Brown         /* WM8994 jack detect threashold levels, see datasheet for values */
1929e501086SMark Brown         unsigned int jd_scthr:2;
1939e501086SMark Brown         unsigned int jd_thr:2;
19448e028ecSMark Brown 
19507fb9d9eSMark Brown 	/* Configure WM1811 jack detection for use with external capacitor */
19607fb9d9eSMark Brown 	unsigned int jd_ext_cap:1;
19707fb9d9eSMark Brown 
19848e028ecSMark Brown 	/* WM8958 microphone bias configuration */
19948e028ecSMark Brown 	int micbias[2];
200881de670SMark Brown 
2014585790dSMark Brown 	/* WM8958 microphone detection ranges */
2024585790dSMark Brown 	u16 micd_lvl_sel;
2034585790dSMark Brown 
204881de670SMark Brown 	/* Disable the internal pull downs on the LDOs if they are
205881de670SMark Brown 	 * always driven (eg, connected to an always on supply or
206881de670SMark Brown 	 * GPIO that always drives an output.  If they float power
207881de670SMark Brown 	 * consumption will rise.
208881de670SMark Brown 	 */
209881de670SMark Brown 	bool ldo_ena_always_driven;
21026c34c25SMark Brown 
21126c34c25SMark Brown 	/*
21226c34c25SMark Brown 	 * SPKMODE must be pulled internally by the device on this
21326c34c25SMark Brown 	 * system.
21426c34c25SMark Brown 	 */
21526c34c25SMark Brown 	bool spkmode_pu;
2163cf956eeSMark Brown 
2174d3e55bcSAlberto Panizzo 	/*
2184d3e55bcSAlberto Panizzo 	 * CS/ADDR must be pulled internally by the device on this
2194d3e55bcSAlberto Panizzo 	 * system.
2204d3e55bcSAlberto Panizzo 	 */
2214d3e55bcSAlberto Panizzo 	bool csnaddr_pd;
2224d3e55bcSAlberto Panizzo 
2233cf956eeSMark Brown 	/**
2243cf956eeSMark Brown 	 * Maximum number of channels clocks will be generated for,
2253cf956eeSMark Brown 	 * useful for systems where and I2S bus with multiple data
2263cf956eeSMark Brown 	 * lines is mastered.
2273cf956eeSMark Brown 	 */
2283cf956eeSMark Brown 	int max_channels_clocked[WM8994_NUM_AIF];
2297c884448SMark Brown 
2307c884448SMark Brown 	/**
2317c884448SMark Brown 	 * GPIO for the IRQ pin if host only supports edge triggering
2327c884448SMark Brown 	 */
2337c884448SMark Brown 	int irq_gpio;
2349e501086SMark Brown };
2359e501086SMark Brown 
2369e501086SMark Brown #endif
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