1*abd46274SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2b45b719eSAndrew F. Davis /* 34f4ed454SAlexander A. Klimov * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/ 4b45b719eSAndrew F. Davis * Andrew F. Davis <afd@ti.com> 5b45b719eSAndrew F. Davis * 6b45b719eSAndrew F. Davis * Based on the TPS65912 driver 7b45b719eSAndrew F. Davis */ 8b45b719eSAndrew F. Davis 9b45b719eSAndrew F. Davis #ifndef __LINUX_MFD_TPS65086_H 10b45b719eSAndrew F. Davis #define __LINUX_MFD_TPS65086_H 11b45b719eSAndrew F. Davis 12b45b719eSAndrew F. Davis #include <linux/device.h> 13b45b719eSAndrew F. Davis #include <linux/regmap.h> 14b45b719eSAndrew F. Davis 15b45b719eSAndrew F. Davis /* List of registers for TPS65086 */ 16b45b719eSAndrew F. Davis #define TPS65086_DEVICEID 0x01 17b45b719eSAndrew F. Davis #define TPS65086_IRQ 0x02 18b45b719eSAndrew F. Davis #define TPS65086_IRQ_MASK 0x03 19b45b719eSAndrew F. Davis #define TPS65086_PMICSTAT 0x04 20b45b719eSAndrew F. Davis #define TPS65086_SHUTDNSRC 0x05 21b45b719eSAndrew F. Davis #define TPS65086_BUCK1CTRL 0x20 22b45b719eSAndrew F. Davis #define TPS65086_BUCK2CTRL 0x21 23b45b719eSAndrew F. Davis #define TPS65086_BUCK3DECAY 0x22 24b45b719eSAndrew F. Davis #define TPS65086_BUCK3VID 0x23 25b45b719eSAndrew F. Davis #define TPS65086_BUCK3SLPCTRL 0x24 26b45b719eSAndrew F. Davis #define TPS65086_BUCK4CTRL 0x25 27b45b719eSAndrew F. Davis #define TPS65086_BUCK5CTRL 0x26 28b45b719eSAndrew F. Davis #define TPS65086_BUCK6CTRL 0x27 29b45b719eSAndrew F. Davis #define TPS65086_LDOA2CTRL 0x28 30b45b719eSAndrew F. Davis #define TPS65086_LDOA3CTRL 0x29 31b45b719eSAndrew F. Davis #define TPS65086_DISCHCTRL1 0x40 32b45b719eSAndrew F. Davis #define TPS65086_DISCHCTRL2 0x41 33b45b719eSAndrew F. Davis #define TPS65086_DISCHCTRL3 0x42 34b45b719eSAndrew F. Davis #define TPS65086_PG_DELAY1 0x43 35b45b719eSAndrew F. Davis #define TPS65086_FORCESHUTDN 0x91 36b45b719eSAndrew F. Davis #define TPS65086_BUCK1SLPCTRL 0x92 37b45b719eSAndrew F. Davis #define TPS65086_BUCK2SLPCTRL 0x93 38b45b719eSAndrew F. Davis #define TPS65086_BUCK4VID 0x94 39b45b719eSAndrew F. Davis #define TPS65086_BUCK4SLPVID 0x95 40b45b719eSAndrew F. Davis #define TPS65086_BUCK5VID 0x96 41b45b719eSAndrew F. Davis #define TPS65086_BUCK5SLPVID 0x97 42b45b719eSAndrew F. Davis #define TPS65086_BUCK6VID 0x98 43b45b719eSAndrew F. Davis #define TPS65086_BUCK6SLPVID 0x99 44b45b719eSAndrew F. Davis #define TPS65086_LDOA2VID 0x9A 45b45b719eSAndrew F. Davis #define TPS65086_LDOA3VID 0x9B 46b45b719eSAndrew F. Davis #define TPS65086_BUCK123CTRL 0x9C 47b45b719eSAndrew F. Davis #define TPS65086_PG_DELAY2 0x9D 48b45b719eSAndrew F. Davis #define TPS65086_PIN_EN_MASK1 0x9E 49b45b719eSAndrew F. Davis #define TPS65086_PIN_EN_MASK2 0x9F 50b45b719eSAndrew F. Davis #define TPS65086_SWVTT_EN 0x9F 51b45b719eSAndrew F. Davis #define TPS65086_PIN_EN_OVR1 0xA0 52b45b719eSAndrew F. Davis #define TPS65086_PIN_EN_OVR2 0xA1 53b45b719eSAndrew F. Davis #define TPS65086_GPOCTRL 0xA1 54b45b719eSAndrew F. Davis #define TPS65086_PWR_FAULT_MASK1 0xA2 55b45b719eSAndrew F. Davis #define TPS65086_PWR_FAULT_MASK2 0xA3 56b45b719eSAndrew F. Davis #define TPS65086_GPO1PG_CTRL1 0xA4 57b45b719eSAndrew F. Davis #define TPS65086_GPO1PG_CTRL2 0xA5 58b45b719eSAndrew F. Davis #define TPS65086_GPO4PG_CTRL1 0xA6 59b45b719eSAndrew F. Davis #define TPS65086_GPO4PG_CTRL2 0xA7 60b45b719eSAndrew F. Davis #define TPS65086_GPO2PG_CTRL1 0xA8 61b45b719eSAndrew F. Davis #define TPS65086_GPO2PG_CTRL2 0xA9 62b45b719eSAndrew F. Davis #define TPS65086_GPO3PG_CTRL1 0xAA 63b45b719eSAndrew F. Davis #define TPS65086_GPO3PG_CTRL2 0xAB 64b45b719eSAndrew F. Davis #define TPS65086_LDOA1CTRL 0xAE 65b45b719eSAndrew F. Davis #define TPS65086_PG_STATUS1 0xB0 66b45b719eSAndrew F. Davis #define TPS65086_PG_STATUS2 0xB1 67b45b719eSAndrew F. Davis #define TPS65086_PWR_FAULT_STATUS1 0xB2 68b45b719eSAndrew F. Davis #define TPS65086_PWR_FAULT_STATUS2 0xB3 69b45b719eSAndrew F. Davis #define TPS65086_TEMPCRIT 0xB4 70b45b719eSAndrew F. Davis #define TPS65086_TEMPHOT 0xB5 71b45b719eSAndrew F. Davis #define TPS65086_OC_STATUS 0xB6 72b45b719eSAndrew F. Davis 73b45b719eSAndrew F. Davis /* IRQ Register field definitions */ 74b45b719eSAndrew F. Davis #define TPS65086_IRQ_DIETEMP_MASK BIT(0) 75b45b719eSAndrew F. Davis #define TPS65086_IRQ_SHUTDN_MASK BIT(3) 76b45b719eSAndrew F. Davis #define TPS65086_IRQ_FAULT_MASK BIT(7) 77b45b719eSAndrew F. Davis 78b45b719eSAndrew F. Davis /* DEVICEID Register field definitions */ 79b45b719eSAndrew F. Davis #define TPS65086_DEVICEID_PART_MASK GENMASK(3, 0) 80b45b719eSAndrew F. Davis #define TPS65086_DEVICEID_OTP_MASK GENMASK(5, 4) 81b45b719eSAndrew F. Davis #define TPS65086_DEVICEID_REV_MASK GENMASK(7, 6) 82b45b719eSAndrew F. Davis 83b45b719eSAndrew F. Davis /* VID Masks */ 84b45b719eSAndrew F. Davis #define BUCK_VID_MASK GENMASK(7, 1) 85b45b719eSAndrew F. Davis #define VDOA1_VID_MASK GENMASK(4, 1) 86b45b719eSAndrew F. Davis #define VDOA23_VID_MASK GENMASK(3, 0) 87b45b719eSAndrew F. Davis 88b45b719eSAndrew F. Davis /* Define the TPS65086 IRQ numbers */ 89b45b719eSAndrew F. Davis enum tps65086_irqs { 90b45b719eSAndrew F. Davis TPS65086_IRQ_DIETEMP, 91b45b719eSAndrew F. Davis TPS65086_IRQ_SHUTDN, 92b45b719eSAndrew F. Davis TPS65086_IRQ_FAULT, 93b45b719eSAndrew F. Davis }; 94b45b719eSAndrew F. Davis 95b45b719eSAndrew F. Davis /** 96b45b719eSAndrew F. Davis * struct tps65086 - state holder for the tps65086 driver 97b45b719eSAndrew F. Davis * 98b45b719eSAndrew F. Davis * Device data may be used to access the TPS65086 chip 99b45b719eSAndrew F. Davis */ 100b45b719eSAndrew F. Davis struct tps65086 { 101b45b719eSAndrew F. Davis struct device *dev; 102b45b719eSAndrew F. Davis struct regmap *regmap; 103b45b719eSAndrew F. Davis 104b45b719eSAndrew F. Davis /* IRQ Data */ 105b45b719eSAndrew F. Davis int irq; 106b45b719eSAndrew F. Davis struct regmap_irq_chip_data *irq_data; 107b45b719eSAndrew F. Davis }; 108b45b719eSAndrew F. Davis 109b45b719eSAndrew F. Davis #endif /* __LINUX_MFD_TPS65086_H */ 110