1 /* 2 * max8997.h - Voltage regulator driver for the Maxim 8997 3 * 4 * Copyright (C) 2010 Samsung Electrnoics 5 * MyungJoo Ham <myungjoo.ham@samsung.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22 #ifndef __LINUX_MFD_MAX8997_PRIV_H 23 #define __LINUX_MFD_MAX8997_PRIV_H 24 25 #include <linux/i2c.h> 26 #include <linux/export.h> 27 #include <linux/irqdomain.h> 28 29 #define MAX8997_REG_INVALID (0xff) 30 31 enum max8997_pmic_reg { 32 MAX8997_REG_PMIC_ID0 = 0x00, 33 MAX8997_REG_PMIC_ID1 = 0x01, 34 MAX8997_REG_INTSRC = 0x02, 35 MAX8997_REG_INT1 = 0x03, 36 MAX8997_REG_INT2 = 0x04, 37 MAX8997_REG_INT3 = 0x05, 38 MAX8997_REG_INT4 = 0x06, 39 40 MAX8997_REG_INT1MSK = 0x08, 41 MAX8997_REG_INT2MSK = 0x09, 42 MAX8997_REG_INT3MSK = 0x0a, 43 MAX8997_REG_INT4MSK = 0x0b, 44 45 MAX8997_REG_STATUS1 = 0x0d, 46 MAX8997_REG_STATUS2 = 0x0e, 47 MAX8997_REG_STATUS3 = 0x0f, 48 MAX8997_REG_STATUS4 = 0x10, 49 50 MAX8997_REG_MAINCON1 = 0x13, 51 MAX8997_REG_MAINCON2 = 0x14, 52 MAX8997_REG_BUCKRAMP = 0x15, 53 54 MAX8997_REG_BUCK1CTRL = 0x18, 55 MAX8997_REG_BUCK1DVS1 = 0x19, 56 MAX8997_REG_BUCK1DVS2 = 0x1a, 57 MAX8997_REG_BUCK1DVS3 = 0x1b, 58 MAX8997_REG_BUCK1DVS4 = 0x1c, 59 MAX8997_REG_BUCK1DVS5 = 0x1d, 60 MAX8997_REG_BUCK1DVS6 = 0x1e, 61 MAX8997_REG_BUCK1DVS7 = 0x1f, 62 MAX8997_REG_BUCK1DVS8 = 0x20, 63 MAX8997_REG_BUCK2CTRL = 0x21, 64 MAX8997_REG_BUCK2DVS1 = 0x22, 65 MAX8997_REG_BUCK2DVS2 = 0x23, 66 MAX8997_REG_BUCK2DVS3 = 0x24, 67 MAX8997_REG_BUCK2DVS4 = 0x25, 68 MAX8997_REG_BUCK2DVS5 = 0x26, 69 MAX8997_REG_BUCK2DVS6 = 0x27, 70 MAX8997_REG_BUCK2DVS7 = 0x28, 71 MAX8997_REG_BUCK2DVS8 = 0x29, 72 MAX8997_REG_BUCK3CTRL = 0x2a, 73 MAX8997_REG_BUCK3DVS = 0x2b, 74 MAX8997_REG_BUCK4CTRL = 0x2c, 75 MAX8997_REG_BUCK4DVS = 0x2d, 76 MAX8997_REG_BUCK5CTRL = 0x2e, 77 MAX8997_REG_BUCK5DVS1 = 0x2f, 78 MAX8997_REG_BUCK5DVS2 = 0x30, 79 MAX8997_REG_BUCK5DVS3 = 0x31, 80 MAX8997_REG_BUCK5DVS4 = 0x32, 81 MAX8997_REG_BUCK5DVS5 = 0x33, 82 MAX8997_REG_BUCK5DVS6 = 0x34, 83 MAX8997_REG_BUCK5DVS7 = 0x35, 84 MAX8997_REG_BUCK5DVS8 = 0x36, 85 MAX8997_REG_BUCK6CTRL = 0x37, 86 MAX8997_REG_BUCK6BPSKIPCTRL = 0x38, 87 MAX8997_REG_BUCK7CTRL = 0x39, 88 MAX8997_REG_BUCK7DVS = 0x3a, 89 MAX8997_REG_LDO1CTRL = 0x3b, 90 MAX8997_REG_LDO2CTRL = 0x3c, 91 MAX8997_REG_LDO3CTRL = 0x3d, 92 MAX8997_REG_LDO4CTRL = 0x3e, 93 MAX8997_REG_LDO5CTRL = 0x3f, 94 MAX8997_REG_LDO6CTRL = 0x40, 95 MAX8997_REG_LDO7CTRL = 0x41, 96 MAX8997_REG_LDO8CTRL = 0x42, 97 MAX8997_REG_LDO9CTRL = 0x43, 98 MAX8997_REG_LDO10CTRL = 0x44, 99 MAX8997_REG_LDO11CTRL = 0x45, 100 MAX8997_REG_LDO12CTRL = 0x46, 101 MAX8997_REG_LDO13CTRL = 0x47, 102 MAX8997_REG_LDO14CTRL = 0x48, 103 MAX8997_REG_LDO15CTRL = 0x49, 104 MAX8997_REG_LDO16CTRL = 0x4a, 105 MAX8997_REG_LDO17CTRL = 0x4b, 106 MAX8997_REG_LDO18CTRL = 0x4c, 107 MAX8997_REG_LDO21CTRL = 0x4d, 108 109 MAX8997_REG_MBCCTRL1 = 0x50, 110 MAX8997_REG_MBCCTRL2 = 0x51, 111 MAX8997_REG_MBCCTRL3 = 0x52, 112 MAX8997_REG_MBCCTRL4 = 0x53, 113 MAX8997_REG_MBCCTRL5 = 0x54, 114 MAX8997_REG_MBCCTRL6 = 0x55, 115 MAX8997_REG_OTPCGHCVS = 0x56, 116 117 MAX8997_REG_SAFEOUTCTRL = 0x5a, 118 119 MAX8997_REG_LBCNFG1 = 0x5e, 120 MAX8997_REG_LBCNFG2 = 0x5f, 121 MAX8997_REG_BBCCTRL = 0x60, 122 123 MAX8997_REG_FLASH1_CUR = 0x63, /* 0x63 ~ 0x6e for FLASH */ 124 MAX8997_REG_FLASH2_CUR = 0x64, 125 MAX8997_REG_MOVIE_CUR = 0x65, 126 MAX8997_REG_GSMB_CUR = 0x66, 127 MAX8997_REG_BOOST_CNTL = 0x67, 128 MAX8997_REG_LEN_CNTL = 0x68, 129 MAX8997_REG_FLASH_CNTL = 0x69, 130 MAX8997_REG_WDT_CNTL = 0x6a, 131 MAX8997_REG_MAXFLASH1 = 0x6b, 132 MAX8997_REG_MAXFLASH2 = 0x6c, 133 MAX8997_REG_FLASHSTATUS = 0x6d, 134 MAX8997_REG_FLASHSTATUSMASK = 0x6e, 135 136 MAX8997_REG_GPIOCNTL1 = 0x70, 137 MAX8997_REG_GPIOCNTL2 = 0x71, 138 MAX8997_REG_GPIOCNTL3 = 0x72, 139 MAX8997_REG_GPIOCNTL4 = 0x73, 140 MAX8997_REG_GPIOCNTL5 = 0x74, 141 MAX8997_REG_GPIOCNTL6 = 0x75, 142 MAX8997_REG_GPIOCNTL7 = 0x76, 143 MAX8997_REG_GPIOCNTL8 = 0x77, 144 MAX8997_REG_GPIOCNTL9 = 0x78, 145 MAX8997_REG_GPIOCNTL10 = 0x79, 146 MAX8997_REG_GPIOCNTL11 = 0x7a, 147 MAX8997_REG_GPIOCNTL12 = 0x7b, 148 149 MAX8997_REG_LDO1CONFIG = 0x80, 150 MAX8997_REG_LDO2CONFIG = 0x81, 151 MAX8997_REG_LDO3CONFIG = 0x82, 152 MAX8997_REG_LDO4CONFIG = 0x83, 153 MAX8997_REG_LDO5CONFIG = 0x84, 154 MAX8997_REG_LDO6CONFIG = 0x85, 155 MAX8997_REG_LDO7CONFIG = 0x86, 156 MAX8997_REG_LDO8CONFIG = 0x87, 157 MAX8997_REG_LDO9CONFIG = 0x88, 158 MAX8997_REG_LDO10CONFIG = 0x89, 159 MAX8997_REG_LDO11CONFIG = 0x8a, 160 MAX8997_REG_LDO12CONFIG = 0x8b, 161 MAX8997_REG_LDO13CONFIG = 0x8c, 162 MAX8997_REG_LDO14CONFIG = 0x8d, 163 MAX8997_REG_LDO15CONFIG = 0x8e, 164 MAX8997_REG_LDO16CONFIG = 0x8f, 165 MAX8997_REG_LDO17CONFIG = 0x90, 166 MAX8997_REG_LDO18CONFIG = 0x91, 167 MAX8997_REG_LDO21CONFIG = 0x92, 168 169 MAX8997_REG_DVSOKTIMER1 = 0x97, 170 MAX8997_REG_DVSOKTIMER2 = 0x98, 171 MAX8997_REG_DVSOKTIMER4 = 0x99, 172 MAX8997_REG_DVSOKTIMER5 = 0x9a, 173 174 MAX8997_REG_PMIC_END = 0x9b, 175 }; 176 177 enum max8997_muic_reg { 178 MAX8997_MUIC_REG_ID = 0x0, 179 MAX8997_MUIC_REG_INT1 = 0x1, 180 MAX8997_MUIC_REG_INT2 = 0x2, 181 MAX8997_MUIC_REG_INT3 = 0x3, 182 MAX8997_MUIC_REG_STATUS1 = 0x4, 183 MAX8997_MUIC_REG_STATUS2 = 0x5, 184 MAX8997_MUIC_REG_STATUS3 = 0x6, 185 MAX8997_MUIC_REG_INTMASK1 = 0x7, 186 MAX8997_MUIC_REG_INTMASK2 = 0x8, 187 MAX8997_MUIC_REG_INTMASK3 = 0x9, 188 MAX8997_MUIC_REG_CDETCTRL = 0xa, 189 190 MAX8997_MUIC_REG_CONTROL1 = 0xc, 191 MAX8997_MUIC_REG_CONTROL2 = 0xd, 192 MAX8997_MUIC_REG_CONTROL3 = 0xe, 193 194 MAX8997_MUIC_REG_END = 0xf, 195 }; 196 197 enum max8997_haptic_reg { 198 MAX8997_HAPTIC_REG_GENERAL = 0x00, 199 MAX8997_HAPTIC_REG_CONF1 = 0x01, 200 MAX8997_HAPTIC_REG_CONF2 = 0x02, 201 MAX8997_HAPTIC_REG_DRVCONF = 0x03, 202 MAX8997_HAPTIC_REG_CYCLECONF1 = 0x04, 203 MAX8997_HAPTIC_REG_CYCLECONF2 = 0x05, 204 MAX8997_HAPTIC_REG_SIGCONF1 = 0x06, 205 MAX8997_HAPTIC_REG_SIGCONF2 = 0x07, 206 MAX8997_HAPTIC_REG_SIGCONF3 = 0x08, 207 MAX8997_HAPTIC_REG_SIGCONF4 = 0x09, 208 MAX8997_HAPTIC_REG_SIGDC1 = 0x0a, 209 MAX8997_HAPTIC_REG_SIGDC2 = 0x0b, 210 MAX8997_HAPTIC_REG_SIGPWMDC1 = 0x0c, 211 MAX8997_HAPTIC_REG_SIGPWMDC2 = 0x0d, 212 MAX8997_HAPTIC_REG_SIGPWMDC3 = 0x0e, 213 MAX8997_HAPTIC_REG_SIGPWMDC4 = 0x0f, 214 MAX8997_HAPTIC_REG_MTR_REV = 0x10, 215 216 MAX8997_HAPTIC_REG_END = 0x11, 217 }; 218 219 /* slave addr = 0x0c: using "2nd part" of rev4 datasheet */ 220 enum max8997_rtc_reg { 221 MAX8997_RTC_CTRLMASK = 0x02, 222 MAX8997_RTC_CTRL = 0x03, 223 MAX8997_RTC_UPDATE1 = 0x04, 224 MAX8997_RTC_UPDATE2 = 0x05, 225 MAX8997_RTC_WTSR_SMPL = 0x06, 226 227 MAX8997_RTC_SEC = 0x10, 228 MAX8997_RTC_MIN = 0x11, 229 MAX8997_RTC_HOUR = 0x12, 230 MAX8997_RTC_DAY_OF_WEEK = 0x13, 231 MAX8997_RTC_MONTH = 0x14, 232 MAX8997_RTC_YEAR = 0x15, 233 MAX8997_RTC_DAY_OF_MONTH = 0x16, 234 MAX8997_RTC_ALARM1_SEC = 0x17, 235 MAX8997_RTC_ALARM1_MIN = 0x18, 236 MAX8997_RTC_ALARM1_HOUR = 0x19, 237 MAX8997_RTC_ALARM1_DAY_OF_WEEK = 0x1a, 238 MAX8997_RTC_ALARM1_MONTH = 0x1b, 239 MAX8997_RTC_ALARM1_YEAR = 0x1c, 240 MAX8997_RTC_ALARM1_DAY_OF_MONTH = 0x1d, 241 MAX8997_RTC_ALARM2_SEC = 0x1e, 242 MAX8997_RTC_ALARM2_MIN = 0x1f, 243 MAX8997_RTC_ALARM2_HOUR = 0x20, 244 MAX8997_RTC_ALARM2_DAY_OF_WEEK = 0x21, 245 MAX8997_RTC_ALARM2_MONTH = 0x22, 246 MAX8997_RTC_ALARM2_YEAR = 0x23, 247 MAX8997_RTC_ALARM2_DAY_OF_MONTH = 0x24, 248 }; 249 250 enum max8997_irq_source { 251 PMIC_INT1 = 0, 252 PMIC_INT2, 253 PMIC_INT3, 254 PMIC_INT4, 255 256 FUEL_GAUGE, /* Ignored (MAX17042 driver handles) */ 257 258 MUIC_INT1, 259 MUIC_INT2, 260 MUIC_INT3, 261 262 GPIO_LOW, /* Not implemented */ 263 GPIO_HI, /* Not implemented */ 264 265 FLASH_STATUS, /* Not implemented */ 266 267 MAX8997_IRQ_GROUP_NR, 268 }; 269 270 enum max8997_irq { 271 MAX8997_PMICIRQ_PWRONR, 272 MAX8997_PMICIRQ_PWRONF, 273 MAX8997_PMICIRQ_PWRON1SEC, 274 MAX8997_PMICIRQ_JIGONR, 275 MAX8997_PMICIRQ_JIGONF, 276 MAX8997_PMICIRQ_LOWBAT2, 277 MAX8997_PMICIRQ_LOWBAT1, 278 279 MAX8997_PMICIRQ_JIGR, 280 MAX8997_PMICIRQ_JIGF, 281 MAX8997_PMICIRQ_MR, 282 MAX8997_PMICIRQ_DVS1OK, 283 MAX8997_PMICIRQ_DVS2OK, 284 MAX8997_PMICIRQ_DVS3OK, 285 MAX8997_PMICIRQ_DVS4OK, 286 287 MAX8997_PMICIRQ_CHGINS, 288 MAX8997_PMICIRQ_CHGRM, 289 MAX8997_PMICIRQ_DCINOVP, 290 MAX8997_PMICIRQ_TOPOFFR, 291 MAX8997_PMICIRQ_CHGRSTF, 292 MAX8997_PMICIRQ_MBCHGTMEXPD, 293 294 MAX8997_PMICIRQ_RTC60S, 295 MAX8997_PMICIRQ_RTCA1, 296 MAX8997_PMICIRQ_RTCA2, 297 MAX8997_PMICIRQ_SMPL_INT, 298 MAX8997_PMICIRQ_RTC1S, 299 MAX8997_PMICIRQ_WTSR, 300 301 MAX8997_MUICIRQ_ADCError, 302 MAX8997_MUICIRQ_ADCLow, 303 MAX8997_MUICIRQ_ADC, 304 305 MAX8997_MUICIRQ_VBVolt, 306 MAX8997_MUICIRQ_DBChg, 307 MAX8997_MUICIRQ_DCDTmr, 308 MAX8997_MUICIRQ_ChgDetRun, 309 MAX8997_MUICIRQ_ChgTyp, 310 311 MAX8997_MUICIRQ_OVP, 312 313 MAX8997_IRQ_NR, 314 }; 315 316 #define MAX8997_NUM_GPIO 12 317 struct max8997_dev { 318 struct device *dev; 319 struct max8997_platform_data *pdata; 320 struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */ 321 struct i2c_client *rtc; /* slave addr 0x0c */ 322 struct i2c_client *haptic; /* slave addr 0x90 */ 323 struct i2c_client *muic; /* slave addr 0x4a */ 324 struct mutex iolock; 325 326 int type; 327 struct platform_device *battery; /* battery control (not fuel gauge) */ 328 329 int irq; 330 int ono; 331 struct irq_domain *irq_domain; 332 struct mutex irqlock; 333 int irq_masks_cur[MAX8997_IRQ_GROUP_NR]; 334 int irq_masks_cache[MAX8997_IRQ_GROUP_NR]; 335 336 /* For hibernation */ 337 u8 reg_dump[MAX8997_REG_PMIC_END + MAX8997_MUIC_REG_END + 338 MAX8997_HAPTIC_REG_END]; 339 340 bool gpio_status[MAX8997_NUM_GPIO]; 341 }; 342 343 enum max8997_types { 344 TYPE_MAX8997, 345 TYPE_MAX8966, 346 }; 347 348 extern int max8997_irq_init(struct max8997_dev *max8997); 349 extern void max8997_irq_exit(struct max8997_dev *max8997); 350 extern int max8997_irq_resume(struct max8997_dev *max8997); 351 352 extern int max8997_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest); 353 extern int max8997_bulk_read(struct i2c_client *i2c, u8 reg, int count, 354 u8 *buf); 355 extern int max8997_write_reg(struct i2c_client *i2c, u8 reg, u8 value); 356 extern int max8997_bulk_write(struct i2c_client *i2c, u8 reg, int count, 357 u8 *buf); 358 extern int max8997_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask); 359 360 #define MAX8997_GPIO_INT_BOTH (0x3 << 4) 361 #define MAX8997_GPIO_INT_RISE (0x2 << 4) 362 #define MAX8997_GPIO_INT_FALL (0x1 << 4) 363 364 #define MAX8997_GPIO_INT_MASK (0x3 << 4) 365 #define MAX8997_GPIO_DATA_MASK (0x1 << 2) 366 #endif /* __LINUX_MFD_MAX8997_PRIV_H */ 367