13d51ec93SPaul Cercueil /* SPDX-License-Identifier: GPL-2.0 */ 23d51ec93SPaul Cercueil /* 33d51ec93SPaul Cercueil * Header file for the Ingenic JZ47xx TCU driver 43d51ec93SPaul Cercueil */ 53d51ec93SPaul Cercueil #ifndef __LINUX_MFD_INGENIC_TCU_H_ 63d51ec93SPaul Cercueil #define __LINUX_MFD_INGENIC_TCU_H_ 73d51ec93SPaul Cercueil 83d51ec93SPaul Cercueil #include <linux/bitops.h> 93d51ec93SPaul Cercueil 103d51ec93SPaul Cercueil #define TCU_REG_WDT_TDR 0x00 113d51ec93SPaul Cercueil #define TCU_REG_WDT_TCER 0x04 123d51ec93SPaul Cercueil #define TCU_REG_WDT_TCNT 0x08 133d51ec93SPaul Cercueil #define TCU_REG_WDT_TCSR 0x0c 143d51ec93SPaul Cercueil #define TCU_REG_TER 0x10 153d51ec93SPaul Cercueil #define TCU_REG_TESR 0x14 163d51ec93SPaul Cercueil #define TCU_REG_TECR 0x18 173d51ec93SPaul Cercueil #define TCU_REG_TSR 0x1c 183d51ec93SPaul Cercueil #define TCU_REG_TFR 0x20 193d51ec93SPaul Cercueil #define TCU_REG_TFSR 0x24 203d51ec93SPaul Cercueil #define TCU_REG_TFCR 0x28 213d51ec93SPaul Cercueil #define TCU_REG_TSSR 0x2c 223d51ec93SPaul Cercueil #define TCU_REG_TMR 0x30 233d51ec93SPaul Cercueil #define TCU_REG_TMSR 0x34 243d51ec93SPaul Cercueil #define TCU_REG_TMCR 0x38 253d51ec93SPaul Cercueil #define TCU_REG_TSCR 0x3c 263d51ec93SPaul Cercueil #define TCU_REG_TDFR0 0x40 273d51ec93SPaul Cercueil #define TCU_REG_TDHR0 0x44 283d51ec93SPaul Cercueil #define TCU_REG_TCNT0 0x48 293d51ec93SPaul Cercueil #define TCU_REG_TCSR0 0x4c 303d51ec93SPaul Cercueil #define TCU_REG_OST_DR 0xe0 313d51ec93SPaul Cercueil #define TCU_REG_OST_CNTL 0xe4 323d51ec93SPaul Cercueil #define TCU_REG_OST_CNTH 0xe8 333d51ec93SPaul Cercueil #define TCU_REG_OST_TCSR 0xec 343d51ec93SPaul Cercueil #define TCU_REG_TSTR 0xf0 353d51ec93SPaul Cercueil #define TCU_REG_TSTSR 0xf4 363d51ec93SPaul Cercueil #define TCU_REG_TSTCR 0xf8 373d51ec93SPaul Cercueil #define TCU_REG_OST_CNTHBUF 0xfc 383d51ec93SPaul Cercueil 393d51ec93SPaul Cercueil #define TCU_TCSR_RESERVED_BITS 0x3f 403d51ec93SPaul Cercueil #define TCU_TCSR_PARENT_CLOCK_MASK 0x07 413d51ec93SPaul Cercueil #define TCU_TCSR_PRESCALE_LSB 3 423d51ec93SPaul Cercueil #define TCU_TCSR_PRESCALE_MASK 0x38 433d51ec93SPaul Cercueil 44*ddf5aaa8SPaul Cercueil #define TCU_TCSR_PWM_SD BIT(9) /* 0: Shutdown gracefully 1: abruptly */ 453d51ec93SPaul Cercueil #define TCU_TCSR_PWM_INITL_HIGH BIT(8) /* Sets the initial output level */ 463d51ec93SPaul Cercueil #define TCU_TCSR_PWM_EN BIT(7) /* PWM pin output enable */ 473d51ec93SPaul Cercueil 483d51ec93SPaul Cercueil #define TCU_WDT_TCER_TCEN BIT(0) /* Watchdog timer enable */ 493d51ec93SPaul Cercueil 503d51ec93SPaul Cercueil #define TCU_CHANNEL_STRIDE 0x10 513d51ec93SPaul Cercueil #define TCU_REG_TDFRc(c) (TCU_REG_TDFR0 + ((c) * TCU_CHANNEL_STRIDE)) 523d51ec93SPaul Cercueil #define TCU_REG_TDHRc(c) (TCU_REG_TDHR0 + ((c) * TCU_CHANNEL_STRIDE)) 533d51ec93SPaul Cercueil #define TCU_REG_TCNTc(c) (TCU_REG_TCNT0 + ((c) * TCU_CHANNEL_STRIDE)) 543d51ec93SPaul Cercueil #define TCU_REG_TCSRc(c) (TCU_REG_TCSR0 + ((c) * TCU_CHANNEL_STRIDE)) 553d51ec93SPaul Cercueil 563d51ec93SPaul Cercueil #endif /* __LINUX_MFD_INGENIC_TCU_H_ */ 57