xref: /openbmc/linux/include/linux/mfd/abx500.h (revision 812f9e9d)
1812f9e9dSLinus Walleij /*
2812f9e9dSLinus Walleij  * Copyright (C) 2007-2009 ST-Ericsson AB
3812f9e9dSLinus Walleij  * License terms: GNU General Public License (GPL) version 2
4812f9e9dSLinus Walleij  * AB3100 core access functions
5812f9e9dSLinus Walleij  * Author: Linus Walleij <linus.walleij@stericsson.com>
6812f9e9dSLinus Walleij  */
7812f9e9dSLinus Walleij 
8812f9e9dSLinus Walleij #include <linux/device.h>
9812f9e9dSLinus Walleij #include <linux/regulator/machine.h>
10812f9e9dSLinus Walleij 
11812f9e9dSLinus Walleij #ifndef MFD_AB3100_H
12812f9e9dSLinus Walleij #define MFD_AB3100_H
13812f9e9dSLinus Walleij 
14812f9e9dSLinus Walleij #define ABUNKNOWN	0
15812f9e9dSLinus Walleij #define	AB3000		1
16812f9e9dSLinus Walleij #define	AB3100		2
17812f9e9dSLinus Walleij 
18812f9e9dSLinus Walleij /*
19812f9e9dSLinus Walleij  * AB3100, EVENTA1, A2 and A3 event register flags
20812f9e9dSLinus Walleij  * these are catenated into a single 32-bit flag in the code
21812f9e9dSLinus Walleij  * for event notification broadcasts.
22812f9e9dSLinus Walleij  */
23812f9e9dSLinus Walleij #define AB3100_EVENTA1_ONSWA				(0x01<<16)
24812f9e9dSLinus Walleij #define AB3100_EVENTA1_ONSWB				(0x02<<16)
25812f9e9dSLinus Walleij #define AB3100_EVENTA1_ONSWC				(0x04<<16)
26812f9e9dSLinus Walleij #define AB3100_EVENTA1_DCIO				(0x08<<16)
27812f9e9dSLinus Walleij #define AB3100_EVENTA1_OVER_TEMP			(0x10<<16)
28812f9e9dSLinus Walleij #define AB3100_EVENTA1_SIM_OFF				(0x20<<16)
29812f9e9dSLinus Walleij #define AB3100_EVENTA1_VBUS				(0x40<<16)
30812f9e9dSLinus Walleij #define AB3100_EVENTA1_VSET_USB				(0x80<<16)
31812f9e9dSLinus Walleij 
32812f9e9dSLinus Walleij #define AB3100_EVENTA2_READY_TX				(0x01<<8)
33812f9e9dSLinus Walleij #define AB3100_EVENTA2_READY_RX				(0x02<<8)
34812f9e9dSLinus Walleij #define AB3100_EVENTA2_OVERRUN_ERROR			(0x04<<8)
35812f9e9dSLinus Walleij #define AB3100_EVENTA2_FRAMING_ERROR			(0x08<<8)
36812f9e9dSLinus Walleij #define AB3100_EVENTA2_CHARG_OVERCURRENT		(0x10<<8)
37812f9e9dSLinus Walleij #define AB3100_EVENTA2_MIDR				(0x20<<8)
38812f9e9dSLinus Walleij #define AB3100_EVENTA2_BATTERY_REM			(0x40<<8)
39812f9e9dSLinus Walleij #define AB3100_EVENTA2_ALARM				(0x80<<8)
40812f9e9dSLinus Walleij 
41812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIG5			(0x01)
42812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIG4			(0x02)
43812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIG3			(0x04)
44812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIG2			(0x08)
45812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIGVBAT			(0x10)
46812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIGVTX			(0x20)
47812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIG1			(0x40)
48812f9e9dSLinus Walleij #define AB3100_EVENTA3_ADC_TRIG0			(0x80)
49812f9e9dSLinus Walleij 
50812f9e9dSLinus Walleij /* AB3100, STR register flags */
51812f9e9dSLinus Walleij #define AB3100_STR_ONSWA				(0x01)
52812f9e9dSLinus Walleij #define AB3100_STR_ONSWB				(0x02)
53812f9e9dSLinus Walleij #define AB3100_STR_ONSWC				(0x04)
54812f9e9dSLinus Walleij #define AB3100_STR_DCIO					(0x08)
55812f9e9dSLinus Walleij #define AB3100_STR_BOOT_MODE				(0x10)
56812f9e9dSLinus Walleij #define AB3100_STR_SIM_OFF				(0x20)
57812f9e9dSLinus Walleij #define AB3100_STR_BATT_REMOVAL				(0x40)
58812f9e9dSLinus Walleij #define AB3100_STR_VBUS					(0x80)
59812f9e9dSLinus Walleij 
60812f9e9dSLinus Walleij /*
61812f9e9dSLinus Walleij  * AB3100 contains 8 regulators, one external regulator controller
62812f9e9dSLinus Walleij  * and a buck converter, further the LDO E and buck converter can
63812f9e9dSLinus Walleij  * have separate settings if they are in sleep mode, this is
64812f9e9dSLinus Walleij  * modeled as a separate regulator.
65812f9e9dSLinus Walleij  */
66812f9e9dSLinus Walleij #define AB3100_NUM_REGULATORS				10
67812f9e9dSLinus Walleij 
68812f9e9dSLinus Walleij /**
69812f9e9dSLinus Walleij  * struct ab3100
70812f9e9dSLinus Walleij  * @access_mutex: lock out concurrent accesses to the AB3100 registers
71812f9e9dSLinus Walleij  * @dev: pointer to the containing device
72812f9e9dSLinus Walleij  * @i2c_client: I2C client for this chip
73812f9e9dSLinus Walleij  * @testreg_client: secondary client for test registers
74812f9e9dSLinus Walleij  * @chip_name: name of this chip variant
75812f9e9dSLinus Walleij  * @chip_id: 8 bit chip ID for this chip variant
76812f9e9dSLinus Walleij  * @event_subscribers: event subscribers are listed here
77812f9e9dSLinus Walleij  * @startup_events: a copy of the first reading of the event registers
78812f9e9dSLinus Walleij  * @startup_events_read: whether the first events have been read
79812f9e9dSLinus Walleij  *
80812f9e9dSLinus Walleij  * This struct is PRIVATE and devices using it should NOT
81812f9e9dSLinus Walleij  * access ANY fields. It is used as a token for calling the
82812f9e9dSLinus Walleij  * AB3100 functions.
83812f9e9dSLinus Walleij  */
84812f9e9dSLinus Walleij struct ab3100 {
85812f9e9dSLinus Walleij 	struct mutex access_mutex;
86812f9e9dSLinus Walleij 	struct device *dev;
87812f9e9dSLinus Walleij 	struct i2c_client *i2c_client;
88812f9e9dSLinus Walleij 	struct i2c_client *testreg_client;
89812f9e9dSLinus Walleij 	char chip_name[32];
90812f9e9dSLinus Walleij 	u8 chip_id;
91812f9e9dSLinus Walleij 	struct blocking_notifier_head event_subscribers;
92812f9e9dSLinus Walleij 	u32 startup_events;
93812f9e9dSLinus Walleij 	bool startup_events_read;
94812f9e9dSLinus Walleij };
95812f9e9dSLinus Walleij 
96812f9e9dSLinus Walleij /**
97812f9e9dSLinus Walleij  * struct ab3100_platform_data
98812f9e9dSLinus Walleij  * Data supplied to initialize board connections to the AB3100
99812f9e9dSLinus Walleij  * @reg_constraints: regulator constraints for target board
100812f9e9dSLinus Walleij  *     the order of these constraints are: LDO A, C, D, E,
101812f9e9dSLinus Walleij  *     F, G, H, K, EXT and BUCK.
102812f9e9dSLinus Walleij  * @reg_initvals: initial values for the regulator registers
103812f9e9dSLinus Walleij  *     plus two sleep settings for LDO E and the BUCK converter.
104812f9e9dSLinus Walleij  *     exactly AB3100_NUM_REGULATORS+2 values must be sent in.
105812f9e9dSLinus Walleij  *     Order: LDO A, C, E, E sleep, F, G, H, K, EXT, BUCK,
106812f9e9dSLinus Walleij  *     BUCK sleep, LDO D. (LDO D need to be initialized last.)
107812f9e9dSLinus Walleij  * @external_voltage: voltage level of the external regulator.
108812f9e9dSLinus Walleij  */
109812f9e9dSLinus Walleij struct ab3100_platform_data {
110812f9e9dSLinus Walleij 	struct regulator_init_data reg_constraints[AB3100_NUM_REGULATORS];
111812f9e9dSLinus Walleij 	u8 reg_initvals[AB3100_NUM_REGULATORS+2];
112812f9e9dSLinus Walleij 	int external_voltage;
113812f9e9dSLinus Walleij };
114812f9e9dSLinus Walleij 
115812f9e9dSLinus Walleij int ab3100_set_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 regval);
116812f9e9dSLinus Walleij int ab3100_get_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 *regval);
117812f9e9dSLinus Walleij int ab3100_get_register_page_interruptible(struct ab3100 *ab3100,
118812f9e9dSLinus Walleij 			     u8 first_reg, u8 *regvals, u8 numregs);
119812f9e9dSLinus Walleij int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100,
120812f9e9dSLinus Walleij 				 u8 reg, u8 andmask, u8 ormask);
121812f9e9dSLinus Walleij u8 ab3100_get_chip_type(struct ab3100 *ab3100);
122812f9e9dSLinus Walleij int ab3100_event_register(struct ab3100 *ab3100,
123812f9e9dSLinus Walleij 			  struct notifier_block *nb);
124812f9e9dSLinus Walleij int ab3100_event_unregister(struct ab3100 *ab3100,
125812f9e9dSLinus Walleij 			    struct notifier_block *nb);
126812f9e9dSLinus Walleij int ab3100_event_registers_startup_state_get(struct ab3100 *ab3100,
127812f9e9dSLinus Walleij 					     u32 *fatevent);
128812f9e9dSLinus Walleij 
129812f9e9dSLinus Walleij #endif
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