1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2022 HiSilicon Limited. 4 */ 5 6 #ifndef _KERNEL_DMA_BENCHMARK_H 7 #define _KERNEL_DMA_BENCHMARK_H 8 9 #define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) 10 #define DMA_MAP_MAX_THREADS 1024 11 #define DMA_MAP_MAX_SECONDS 300 12 #define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) 13 14 #define DMA_MAP_BIDIRECTIONAL 0 15 #define DMA_MAP_TO_DEVICE 1 16 #define DMA_MAP_FROM_DEVICE 2 17 18 struct map_benchmark { 19 __u64 avg_map_100ns; /* average map latency in 100ns */ 20 __u64 map_stddev; /* standard deviation of map latency */ 21 __u64 avg_unmap_100ns; /* as above */ 22 __u64 unmap_stddev; 23 __u32 threads; /* how many threads will do map/unmap in parallel */ 24 __u32 seconds; /* how long the test will last */ 25 __s32 node; /* which numa node this benchmark will run on */ 26 __u32 dma_bits; /* DMA addressing capability */ 27 __u32 dma_dir; /* DMA data direction */ 28 __u32 dma_trans_ns; /* time for DMA transmission in ns */ 29 __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ 30 }; 31 #endif /* _KERNEL_DMA_BENCHMARK_H */ 32