11802d0beSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21b2b03f8SKarsten Keil /* 31b2b03f8SKarsten Keil * 41b2b03f8SKarsten Keil * Author Karsten Keil <kkeil@novell.com> 51b2b03f8SKarsten Keil * 61b2b03f8SKarsten Keil * Basic declarations for the mISDN HW channels 71b2b03f8SKarsten Keil * 81b2b03f8SKarsten Keil * Copyright 2008 by Karsten Keil <kkeil@novell.com> 91b2b03f8SKarsten Keil */ 101b2b03f8SKarsten Keil 111b2b03f8SKarsten Keil #ifndef MISDNHW_H 121b2b03f8SKarsten Keil #define MISDNHW_H 131b2b03f8SKarsten Keil #include <linux/mISDNif.h> 141b2b03f8SKarsten Keil #include <linux/timer.h> 151b2b03f8SKarsten Keil 161b2b03f8SKarsten Keil /* 171b2b03f8SKarsten Keil * HW DEBUG 0xHHHHGGGG 181b2b03f8SKarsten Keil * H - hardware driver specific bits 191b2b03f8SKarsten Keil * G - for all drivers 201b2b03f8SKarsten Keil */ 211b2b03f8SKarsten Keil 221b2b03f8SKarsten Keil #define DEBUG_HW 0x00000001 231b2b03f8SKarsten Keil #define DEBUG_HW_OPEN 0x00000002 241b2b03f8SKarsten Keil #define DEBUG_HW_DCHANNEL 0x00000100 251b2b03f8SKarsten Keil #define DEBUG_HW_DFIFO 0x00000200 261b2b03f8SKarsten Keil #define DEBUG_HW_BCHANNEL 0x00001000 271b2b03f8SKarsten Keil #define DEBUG_HW_BFIFO 0x00002000 281b2b03f8SKarsten Keil 291b2b03f8SKarsten Keil #define MAX_DFRAME_LEN_L1 300 301b2b03f8SKarsten Keil #define MAX_MON_FRAME 32 311b2b03f8SKarsten Keil #define MAX_LOG_SPACE 2048 321b2b03f8SKarsten Keil #define MISDN_COPY_SIZE 32 331b2b03f8SKarsten Keil 341b2b03f8SKarsten Keil /* channel->Flags bit field */ 351b2b03f8SKarsten Keil #define FLG_TX_BUSY 0 /* tx_buf in use */ 361b2b03f8SKarsten Keil #define FLG_TX_NEXT 1 /* next_skb in use */ 371b2b03f8SKarsten Keil #define FLG_L1_BUSY 2 /* L1 is permanent busy */ 381b2b03f8SKarsten Keil #define FLG_L2_ACTIVATED 3 /* activated from L2 */ 391b2b03f8SKarsten Keil #define FLG_OPEN 5 /* channel is in use */ 401b2b03f8SKarsten Keil #define FLG_ACTIVE 6 /* channel is activated */ 411b2b03f8SKarsten Keil #define FLG_BUSY_TIMER 7 421b2b03f8SKarsten Keil /* channel type */ 431b2b03f8SKarsten Keil #define FLG_DCHANNEL 8 /* channel is D-channel */ 441b2b03f8SKarsten Keil #define FLG_BCHANNEL 9 /* channel is B-channel */ 451b2b03f8SKarsten Keil #define FLG_ECHANNEL 10 /* channel is E-channel */ 461b2b03f8SKarsten Keil #define FLG_TRANSPARENT 12 /* channel use transparent data */ 471b2b03f8SKarsten Keil #define FLG_HDLC 13 /* channel use hdlc data */ 481b2b03f8SKarsten Keil #define FLG_L2DATA 14 /* channel use L2 DATA primitivs */ 491b2b03f8SKarsten Keil #define FLG_ORIGIN 15 /* channel is on origin site */ 501b2b03f8SKarsten Keil /* channel specific stuff */ 518dd2f36fSAndreas Eversberg #define FLG_FILLEMPTY 16 /* fill fifo on first frame (empty) */ 521b2b03f8SKarsten Keil /* arcofi specific */ 538dd2f36fSAndreas Eversberg #define FLG_ARCOFI_TIMER 17 548dd2f36fSAndreas Eversberg #define FLG_ARCOFI_ERROR 18 551b2b03f8SKarsten Keil /* isar specific */ 568dd2f36fSAndreas Eversberg #define FLG_INITIALIZED 17 578dd2f36fSAndreas Eversberg #define FLG_DLEETX 18 588dd2f36fSAndreas Eversberg #define FLG_LASTDLE 19 598dd2f36fSAndreas Eversberg #define FLG_FIRST 20 608dd2f36fSAndreas Eversberg #define FLG_LASTDATA 21 618dd2f36fSAndreas Eversberg #define FLG_NMD_DATA 22 628dd2f36fSAndreas Eversberg #define FLG_FTI_RUN 23 638dd2f36fSAndreas Eversberg #define FLG_LL_OK 24 648dd2f36fSAndreas Eversberg #define FLG_LL_CONN 25 658dd2f36fSAndreas Eversberg #define FLG_DTMFSEND 26 666d1ee48fSKarsten Keil #define FLG_TX_EMPTY 27 67c27b46e7SKarsten Keil /* stop sending received data upstream */ 68c27b46e7SKarsten Keil #define FLG_RX_OFF 28 691b2b03f8SKarsten Keil /* workq events */ 701b2b03f8SKarsten Keil #define FLG_RECVQUEUE 30 711b2b03f8SKarsten Keil #define FLG_PHCHANGE 31 721b2b03f8SKarsten Keil 731b2b03f8SKarsten Keil #define schedule_event(s, ev) do { \ 741b2b03f8SKarsten Keil test_and_set_bit(ev, &((s)->Flags)); \ 751b2b03f8SKarsten Keil schedule_work(&((s)->workq)); \ 761b2b03f8SKarsten Keil } while (0) 771b2b03f8SKarsten Keil 781b2b03f8SKarsten Keil struct dchannel { 791b2b03f8SKarsten Keil struct mISDNdevice dev; 801b2b03f8SKarsten Keil u_long Flags; 811b2b03f8SKarsten Keil struct work_struct workq; 821b2b03f8SKarsten Keil void (*phfunc) (struct dchannel *); 831b2b03f8SKarsten Keil u_int state; 841b2b03f8SKarsten Keil void *l1; 851b2b03f8SKarsten Keil void *hw; 861b2b03f8SKarsten Keil int slot; /* multiport card channel slot */ 871b2b03f8SKarsten Keil struct timer_list timer; 881b2b03f8SKarsten Keil /* receive data */ 891b2b03f8SKarsten Keil struct sk_buff *rx_skb; 901b2b03f8SKarsten Keil int maxlen; 911b2b03f8SKarsten Keil /* send data */ 921b2b03f8SKarsten Keil struct sk_buff_head squeue; 931b2b03f8SKarsten Keil struct sk_buff_head rqueue; 941b2b03f8SKarsten Keil struct sk_buff *tx_skb; 951b2b03f8SKarsten Keil int tx_idx; 961b2b03f8SKarsten Keil int debug; 971b2b03f8SKarsten Keil /* statistics */ 981b2b03f8SKarsten Keil int err_crc; 991b2b03f8SKarsten Keil int err_tx; 1001b2b03f8SKarsten Keil int err_rx; 1011b2b03f8SKarsten Keil }; 1021b2b03f8SKarsten Keil 1031b2b03f8SKarsten Keil typedef int (dchannel_l1callback)(struct dchannel *, u_int); 1041b2b03f8SKarsten Keil extern int create_l1(struct dchannel *, dchannel_l1callback *); 1051b2b03f8SKarsten Keil 1061b2b03f8SKarsten Keil /* private L1 commands */ 1071b2b03f8SKarsten Keil #define INFO0 0x8002 1081b2b03f8SKarsten Keil #define INFO1 0x8102 1091b2b03f8SKarsten Keil #define INFO2 0x8202 1101b2b03f8SKarsten Keil #define INFO3_P8 0x8302 1111b2b03f8SKarsten Keil #define INFO3_P10 0x8402 1121b2b03f8SKarsten Keil #define INFO4_P8 0x8502 1131b2b03f8SKarsten Keil #define INFO4_P10 0x8602 1141b2b03f8SKarsten Keil #define LOSTFRAMING 0x8702 1151b2b03f8SKarsten Keil #define ANYSIGNAL 0x8802 1161b2b03f8SKarsten Keil #define HW_POWERDOWN 0x8902 1171b2b03f8SKarsten Keil #define HW_RESET_REQ 0x8a02 1181b2b03f8SKarsten Keil #define HW_POWERUP_REQ 0x8b02 1191b2b03f8SKarsten Keil #define HW_DEACT_REQ 0x8c02 1201b2b03f8SKarsten Keil #define HW_ACTIVATE_REQ 0x8e02 1211b2b03f8SKarsten Keil #define HW_D_NOBLOCKED 0x8f02 1221b2b03f8SKarsten Keil #define HW_RESET_IND 0x9002 1231b2b03f8SKarsten Keil #define HW_POWERUP_IND 0x9102 1241b2b03f8SKarsten Keil #define HW_DEACT_IND 0x9202 1251b2b03f8SKarsten Keil #define HW_ACTIVATE_IND 0x9302 1261b2b03f8SKarsten Keil #define HW_DEACT_CNF 0x9402 1271b2b03f8SKarsten Keil #define HW_TESTLOOP 0x9502 1281b2b03f8SKarsten Keil #define HW_TESTRX_RAW 0x9602 1291b2b03f8SKarsten Keil #define HW_TESTRX_HDLC 0x9702 1301b2b03f8SKarsten Keil #define HW_TESTRX_OFF 0x9802 131c626c127SKarsten Keil #define HW_TIMER3_IND 0x9902 132c626c127SKarsten Keil #define HW_TIMER3_VALUE 0x9a00 133c626c127SKarsten Keil #define HW_TIMER3_VMASK 0x00FF 1341b2b03f8SKarsten Keil 1351b2b03f8SKarsten Keil struct layer1; 1361b2b03f8SKarsten Keil extern int l1_event(struct layer1 *, u_int); 1371b2b03f8SKarsten Keil 1386d1ee48fSKarsten Keil #define MISDN_BCH_FILL_SIZE 4 1391b2b03f8SKarsten Keil 1401b2b03f8SKarsten Keil struct bchannel { 1411b2b03f8SKarsten Keil struct mISDNchannel ch; 1421b2b03f8SKarsten Keil int nr; 1431b2b03f8SKarsten Keil u_long Flags; 1441b2b03f8SKarsten Keil struct work_struct workq; 1451b2b03f8SKarsten Keil u_int state; 1461b2b03f8SKarsten Keil void *hw; 1471b2b03f8SKarsten Keil int slot; /* multiport card channel slot */ 1481b2b03f8SKarsten Keil struct timer_list timer; 1491b2b03f8SKarsten Keil /* receive data */ 1506d1ee48fSKarsten Keil u8 fill[MISDN_BCH_FILL_SIZE]; 1511b2b03f8SKarsten Keil struct sk_buff *rx_skb; 152034005a0SKarsten Keil unsigned short maxlen; 153034005a0SKarsten Keil unsigned short init_maxlen; /* initial value */ 154034005a0SKarsten Keil unsigned short next_maxlen; /* pending value */ 155034005a0SKarsten Keil unsigned short minlen; /* for transparent data */ 156034005a0SKarsten Keil unsigned short init_minlen; /* initial value */ 157034005a0SKarsten Keil unsigned short next_minlen; /* pending value */ 1581b2b03f8SKarsten Keil /* send data */ 1591b2b03f8SKarsten Keil struct sk_buff *next_skb; 1601b2b03f8SKarsten Keil struct sk_buff *tx_skb; 1611b2b03f8SKarsten Keil struct sk_buff_head rqueue; 1621b2b03f8SKarsten Keil int rcount; 1631b2b03f8SKarsten Keil int tx_idx; 1641b2b03f8SKarsten Keil int debug; 1651b2b03f8SKarsten Keil /* statistics */ 1661b2b03f8SKarsten Keil int err_crc; 1671b2b03f8SKarsten Keil int err_tx; 1681b2b03f8SKarsten Keil int err_rx; 169c27b46e7SKarsten Keil int dropcnt; 1701b2b03f8SKarsten Keil }; 1711b2b03f8SKarsten Keil 1721b2b03f8SKarsten Keil extern int mISDN_initdchannel(struct dchannel *, int, void *); 173034005a0SKarsten Keil extern int mISDN_initbchannel(struct bchannel *, unsigned short, 174034005a0SKarsten Keil unsigned short); 1751b2b03f8SKarsten Keil extern int mISDN_freedchannel(struct dchannel *); 176fb286f04SKarsten Keil extern void mISDN_clear_bchannel(struct bchannel *); 1774b921edaSKarsten Keil extern void mISDN_freebchannel(struct bchannel *); 178034005a0SKarsten Keil extern int mISDN_ctrl_bchannel(struct bchannel *, struct mISDN_ctrl_req *); 1791b2b03f8SKarsten Keil extern void queue_ch_frame(struct mISDNchannel *, u_int, 1801b2b03f8SKarsten Keil int, struct sk_buff *); 1811b2b03f8SKarsten Keil extern int dchannel_senddata(struct dchannel *, struct sk_buff *); 1821b2b03f8SKarsten Keil extern int bchannel_senddata(struct bchannel *, struct sk_buff *); 1837206e659SKarsten Keil extern int bchannel_get_rxbuf(struct bchannel *, int); 1841b2b03f8SKarsten Keil extern void recv_Dchannel(struct dchannel *); 1851f28fa19SMartin Bachem extern void recv_Echannel(struct dchannel *, struct dchannel *); 186034005a0SKarsten Keil extern void recv_Bchannel(struct bchannel *, unsigned int, bool); 1871b2b03f8SKarsten Keil extern void recv_Dchannel_skb(struct dchannel *, struct sk_buff *); 1881b2b03f8SKarsten Keil extern void recv_Bchannel_skb(struct bchannel *, struct sk_buff *); 1891b2b03f8SKarsten Keil extern int get_next_bframe(struct bchannel *); 1901b2b03f8SKarsten Keil extern int get_next_dframe(struct dchannel *); 1911b2b03f8SKarsten Keil 1921b2b03f8SKarsten Keil #endif 193