1 #ifndef __LINUX_GPIO_DRIVER_H 2 #define __LINUX_GPIO_DRIVER_H 3 4 #include <linux/types.h> 5 #include <linux/module.h> 6 #include <linux/irq.h> 7 #include <linux/irqchip/chained_irq.h> 8 #include <linux/irqdomain.h> 9 #include <linux/lockdep.h> 10 #include <linux/pinctrl/pinctrl.h> 11 #include <linux/kconfig.h> 12 13 struct device; 14 struct gpio_desc; 15 struct of_phandle_args; 16 struct device_node; 17 struct seq_file; 18 19 #ifdef CONFIG_GPIOLIB 20 21 /** 22 * struct gpio_chip - abstract a GPIO controller 23 * @label: for diagnostics 24 * @parent: optional parent device providing the GPIOs 25 * @cdev: class device used by sysfs interface (may be NULL) 26 * @owner: helps prevent removal of modules exporting active GPIOs 27 * @data: per-instance data assigned by the driver 28 * @list: links gpio_chips together for traversal 29 * @request: optional hook for chip-specific activation, such as 30 * enabling module power and clock; may sleep 31 * @free: optional hook for chip-specific deactivation, such as 32 * disabling module power and clock; may sleep 33 * @get_direction: returns direction for signal "offset", 0=out, 1=in, 34 * (same as GPIOF_DIR_XXX), or negative error 35 * @direction_input: configures signal "offset" as input, or returns error 36 * @direction_output: configures signal "offset" as output, or returns error 37 * @get: returns value for signal "offset", 0=low, 1=high, or negative error 38 * @set: assigns output value for signal "offset" 39 * @set_multiple: assigns output values for multiple signals defined by "mask" 40 * @set_debounce: optional hook for setting debounce time for specified gpio in 41 * interrupt triggered gpio chips 42 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; 43 * implementation may not sleep 44 * @dbg_show: optional routine to show contents in debugfs; default code 45 * will be used when this is omitted, but custom code can show extra 46 * state (such as pullup/pulldown configuration). 47 * @base: identifies the first GPIO number handled by this chip; 48 * or, if negative during registration, requests dynamic ID allocation. 49 * DEPRECATION: providing anything non-negative and nailing the base 50 * offset of GPIO chips is deprecated. Please pass -1 as base to 51 * let gpiolib select the chip base in all possible cases. We want to 52 * get rid of the static GPIO number space in the long run. 53 * @ngpio: the number of GPIOs handled by this controller; the last GPIO 54 * handled is (base + ngpio - 1). 55 * @desc: array of ngpio descriptors. Private. 56 * @names: if set, must be an array of strings to use as alternative 57 * names for the GPIOs in this chip. Any entry in the array 58 * may be NULL if there is no alias for the GPIO, however the 59 * array must be @ngpio entries long. A name can include a single printk 60 * format specifier for an unsigned int. It is substituted by the actual 61 * number of the gpio. 62 * @can_sleep: flag must be set iff get()/set() methods sleep, as they 63 * must while accessing GPIO expander chips over I2C or SPI. This 64 * implies that if the chip supports IRQs, these IRQs need to be threaded 65 * as the chip access may sleep when e.g. reading out the IRQ status 66 * registers. 67 * @irq_not_threaded: flag must be set if @can_sleep is set but the 68 * IRQs don't need to be threaded 69 * @read_reg: reader function for generic GPIO 70 * @write_reg: writer function for generic GPIO 71 * @pin2mask: some generic GPIO controllers work with the big-endian bits 72 * notation, e.g. in a 8-bits register, GPIO7 is the least significant 73 * bit. This callback assigns the right bit mask. 74 * @reg_dat: data (in) register for generic GPIO 75 * @reg_set: output set register (out=high) for generic GPIO 76 * @reg_clk: output clear register (out=low) for generic GPIO 77 * @reg_dir: direction setting register for generic GPIO 78 * @bgpio_bits: number of register bits used for a generic GPIO i.e. 79 * <register width> * 8 80 * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep 81 * shadowed and real data registers writes together. 82 * @bgpio_data: shadowed data register for generic GPIO to clear/set bits 83 * safely. 84 * @bgpio_dir: shadowed direction register for generic GPIO to clear/set 85 * direction safely. 86 * @irqchip: GPIO IRQ chip impl, provided by GPIO driver 87 * @irqdomain: Interrupt translation domain; responsible for mapping 88 * between GPIO hwirq number and linux irq number 89 * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated) 90 * @irq_handler: the irq handler to use (often a predefined irq core function) 91 * for GPIO IRQs, provided by GPIO driver 92 * @irq_default_type: default IRQ triggering type applied during GPIO driver 93 * initialization, provided by GPIO driver 94 * @irq_parent: GPIO IRQ chip parent/bank linux irq number, 95 * provided by GPIO driver 96 * @lock_key: per GPIO IRQ chip lockdep class 97 * 98 * A gpio_chip can help platforms abstract various sources of GPIOs so 99 * they can all be accessed through a common programing interface. 100 * Example sources would be SOC controllers, FPGAs, multifunction 101 * chips, dedicated GPIO expanders, and so on. 102 * 103 * Each chip controls a number of signals, identified in method calls 104 * by "offset" values in the range 0..(@ngpio - 1). When those signals 105 * are referenced through calls like gpio_get_value(gpio), the offset 106 * is calculated by subtracting @base from the gpio number. 107 */ 108 struct gpio_chip { 109 const char *label; 110 struct device *parent; 111 struct device *cdev; 112 struct module *owner; 113 void *data; 114 struct list_head list; 115 116 int (*request)(struct gpio_chip *chip, 117 unsigned offset); 118 void (*free)(struct gpio_chip *chip, 119 unsigned offset); 120 int (*get_direction)(struct gpio_chip *chip, 121 unsigned offset); 122 int (*direction_input)(struct gpio_chip *chip, 123 unsigned offset); 124 int (*direction_output)(struct gpio_chip *chip, 125 unsigned offset, int value); 126 int (*get)(struct gpio_chip *chip, 127 unsigned offset); 128 void (*set)(struct gpio_chip *chip, 129 unsigned offset, int value); 130 void (*set_multiple)(struct gpio_chip *chip, 131 unsigned long *mask, 132 unsigned long *bits); 133 int (*set_debounce)(struct gpio_chip *chip, 134 unsigned offset, 135 unsigned debounce); 136 137 int (*to_irq)(struct gpio_chip *chip, 138 unsigned offset); 139 140 void (*dbg_show)(struct seq_file *s, 141 struct gpio_chip *chip); 142 int base; 143 u16 ngpio; 144 struct gpio_desc *desc; 145 const char *const *names; 146 bool can_sleep; 147 bool irq_not_threaded; 148 149 #if IS_ENABLED(CONFIG_GPIO_GENERIC) 150 unsigned long (*read_reg)(void __iomem *reg); 151 void (*write_reg)(void __iomem *reg, unsigned long data); 152 unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin); 153 void __iomem *reg_dat; 154 void __iomem *reg_set; 155 void __iomem *reg_clr; 156 void __iomem *reg_dir; 157 int bgpio_bits; 158 spinlock_t bgpio_lock; 159 unsigned long bgpio_data; 160 unsigned long bgpio_dir; 161 #endif 162 163 #ifdef CONFIG_GPIOLIB_IRQCHIP 164 /* 165 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib 166 * to handle IRQs for most practical cases. 167 */ 168 struct irq_chip *irqchip; 169 struct irq_domain *irqdomain; 170 unsigned int irq_base; 171 irq_flow_handler_t irq_handler; 172 unsigned int irq_default_type; 173 int irq_parent; 174 struct lock_class_key *lock_key; 175 #endif 176 177 #if defined(CONFIG_OF_GPIO) 178 /* 179 * If CONFIG_OF is enabled, then all GPIO controllers described in the 180 * device tree automatically may have an OF translation 181 */ 182 struct device_node *of_node; 183 int of_gpio_n_cells; 184 int (*of_xlate)(struct gpio_chip *gc, 185 const struct of_phandle_args *gpiospec, u32 *flags); 186 #endif 187 #ifdef CONFIG_PINCTRL 188 /* 189 * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally 190 * describe the actual pin range which they serve in an SoC. This 191 * information would be used by pinctrl subsystem to configure 192 * corresponding pins for gpio usage. 193 */ 194 struct list_head pin_ranges; 195 #endif 196 }; 197 198 extern const char *gpiochip_is_requested(struct gpio_chip *chip, 199 unsigned offset); 200 201 /* add/remove chips */ 202 extern int gpiochip_add_data(struct gpio_chip *chip, void *data); 203 static inline int gpiochip_add(struct gpio_chip *chip) 204 { 205 return gpiochip_add_data(chip, NULL); 206 } 207 extern void gpiochip_remove(struct gpio_chip *chip); 208 extern struct gpio_chip *gpiochip_find(void *data, 209 int (*match)(struct gpio_chip *chip, void *data)); 210 211 /* lock/unlock as IRQ */ 212 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); 213 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); 214 215 /* get driver data */ 216 static inline void *gpiochip_get_data(struct gpio_chip *chip) 217 { 218 return chip->data; 219 } 220 221 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); 222 223 struct bgpio_pdata { 224 const char *label; 225 int base; 226 int ngpio; 227 }; 228 229 #if IS_ENABLED(CONFIG_GPIO_GENERIC) 230 231 int bgpio_init(struct gpio_chip *gc, struct device *dev, 232 unsigned long sz, void __iomem *dat, void __iomem *set, 233 void __iomem *clr, void __iomem *dirout, void __iomem *dirin, 234 unsigned long flags); 235 236 #define BGPIOF_BIG_ENDIAN BIT(0) 237 #define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ 238 #define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ 239 #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) 240 #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ 241 #define BGPIOF_NO_OUTPUT BIT(5) /* only input */ 242 243 #endif 244 245 #ifdef CONFIG_GPIOLIB_IRQCHIP 246 247 void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, 248 struct irq_chip *irqchip, 249 int parent_irq, 250 irq_flow_handler_t parent_handler); 251 252 int _gpiochip_irqchip_add(struct gpio_chip *gpiochip, 253 struct irq_chip *irqchip, 254 unsigned int first_irq, 255 irq_flow_handler_t handler, 256 unsigned int type, 257 struct lock_class_key *lock_key); 258 259 #ifdef CONFIG_LOCKDEP 260 #define gpiochip_irqchip_add(...) \ 261 ( \ 262 ({ \ 263 static struct lock_class_key _key; \ 264 _gpiochip_irqchip_add(__VA_ARGS__, &_key); \ 265 }) \ 266 ) 267 #else 268 #define gpiochip_irqchip_add(...) \ 269 _gpiochip_irqchip_add(__VA_ARGS__, NULL) 270 #endif 271 272 #endif /* CONFIG_GPIOLIB_IRQCHIP */ 273 274 int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset); 275 void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset); 276 277 #ifdef CONFIG_PINCTRL 278 279 /** 280 * struct gpio_pin_range - pin range controlled by a gpio chip 281 * @head: list for maintaining set of pin ranges, used internally 282 * @pctldev: pinctrl device which handles corresponding pins 283 * @range: actual range of pins controlled by a gpio controller 284 */ 285 286 struct gpio_pin_range { 287 struct list_head node; 288 struct pinctrl_dev *pctldev; 289 struct pinctrl_gpio_range range; 290 }; 291 292 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 293 unsigned int gpio_offset, unsigned int pin_offset, 294 unsigned int npins); 295 int gpiochip_add_pingroup_range(struct gpio_chip *chip, 296 struct pinctrl_dev *pctldev, 297 unsigned int gpio_offset, const char *pin_group); 298 void gpiochip_remove_pin_ranges(struct gpio_chip *chip); 299 300 #else 301 302 static inline int 303 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 304 unsigned int gpio_offset, unsigned int pin_offset, 305 unsigned int npins) 306 { 307 return 0; 308 } 309 static inline int 310 gpiochip_add_pingroup_range(struct gpio_chip *chip, 311 struct pinctrl_dev *pctldev, 312 unsigned int gpio_offset, const char *pin_group) 313 { 314 return 0; 315 } 316 317 static inline void 318 gpiochip_remove_pin_ranges(struct gpio_chip *chip) 319 { 320 } 321 322 #endif /* CONFIG_PINCTRL */ 323 324 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, 325 const char *label); 326 void gpiochip_free_own_desc(struct gpio_desc *desc); 327 328 #else /* CONFIG_GPIOLIB */ 329 330 static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) 331 { 332 /* GPIO can never have been requested */ 333 WARN_ON(1); 334 return ERR_PTR(-ENODEV); 335 } 336 337 #endif /* CONFIG_GPIOLIB */ 338 339 #endif 340