1 #ifndef __LINUX_GPIO_DRIVER_H 2 #define __LINUX_GPIO_DRIVER_H 3 4 #include <linux/device.h> 5 #include <linux/types.h> 6 #include <linux/module.h> 7 #include <linux/irq.h> 8 #include <linux/irqchip/chained_irq.h> 9 #include <linux/irqdomain.h> 10 #include <linux/lockdep.h> 11 #include <linux/pinctrl/pinctrl.h> 12 #include <linux/kconfig.h> 13 14 struct gpio_desc; 15 struct of_phandle_args; 16 struct device_node; 17 struct seq_file; 18 struct gpio_device; 19 20 #ifdef CONFIG_GPIOLIB 21 22 /** 23 * struct gpio_chip - abstract a GPIO controller 24 * @label: a functional name for the GPIO device, such as a part 25 * number or the name of the SoC IP-block implementing it. 26 * @gpiodev: the internal state holder, opaque struct 27 * @parent: optional parent device providing the GPIOs 28 * @owner: helps prevent removal of modules exporting active GPIOs 29 * @request: optional hook for chip-specific activation, such as 30 * enabling module power and clock; may sleep 31 * @free: optional hook for chip-specific deactivation, such as 32 * disabling module power and clock; may sleep 33 * @get_direction: returns direction for signal "offset", 0=out, 1=in, 34 * (same as GPIOF_DIR_XXX), or negative error 35 * @direction_input: configures signal "offset" as input, or returns error 36 * @direction_output: configures signal "offset" as output, or returns error 37 * @get: returns value for signal "offset", 0=low, 1=high, or negative error 38 * @set: assigns output value for signal "offset" 39 * @set_multiple: assigns output values for multiple signals defined by "mask" 40 * @set_debounce: optional hook for setting debounce time for specified gpio in 41 * interrupt triggered gpio chips 42 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; 43 * implementation may not sleep 44 * @dbg_show: optional routine to show contents in debugfs; default code 45 * will be used when this is omitted, but custom code can show extra 46 * state (such as pullup/pulldown configuration). 47 * @base: identifies the first GPIO number handled by this chip; 48 * or, if negative during registration, requests dynamic ID allocation. 49 * DEPRECATION: providing anything non-negative and nailing the base 50 * offset of GPIO chips is deprecated. Please pass -1 as base to 51 * let gpiolib select the chip base in all possible cases. We want to 52 * get rid of the static GPIO number space in the long run. 53 * @ngpio: the number of GPIOs handled by this controller; the last GPIO 54 * handled is (base + ngpio - 1). 55 * @names: if set, must be an array of strings to use as alternative 56 * names for the GPIOs in this chip. Any entry in the array 57 * may be NULL if there is no alias for the GPIO, however the 58 * array must be @ngpio entries long. A name can include a single printk 59 * format specifier for an unsigned int. It is substituted by the actual 60 * number of the gpio. 61 * @can_sleep: flag must be set iff get()/set() methods sleep, as they 62 * must while accessing GPIO expander chips over I2C or SPI. This 63 * implies that if the chip supports IRQs, these IRQs need to be threaded 64 * as the chip access may sleep when e.g. reading out the IRQ status 65 * registers. 66 * @irq_not_threaded: flag must be set if @can_sleep is set but the 67 * IRQs don't need to be threaded 68 * @read_reg: reader function for generic GPIO 69 * @write_reg: writer function for generic GPIO 70 * @pin2mask: some generic GPIO controllers work with the big-endian bits 71 * notation, e.g. in a 8-bits register, GPIO7 is the least significant 72 * bit. This callback assigns the right bit mask. 73 * @reg_dat: data (in) register for generic GPIO 74 * @reg_set: output set register (out=high) for generic GPIO 75 * @reg_clk: output clear register (out=low) for generic GPIO 76 * @reg_dir: direction setting register for generic GPIO 77 * @bgpio_bits: number of register bits used for a generic GPIO i.e. 78 * <register width> * 8 79 * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep 80 * shadowed and real data registers writes together. 81 * @bgpio_data: shadowed data register for generic GPIO to clear/set bits 82 * safely. 83 * @bgpio_dir: shadowed direction register for generic GPIO to clear/set 84 * direction safely. 85 * @irqchip: GPIO IRQ chip impl, provided by GPIO driver 86 * @irqdomain: Interrupt translation domain; responsible for mapping 87 * between GPIO hwirq number and linux irq number 88 * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated) 89 * @irq_handler: the irq handler to use (often a predefined irq core function) 90 * for GPIO IRQs, provided by GPIO driver 91 * @irq_default_type: default IRQ triggering type applied during GPIO driver 92 * initialization, provided by GPIO driver 93 * @irq_parent: GPIO IRQ chip parent/bank linux irq number, 94 * provided by GPIO driver 95 * @lock_key: per GPIO IRQ chip lockdep class 96 * 97 * A gpio_chip can help platforms abstract various sources of GPIOs so 98 * they can all be accessed through a common programing interface. 99 * Example sources would be SOC controllers, FPGAs, multifunction 100 * chips, dedicated GPIO expanders, and so on. 101 * 102 * Each chip controls a number of signals, identified in method calls 103 * by "offset" values in the range 0..(@ngpio - 1). When those signals 104 * are referenced through calls like gpio_get_value(gpio), the offset 105 * is calculated by subtracting @base from the gpio number. 106 */ 107 struct gpio_chip { 108 const char *label; 109 struct gpio_device *gpiodev; 110 struct device *parent; 111 struct module *owner; 112 113 int (*request)(struct gpio_chip *chip, 114 unsigned offset); 115 void (*free)(struct gpio_chip *chip, 116 unsigned offset); 117 int (*get_direction)(struct gpio_chip *chip, 118 unsigned offset); 119 int (*direction_input)(struct gpio_chip *chip, 120 unsigned offset); 121 int (*direction_output)(struct gpio_chip *chip, 122 unsigned offset, int value); 123 int (*get)(struct gpio_chip *chip, 124 unsigned offset); 125 void (*set)(struct gpio_chip *chip, 126 unsigned offset, int value); 127 void (*set_multiple)(struct gpio_chip *chip, 128 unsigned long *mask, 129 unsigned long *bits); 130 int (*set_debounce)(struct gpio_chip *chip, 131 unsigned offset, 132 unsigned debounce); 133 134 int (*to_irq)(struct gpio_chip *chip, 135 unsigned offset); 136 137 void (*dbg_show)(struct seq_file *s, 138 struct gpio_chip *chip); 139 int base; 140 u16 ngpio; 141 const char *const *names; 142 bool can_sleep; 143 bool irq_not_threaded; 144 145 #if IS_ENABLED(CONFIG_GPIO_GENERIC) 146 unsigned long (*read_reg)(void __iomem *reg); 147 void (*write_reg)(void __iomem *reg, unsigned long data); 148 unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin); 149 void __iomem *reg_dat; 150 void __iomem *reg_set; 151 void __iomem *reg_clr; 152 void __iomem *reg_dir; 153 int bgpio_bits; 154 spinlock_t bgpio_lock; 155 unsigned long bgpio_data; 156 unsigned long bgpio_dir; 157 #endif 158 159 #ifdef CONFIG_GPIOLIB_IRQCHIP 160 /* 161 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib 162 * to handle IRQs for most practical cases. 163 */ 164 struct irq_chip *irqchip; 165 struct irq_domain *irqdomain; 166 unsigned int irq_base; 167 irq_flow_handler_t irq_handler; 168 unsigned int irq_default_type; 169 int irq_parent; 170 struct lock_class_key *lock_key; 171 #endif 172 173 #if defined(CONFIG_OF_GPIO) 174 /* 175 * If CONFIG_OF is enabled, then all GPIO controllers described in the 176 * device tree automatically may have an OF translation 177 */ 178 struct device_node *of_node; 179 int of_gpio_n_cells; 180 int (*of_xlate)(struct gpio_chip *gc, 181 const struct of_phandle_args *gpiospec, u32 *flags); 182 #endif 183 }; 184 185 extern const char *gpiochip_is_requested(struct gpio_chip *chip, 186 unsigned offset); 187 188 /* add/remove chips */ 189 extern int gpiochip_add_data(struct gpio_chip *chip, void *data); 190 static inline int gpiochip_add(struct gpio_chip *chip) 191 { 192 return gpiochip_add_data(chip, NULL); 193 } 194 extern void gpiochip_remove(struct gpio_chip *chip); 195 extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, 196 void *data); 197 extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip); 198 199 extern struct gpio_chip *gpiochip_find(void *data, 200 int (*match)(struct gpio_chip *chip, void *data)); 201 202 /* lock/unlock as IRQ */ 203 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); 204 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); 205 bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset); 206 207 /* Line status inquiry for drivers */ 208 bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset); 209 bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset); 210 211 /* get driver data */ 212 void *gpiochip_get_data(struct gpio_chip *chip); 213 214 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); 215 216 struct bgpio_pdata { 217 const char *label; 218 int base; 219 int ngpio; 220 }; 221 222 #if IS_ENABLED(CONFIG_GPIO_GENERIC) 223 224 int bgpio_init(struct gpio_chip *gc, struct device *dev, 225 unsigned long sz, void __iomem *dat, void __iomem *set, 226 void __iomem *clr, void __iomem *dirout, void __iomem *dirin, 227 unsigned long flags); 228 229 #define BGPIOF_BIG_ENDIAN BIT(0) 230 #define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ 231 #define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ 232 #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) 233 #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ 234 #define BGPIOF_NO_OUTPUT BIT(5) /* only input */ 235 236 #endif 237 238 #ifdef CONFIG_GPIOLIB_IRQCHIP 239 240 void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, 241 struct irq_chip *irqchip, 242 int parent_irq, 243 irq_flow_handler_t parent_handler); 244 245 int _gpiochip_irqchip_add(struct gpio_chip *gpiochip, 246 struct irq_chip *irqchip, 247 unsigned int first_irq, 248 irq_flow_handler_t handler, 249 unsigned int type, 250 struct lock_class_key *lock_key); 251 252 #ifdef CONFIG_LOCKDEP 253 #define gpiochip_irqchip_add(...) \ 254 ( \ 255 ({ \ 256 static struct lock_class_key _key; \ 257 _gpiochip_irqchip_add(__VA_ARGS__, &_key); \ 258 }) \ 259 ) 260 #else 261 #define gpiochip_irqchip_add(...) \ 262 _gpiochip_irqchip_add(__VA_ARGS__, NULL) 263 #endif 264 265 #endif /* CONFIG_GPIOLIB_IRQCHIP */ 266 267 int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset); 268 void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset); 269 270 #ifdef CONFIG_PINCTRL 271 272 /** 273 * struct gpio_pin_range - pin range controlled by a gpio chip 274 * @head: list for maintaining set of pin ranges, used internally 275 * @pctldev: pinctrl device which handles corresponding pins 276 * @range: actual range of pins controlled by a gpio controller 277 */ 278 279 struct gpio_pin_range { 280 struct list_head node; 281 struct pinctrl_dev *pctldev; 282 struct pinctrl_gpio_range range; 283 }; 284 285 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 286 unsigned int gpio_offset, unsigned int pin_offset, 287 unsigned int npins); 288 int gpiochip_add_pingroup_range(struct gpio_chip *chip, 289 struct pinctrl_dev *pctldev, 290 unsigned int gpio_offset, const char *pin_group); 291 void gpiochip_remove_pin_ranges(struct gpio_chip *chip); 292 293 #else 294 295 static inline int 296 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 297 unsigned int gpio_offset, unsigned int pin_offset, 298 unsigned int npins) 299 { 300 return 0; 301 } 302 static inline int 303 gpiochip_add_pingroup_range(struct gpio_chip *chip, 304 struct pinctrl_dev *pctldev, 305 unsigned int gpio_offset, const char *pin_group) 306 { 307 return 0; 308 } 309 310 static inline void 311 gpiochip_remove_pin_ranges(struct gpio_chip *chip) 312 { 313 } 314 315 #endif /* CONFIG_PINCTRL */ 316 317 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, 318 const char *label); 319 void gpiochip_free_own_desc(struct gpio_desc *desc); 320 321 #else /* CONFIG_GPIOLIB */ 322 323 static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) 324 { 325 /* GPIO can never have been requested */ 326 WARN_ON(1); 327 return ERR_PTR(-ENODEV); 328 } 329 330 #endif /* CONFIG_GPIOLIB */ 331 332 #endif 333