179a9becdSAlexandre Courbot #ifndef __LINUX_GPIO_DRIVER_H 279a9becdSAlexandre Courbot #define __LINUX_GPIO_DRIVER_H 379a9becdSAlexandre Courbot 479a9becdSAlexandre Courbot #include <linux/types.h> 5c9a9972bSAlexandre Courbot #include <linux/module.h> 614250520SLinus Walleij #include <linux/irq.h> 714250520SLinus Walleij #include <linux/irqchip/chained_irq.h> 814250520SLinus Walleij #include <linux/irqdomain.h> 9964cb341SLinus Walleij #include <linux/pinctrl/pinctrl.h> 1079a9becdSAlexandre Courbot 1179a9becdSAlexandre Courbot struct device; 1279a9becdSAlexandre Courbot struct gpio_desc; 13c9a9972bSAlexandre Courbot struct of_phandle_args; 14c9a9972bSAlexandre Courbot struct device_node; 15f3ed0b66SStephen Rothwell struct seq_file; 1679a9becdSAlexandre Courbot 17bb1e88ccSAlexandre Courbot #ifdef CONFIG_GPIOLIB 18bb1e88ccSAlexandre Courbot 1979a9becdSAlexandre Courbot /** 2079a9becdSAlexandre Courbot * struct gpio_chip - abstract a GPIO controller 2179a9becdSAlexandre Courbot * @label: for diagnostics 2279a9becdSAlexandre Courbot * @dev: optional device providing the GPIOs 236a4b6b0aSJohan Hovold * @cdev: class device used by sysfs interface (may be NULL) 2479a9becdSAlexandre Courbot * @owner: helps prevent removal of modules exporting active GPIOs 2579a9becdSAlexandre Courbot * @list: links gpio_chips together for traversal 2679a9becdSAlexandre Courbot * @request: optional hook for chip-specific activation, such as 2779a9becdSAlexandre Courbot * enabling module power and clock; may sleep 2879a9becdSAlexandre Courbot * @free: optional hook for chip-specific deactivation, such as 2979a9becdSAlexandre Courbot * disabling module power and clock; may sleep 3079a9becdSAlexandre Courbot * @get_direction: returns direction for signal "offset", 0=out, 1=in, 3179a9becdSAlexandre Courbot * (same as GPIOF_DIR_XXX), or negative error 3279a9becdSAlexandre Courbot * @direction_input: configures signal "offset" as input, or returns error 3379a9becdSAlexandre Courbot * @direction_output: configures signal "offset" as output, or returns error 3479a9becdSAlexandre Courbot * @get: returns value for signal "offset"; for output signals this 3579a9becdSAlexandre Courbot * returns either the value actually sensed, or zero 3679a9becdSAlexandre Courbot * @set: assigns output value for signal "offset" 375f424243SRojhalat Ibrahim * @set_multiple: assigns output values for multiple signals defined by "mask" 3879a9becdSAlexandre Courbot * @set_debounce: optional hook for setting debounce time for specified gpio in 3979a9becdSAlexandre Courbot * interrupt triggered gpio chips 4079a9becdSAlexandre Courbot * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; 4179a9becdSAlexandre Courbot * implementation may not sleep 4279a9becdSAlexandre Courbot * @dbg_show: optional routine to show contents in debugfs; default code 4379a9becdSAlexandre Courbot * will be used when this is omitted, but custom code can show extra 4479a9becdSAlexandre Courbot * state (such as pullup/pulldown configuration). 45af6c235dSLinus Walleij * @base: identifies the first GPIO number handled by this chip; 46af6c235dSLinus Walleij * or, if negative during registration, requests dynamic ID allocation. 47af6c235dSLinus Walleij * DEPRECATION: providing anything non-negative and nailing the base 48af6c235dSLinus Walleij * base offset of GPIO chips is deprecated. Please pass -1 as base to 49af6c235dSLinus Walleij * let gpiolib select the chip base in all possible cases. We want to 50af6c235dSLinus Walleij * get rid of the static GPIO number space in the long run. 5179a9becdSAlexandre Courbot * @ngpio: the number of GPIOs handled by this controller; the last GPIO 5279a9becdSAlexandre Courbot * handled is (base + ngpio - 1). 5379a9becdSAlexandre Courbot * @desc: array of ngpio descriptors. Private. 5479a9becdSAlexandre Courbot * @names: if set, must be an array of strings to use as alternative 5579a9becdSAlexandre Courbot * names for the GPIOs in this chip. Any entry in the array 5679a9becdSAlexandre Courbot * may be NULL if there is no alias for the GPIO, however the 5779a9becdSAlexandre Courbot * array must be @ngpio entries long. A name can include a single printk 5879a9becdSAlexandre Courbot * format specifier for an unsigned int. It is substituted by the actual 5979a9becdSAlexandre Courbot * number of the gpio. 609fb1f39eSLinus Walleij * @can_sleep: flag must be set iff get()/set() methods sleep, as they 611c8732bbSLinus Walleij * must while accessing GPIO expander chips over I2C or SPI. This 621c8732bbSLinus Walleij * implies that if the chip supports IRQs, these IRQs need to be threaded 631c8732bbSLinus Walleij * as the chip access may sleep when e.g. reading out the IRQ status 641c8732bbSLinus Walleij * registers. 65295494afSOctavian Purdila * @irq_not_threaded: flag must be set if @can_sleep is set but the 66295494afSOctavian Purdila * IRQs don't need to be threaded 6779a9becdSAlexandre Courbot * 6879a9becdSAlexandre Courbot * A gpio_chip can help platforms abstract various sources of GPIOs so 6979a9becdSAlexandre Courbot * they can all be accessed through a common programing interface. 7079a9becdSAlexandre Courbot * Example sources would be SOC controllers, FPGAs, multifunction 7179a9becdSAlexandre Courbot * chips, dedicated GPIO expanders, and so on. 7279a9becdSAlexandre Courbot * 7379a9becdSAlexandre Courbot * Each chip controls a number of signals, identified in method calls 7479a9becdSAlexandre Courbot * by "offset" values in the range 0..(@ngpio - 1). When those signals 7579a9becdSAlexandre Courbot * are referenced through calls like gpio_get_value(gpio), the offset 7679a9becdSAlexandre Courbot * is calculated by subtracting @base from the gpio number. 7779a9becdSAlexandre Courbot */ 7879a9becdSAlexandre Courbot struct gpio_chip { 7979a9becdSAlexandre Courbot const char *label; 8079a9becdSAlexandre Courbot struct device *dev; 816a4b6b0aSJohan Hovold struct device *cdev; 8279a9becdSAlexandre Courbot struct module *owner; 8379a9becdSAlexandre Courbot struct list_head list; 8479a9becdSAlexandre Courbot 8579a9becdSAlexandre Courbot int (*request)(struct gpio_chip *chip, 8679a9becdSAlexandre Courbot unsigned offset); 8779a9becdSAlexandre Courbot void (*free)(struct gpio_chip *chip, 8879a9becdSAlexandre Courbot unsigned offset); 8979a9becdSAlexandre Courbot int (*get_direction)(struct gpio_chip *chip, 9079a9becdSAlexandre Courbot unsigned offset); 9179a9becdSAlexandre Courbot int (*direction_input)(struct gpio_chip *chip, 9279a9becdSAlexandre Courbot unsigned offset); 9379a9becdSAlexandre Courbot int (*direction_output)(struct gpio_chip *chip, 9479a9becdSAlexandre Courbot unsigned offset, int value); 9579a9becdSAlexandre Courbot int (*get)(struct gpio_chip *chip, 9679a9becdSAlexandre Courbot unsigned offset); 9779a9becdSAlexandre Courbot void (*set)(struct gpio_chip *chip, 9879a9becdSAlexandre Courbot unsigned offset, int value); 995f424243SRojhalat Ibrahim void (*set_multiple)(struct gpio_chip *chip, 1005f424243SRojhalat Ibrahim unsigned long *mask, 1015f424243SRojhalat Ibrahim unsigned long *bits); 10279a9becdSAlexandre Courbot int (*set_debounce)(struct gpio_chip *chip, 10379a9becdSAlexandre Courbot unsigned offset, 10479a9becdSAlexandre Courbot unsigned debounce); 10579a9becdSAlexandre Courbot 10679a9becdSAlexandre Courbot int (*to_irq)(struct gpio_chip *chip, 10779a9becdSAlexandre Courbot unsigned offset); 10879a9becdSAlexandre Courbot 10979a9becdSAlexandre Courbot void (*dbg_show)(struct seq_file *s, 11079a9becdSAlexandre Courbot struct gpio_chip *chip); 11179a9becdSAlexandre Courbot int base; 11279a9becdSAlexandre Courbot u16 ngpio; 11379a9becdSAlexandre Courbot struct gpio_desc *desc; 11479a9becdSAlexandre Courbot const char *const *names; 1159fb1f39eSLinus Walleij bool can_sleep; 116295494afSOctavian Purdila bool irq_not_threaded; 11779a9becdSAlexandre Courbot 11814250520SLinus Walleij #ifdef CONFIG_GPIOLIB_IRQCHIP 11914250520SLinus Walleij /* 1207d75a871SPaul Bolle * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib 12114250520SLinus Walleij * to handle IRQs for most practical cases. 12214250520SLinus Walleij */ 12314250520SLinus Walleij struct irq_chip *irqchip; 12414250520SLinus Walleij struct irq_domain *irqdomain; 125c3626fdeSLinus Walleij unsigned int irq_base; 12614250520SLinus Walleij irq_flow_handler_t irq_handler; 12714250520SLinus Walleij unsigned int irq_default_type; 12825e4fe92SDmitry Eremin-Solenikov int irq_parent; 12914250520SLinus Walleij #endif 13014250520SLinus Walleij 13179a9becdSAlexandre Courbot #if defined(CONFIG_OF_GPIO) 13279a9becdSAlexandre Courbot /* 13379a9becdSAlexandre Courbot * If CONFIG_OF is enabled, then all GPIO controllers described in the 13479a9becdSAlexandre Courbot * device tree automatically may have an OF translation 13579a9becdSAlexandre Courbot */ 13679a9becdSAlexandre Courbot struct device_node *of_node; 13779a9becdSAlexandre Courbot int of_gpio_n_cells; 13879a9becdSAlexandre Courbot int (*of_xlate)(struct gpio_chip *gc, 13979a9becdSAlexandre Courbot const struct of_phandle_args *gpiospec, u32 *flags); 14079a9becdSAlexandre Courbot #endif 14179a9becdSAlexandre Courbot #ifdef CONFIG_PINCTRL 14279a9becdSAlexandre Courbot /* 14379a9becdSAlexandre Courbot * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally 14479a9becdSAlexandre Courbot * describe the actual pin range which they serve in an SoC. This 14579a9becdSAlexandre Courbot * information would be used by pinctrl subsystem to configure 14679a9becdSAlexandre Courbot * corresponding pins for gpio usage. 14779a9becdSAlexandre Courbot */ 14879a9becdSAlexandre Courbot struct list_head pin_ranges; 14979a9becdSAlexandre Courbot #endif 15079a9becdSAlexandre Courbot }; 15179a9becdSAlexandre Courbot 15279a9becdSAlexandre Courbot extern const char *gpiochip_is_requested(struct gpio_chip *chip, 15379a9becdSAlexandre Courbot unsigned offset); 15479a9becdSAlexandre Courbot 15579a9becdSAlexandre Courbot /* add/remove chips */ 15679a9becdSAlexandre Courbot extern int gpiochip_add(struct gpio_chip *chip); 157e1db1706Sabdoulaye berthe extern void gpiochip_remove(struct gpio_chip *chip); 15879a9becdSAlexandre Courbot extern struct gpio_chip *gpiochip_find(void *data, 15979a9becdSAlexandre Courbot int (*match)(struct gpio_chip *chip, void *data)); 16079a9becdSAlexandre Courbot 16179a9becdSAlexandre Courbot /* lock/unlock as IRQ */ 162e3a2e878SAlexandre Courbot int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); 163e3a2e878SAlexandre Courbot void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); 16479a9becdSAlexandre Courbot 165bb1e88ccSAlexandre Courbot struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); 166bb1e88ccSAlexandre Courbot 16714250520SLinus Walleij #ifdef CONFIG_GPIOLIB_IRQCHIP 16814250520SLinus Walleij 16914250520SLinus Walleij void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, 17014250520SLinus Walleij struct irq_chip *irqchip, 17114250520SLinus Walleij int parent_irq, 17214250520SLinus Walleij irq_flow_handler_t parent_handler); 17314250520SLinus Walleij 17414250520SLinus Walleij int gpiochip_irqchip_add(struct gpio_chip *gpiochip, 17514250520SLinus Walleij struct irq_chip *irqchip, 17614250520SLinus Walleij unsigned int first_irq, 17714250520SLinus Walleij irq_flow_handler_t handler, 17814250520SLinus Walleij unsigned int type); 17914250520SLinus Walleij 1807d75a871SPaul Bolle #endif /* CONFIG_GPIOLIB_IRQCHIP */ 18114250520SLinus Walleij 182964cb341SLinus Walleij #ifdef CONFIG_PINCTRL 183964cb341SLinus Walleij 184964cb341SLinus Walleij /** 185964cb341SLinus Walleij * struct gpio_pin_range - pin range controlled by a gpio chip 186964cb341SLinus Walleij * @head: list for maintaining set of pin ranges, used internally 187964cb341SLinus Walleij * @pctldev: pinctrl device which handles corresponding pins 188964cb341SLinus Walleij * @range: actual range of pins controlled by a gpio controller 189964cb341SLinus Walleij */ 190964cb341SLinus Walleij 191964cb341SLinus Walleij struct gpio_pin_range { 192964cb341SLinus Walleij struct list_head node; 193964cb341SLinus Walleij struct pinctrl_dev *pctldev; 194964cb341SLinus Walleij struct pinctrl_gpio_range range; 195964cb341SLinus Walleij }; 196964cb341SLinus Walleij 197964cb341SLinus Walleij int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 198964cb341SLinus Walleij unsigned int gpio_offset, unsigned int pin_offset, 199964cb341SLinus Walleij unsigned int npins); 200964cb341SLinus Walleij int gpiochip_add_pingroup_range(struct gpio_chip *chip, 201964cb341SLinus Walleij struct pinctrl_dev *pctldev, 202964cb341SLinus Walleij unsigned int gpio_offset, const char *pin_group); 203964cb341SLinus Walleij void gpiochip_remove_pin_ranges(struct gpio_chip *chip); 204964cb341SLinus Walleij 205964cb341SLinus Walleij #else 206964cb341SLinus Walleij 207964cb341SLinus Walleij static inline int 208964cb341SLinus Walleij gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 209964cb341SLinus Walleij unsigned int gpio_offset, unsigned int pin_offset, 210964cb341SLinus Walleij unsigned int npins) 211964cb341SLinus Walleij { 212964cb341SLinus Walleij return 0; 213964cb341SLinus Walleij } 214964cb341SLinus Walleij static inline int 215964cb341SLinus Walleij gpiochip_add_pingroup_range(struct gpio_chip *chip, 216964cb341SLinus Walleij struct pinctrl_dev *pctldev, 217964cb341SLinus Walleij unsigned int gpio_offset, const char *pin_group) 218964cb341SLinus Walleij { 219964cb341SLinus Walleij return 0; 220964cb341SLinus Walleij } 221964cb341SLinus Walleij 222964cb341SLinus Walleij static inline void 223964cb341SLinus Walleij gpiochip_remove_pin_ranges(struct gpio_chip *chip) 224964cb341SLinus Walleij { 225964cb341SLinus Walleij } 226964cb341SLinus Walleij 227964cb341SLinus Walleij #endif /* CONFIG_PINCTRL */ 228964cb341SLinus Walleij 229abdc08a3SAlexandre Courbot struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, 230abdc08a3SAlexandre Courbot const char *label); 231f7d4ad98SGuenter Roeck void gpiochip_free_own_desc(struct gpio_desc *desc); 232f7d4ad98SGuenter Roeck 233bb1e88ccSAlexandre Courbot #else /* CONFIG_GPIOLIB */ 234bb1e88ccSAlexandre Courbot 235bb1e88ccSAlexandre Courbot static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) 236bb1e88ccSAlexandre Courbot { 237bb1e88ccSAlexandre Courbot /* GPIO can never have been requested */ 238bb1e88ccSAlexandre Courbot WARN_ON(1); 239bb1e88ccSAlexandre Courbot return ERR_PTR(-ENODEV); 240bb1e88ccSAlexandre Courbot } 241bb1e88ccSAlexandre Courbot 242bb1e88ccSAlexandre Courbot #endif /* CONFIG_GPIOLIB */ 243bb1e88ccSAlexandre Courbot 24479a9becdSAlexandre Courbot #endif 245