xref: /openbmc/linux/include/linux/gpio/driver.h (revision abdc08a3)
179a9becdSAlexandre Courbot #ifndef __LINUX_GPIO_DRIVER_H
279a9becdSAlexandre Courbot #define __LINUX_GPIO_DRIVER_H
379a9becdSAlexandre Courbot 
479a9becdSAlexandre Courbot #include <linux/types.h>
5c9a9972bSAlexandre Courbot #include <linux/module.h>
614250520SLinus Walleij #include <linux/irq.h>
714250520SLinus Walleij #include <linux/irqchip/chained_irq.h>
814250520SLinus Walleij #include <linux/irqdomain.h>
979a9becdSAlexandre Courbot 
1079a9becdSAlexandre Courbot struct device;
1179a9becdSAlexandre Courbot struct gpio_desc;
12c9a9972bSAlexandre Courbot struct of_phandle_args;
13c9a9972bSAlexandre Courbot struct device_node;
14f3ed0b66SStephen Rothwell struct seq_file;
1579a9becdSAlexandre Courbot 
16bb1e88ccSAlexandre Courbot #ifdef CONFIG_GPIOLIB
17bb1e88ccSAlexandre Courbot 
1879a9becdSAlexandre Courbot /**
1979a9becdSAlexandre Courbot  * struct gpio_chip - abstract a GPIO controller
2079a9becdSAlexandre Courbot  * @label: for diagnostics
2179a9becdSAlexandre Courbot  * @dev: optional device providing the GPIOs
2279a9becdSAlexandre Courbot  * @owner: helps prevent removal of modules exporting active GPIOs
2379a9becdSAlexandre Courbot  * @list: links gpio_chips together for traversal
2479a9becdSAlexandre Courbot  * @request: optional hook for chip-specific activation, such as
2579a9becdSAlexandre Courbot  *	enabling module power and clock; may sleep
2679a9becdSAlexandre Courbot  * @free: optional hook for chip-specific deactivation, such as
2779a9becdSAlexandre Courbot  *	disabling module power and clock; may sleep
2879a9becdSAlexandre Courbot  * @get_direction: returns direction for signal "offset", 0=out, 1=in,
2979a9becdSAlexandre Courbot  *	(same as GPIOF_DIR_XXX), or negative error
3079a9becdSAlexandre Courbot  * @direction_input: configures signal "offset" as input, or returns error
3179a9becdSAlexandre Courbot  * @direction_output: configures signal "offset" as output, or returns error
3279a9becdSAlexandre Courbot  * @get: returns value for signal "offset"; for output signals this
3379a9becdSAlexandre Courbot  *	returns either the value actually sensed, or zero
3479a9becdSAlexandre Courbot  * @set: assigns output value for signal "offset"
3579a9becdSAlexandre Courbot  * @set_debounce: optional hook for setting debounce time for specified gpio in
3679a9becdSAlexandre Courbot  *      interrupt triggered gpio chips
3779a9becdSAlexandre Courbot  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
3879a9becdSAlexandre Courbot  *	implementation may not sleep
3979a9becdSAlexandre Courbot  * @dbg_show: optional routine to show contents in debugfs; default code
4079a9becdSAlexandre Courbot  *	will be used when this is omitted, but custom code can show extra
4179a9becdSAlexandre Courbot  *	state (such as pullup/pulldown configuration).
4279a9becdSAlexandre Courbot  * @base: identifies the first GPIO number handled by this chip; or, if
4379a9becdSAlexandre Courbot  *	negative during registration, requests dynamic ID allocation.
4479a9becdSAlexandre Courbot  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
4579a9becdSAlexandre Courbot  *	handled is (base + ngpio - 1).
4679a9becdSAlexandre Courbot  * @desc: array of ngpio descriptors. Private.
4779a9becdSAlexandre Courbot  * @names: if set, must be an array of strings to use as alternative
4879a9becdSAlexandre Courbot  *      names for the GPIOs in this chip. Any entry in the array
4979a9becdSAlexandre Courbot  *      may be NULL if there is no alias for the GPIO, however the
5079a9becdSAlexandre Courbot  *      array must be @ngpio entries long.  A name can include a single printk
5179a9becdSAlexandre Courbot  *      format specifier for an unsigned int.  It is substituted by the actual
5279a9becdSAlexandre Courbot  *      number of the gpio.
539fb1f39eSLinus Walleij  * @can_sleep: flag must be set iff get()/set() methods sleep, as they
541c8732bbSLinus Walleij  *	must while accessing GPIO expander chips over I2C or SPI. This
551c8732bbSLinus Walleij  *	implies that if the chip supports IRQs, these IRQs need to be threaded
561c8732bbSLinus Walleij  *	as the chip access may sleep when e.g. reading out the IRQ status
571c8732bbSLinus Walleij  *	registers.
589fb1f39eSLinus Walleij  * @exported: flags if the gpiochip is exported for use from sysfs. Private.
5979a9becdSAlexandre Courbot  *
6079a9becdSAlexandre Courbot  * A gpio_chip can help platforms abstract various sources of GPIOs so
6179a9becdSAlexandre Courbot  * they can all be accessed through a common programing interface.
6279a9becdSAlexandre Courbot  * Example sources would be SOC controllers, FPGAs, multifunction
6379a9becdSAlexandre Courbot  * chips, dedicated GPIO expanders, and so on.
6479a9becdSAlexandre Courbot  *
6579a9becdSAlexandre Courbot  * Each chip controls a number of signals, identified in method calls
6679a9becdSAlexandre Courbot  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
6779a9becdSAlexandre Courbot  * are referenced through calls like gpio_get_value(gpio), the offset
6879a9becdSAlexandre Courbot  * is calculated by subtracting @base from the gpio number.
6979a9becdSAlexandre Courbot  */
7079a9becdSAlexandre Courbot struct gpio_chip {
7179a9becdSAlexandre Courbot 	const char		*label;
7279a9becdSAlexandre Courbot 	struct device		*dev;
7379a9becdSAlexandre Courbot 	struct module		*owner;
7479a9becdSAlexandre Courbot 	struct list_head        list;
7579a9becdSAlexandre Courbot 
7679a9becdSAlexandre Courbot 	int			(*request)(struct gpio_chip *chip,
7779a9becdSAlexandre Courbot 						unsigned offset);
7879a9becdSAlexandre Courbot 	void			(*free)(struct gpio_chip *chip,
7979a9becdSAlexandre Courbot 						unsigned offset);
8079a9becdSAlexandre Courbot 	int			(*get_direction)(struct gpio_chip *chip,
8179a9becdSAlexandre Courbot 						unsigned offset);
8279a9becdSAlexandre Courbot 	int			(*direction_input)(struct gpio_chip *chip,
8379a9becdSAlexandre Courbot 						unsigned offset);
8479a9becdSAlexandre Courbot 	int			(*direction_output)(struct gpio_chip *chip,
8579a9becdSAlexandre Courbot 						unsigned offset, int value);
8679a9becdSAlexandre Courbot 	int			(*get)(struct gpio_chip *chip,
8779a9becdSAlexandre Courbot 						unsigned offset);
8879a9becdSAlexandre Courbot 	void			(*set)(struct gpio_chip *chip,
8979a9becdSAlexandre Courbot 						unsigned offset, int value);
9079a9becdSAlexandre Courbot 	int			(*set_debounce)(struct gpio_chip *chip,
9179a9becdSAlexandre Courbot 						unsigned offset,
9279a9becdSAlexandre Courbot 						unsigned debounce);
9379a9becdSAlexandre Courbot 
9479a9becdSAlexandre Courbot 	int			(*to_irq)(struct gpio_chip *chip,
9579a9becdSAlexandre Courbot 						unsigned offset);
9679a9becdSAlexandre Courbot 
9779a9becdSAlexandre Courbot 	void			(*dbg_show)(struct seq_file *s,
9879a9becdSAlexandre Courbot 						struct gpio_chip *chip);
9979a9becdSAlexandre Courbot 	int			base;
10079a9becdSAlexandre Courbot 	u16			ngpio;
10179a9becdSAlexandre Courbot 	struct gpio_desc	*desc;
10279a9becdSAlexandre Courbot 	const char		*const *names;
1039fb1f39eSLinus Walleij 	bool			can_sleep;
1049fb1f39eSLinus Walleij 	bool			exported;
10579a9becdSAlexandre Courbot 
10614250520SLinus Walleij #ifdef CONFIG_GPIOLIB_IRQCHIP
10714250520SLinus Walleij 	/*
10814250520SLinus Walleij 	 * With CONFIG_GPIO_IRQCHIP we get an irqchip inside the gpiolib
10914250520SLinus Walleij 	 * to handle IRQs for most practical cases.
11014250520SLinus Walleij 	 */
11114250520SLinus Walleij 	struct irq_chip		*irqchip;
11214250520SLinus Walleij 	struct irq_domain	*irqdomain;
113c3626fdeSLinus Walleij 	unsigned int		irq_base;
11414250520SLinus Walleij 	irq_flow_handler_t	irq_handler;
11514250520SLinus Walleij 	unsigned int		irq_default_type;
11614250520SLinus Walleij #endif
11714250520SLinus Walleij 
11879a9becdSAlexandre Courbot #if defined(CONFIG_OF_GPIO)
11979a9becdSAlexandre Courbot 	/*
12079a9becdSAlexandre Courbot 	 * If CONFIG_OF is enabled, then all GPIO controllers described in the
12179a9becdSAlexandre Courbot 	 * device tree automatically may have an OF translation
12279a9becdSAlexandre Courbot 	 */
12379a9becdSAlexandre Courbot 	struct device_node *of_node;
12479a9becdSAlexandre Courbot 	int of_gpio_n_cells;
12579a9becdSAlexandre Courbot 	int (*of_xlate)(struct gpio_chip *gc,
12679a9becdSAlexandre Courbot 			const struct of_phandle_args *gpiospec, u32 *flags);
12779a9becdSAlexandre Courbot #endif
12879a9becdSAlexandre Courbot #ifdef CONFIG_PINCTRL
12979a9becdSAlexandre Courbot 	/*
13079a9becdSAlexandre Courbot 	 * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
13179a9becdSAlexandre Courbot 	 * describe the actual pin range which they serve in an SoC. This
13279a9becdSAlexandre Courbot 	 * information would be used by pinctrl subsystem to configure
13379a9becdSAlexandre Courbot 	 * corresponding pins for gpio usage.
13479a9becdSAlexandre Courbot 	 */
13579a9becdSAlexandre Courbot 	struct list_head pin_ranges;
13679a9becdSAlexandre Courbot #endif
13779a9becdSAlexandre Courbot };
13879a9becdSAlexandre Courbot 
13979a9becdSAlexandre Courbot extern const char *gpiochip_is_requested(struct gpio_chip *chip,
14079a9becdSAlexandre Courbot 			unsigned offset);
14179a9becdSAlexandre Courbot 
14279a9becdSAlexandre Courbot /* add/remove chips */
14379a9becdSAlexandre Courbot extern int gpiochip_add(struct gpio_chip *chip);
14414c8a620SLinus Walleij extern int gpiochip_remove(struct gpio_chip *chip);
14579a9becdSAlexandre Courbot extern struct gpio_chip *gpiochip_find(void *data,
14679a9becdSAlexandre Courbot 			      int (*match)(struct gpio_chip *chip, void *data));
14779a9becdSAlexandre Courbot 
14879a9becdSAlexandre Courbot /* lock/unlock as IRQ */
149d74be6dfSAlexandre Courbot int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
150d74be6dfSAlexandre Courbot void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
15179a9becdSAlexandre Courbot 
152bb1e88ccSAlexandre Courbot struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
153bb1e88ccSAlexandre Courbot 
15414250520SLinus Walleij #ifdef CONFIG_GPIOLIB_IRQCHIP
15514250520SLinus Walleij 
15614250520SLinus Walleij void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
15714250520SLinus Walleij 		struct irq_chip *irqchip,
15814250520SLinus Walleij 		int parent_irq,
15914250520SLinus Walleij 		irq_flow_handler_t parent_handler);
16014250520SLinus Walleij 
16114250520SLinus Walleij int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
16214250520SLinus Walleij 		struct irq_chip *irqchip,
16314250520SLinus Walleij 		unsigned int first_irq,
16414250520SLinus Walleij 		irq_flow_handler_t handler,
16514250520SLinus Walleij 		unsigned int type);
16614250520SLinus Walleij 
16714250520SLinus Walleij #endif /* CONFIG_GPIO_IRQCHIP */
16814250520SLinus Walleij 
169abdc08a3SAlexandre Courbot struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
170abdc08a3SAlexandre Courbot 					    const char *label);
171f7d4ad98SGuenter Roeck void gpiochip_free_own_desc(struct gpio_desc *desc);
172f7d4ad98SGuenter Roeck 
173bb1e88ccSAlexandre Courbot #else /* CONFIG_GPIOLIB */
174bb1e88ccSAlexandre Courbot 
175bb1e88ccSAlexandre Courbot static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
176bb1e88ccSAlexandre Courbot {
177bb1e88ccSAlexandre Courbot 	/* GPIO can never have been requested */
178bb1e88ccSAlexandre Courbot 	WARN_ON(1);
179bb1e88ccSAlexandre Courbot 	return ERR_PTR(-ENODEV);
180bb1e88ccSAlexandre Courbot }
181bb1e88ccSAlexandre Courbot 
182bb1e88ccSAlexandre Courbot #endif /* CONFIG_GPIOLIB */
183bb1e88ccSAlexandre Courbot 
18479a9becdSAlexandre Courbot #endif
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