12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 20814a979SAnatolij Gustschin /* 30814a979SAnatolij Gustschin * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. 40814a979SAnatolij Gustschin * 50814a979SAnatolij Gustschin * Freescale DIU Frame Buffer device driver 60814a979SAnatolij Gustschin * 70814a979SAnatolij Gustschin * Authors: Hongjun Chen <hong-jun.chen@freescale.com> 80814a979SAnatolij Gustschin * Paul Widmer <paul.widmer@freescale.com> 90814a979SAnatolij Gustschin * Srikanth Srinivasan <srikanth.srinivasan@freescale.com> 100814a979SAnatolij Gustschin * York Sun <yorksun@freescale.com> 110814a979SAnatolij Gustschin * 120814a979SAnatolij Gustschin * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix 130814a979SAnatolij Gustschin */ 140814a979SAnatolij Gustschin 150814a979SAnatolij Gustschin #ifndef __FSL_DIU_FB_H__ 160814a979SAnatolij Gustschin #define __FSL_DIU_FB_H__ 170814a979SAnatolij Gustschin 180814a979SAnatolij Gustschin #include <linux/types.h> 190814a979SAnatolij Gustschin 200814a979SAnatolij Gustschin struct mfb_chroma_key { 210814a979SAnatolij Gustschin int enable; 220814a979SAnatolij Gustschin __u8 red_max; 230814a979SAnatolij Gustschin __u8 green_max; 240814a979SAnatolij Gustschin __u8 blue_max; 250814a979SAnatolij Gustschin __u8 red_min; 260814a979SAnatolij Gustschin __u8 green_min; 270814a979SAnatolij Gustschin __u8 blue_min; 280814a979SAnatolij Gustschin }; 290814a979SAnatolij Gustschin 300814a979SAnatolij Gustschin struct aoi_display_offset { 3136b0b1d4STimur Tabi __s32 x_aoi_d; 3236b0b1d4STimur Tabi __s32 y_aoi_d; 330814a979SAnatolij Gustschin }; 340814a979SAnatolij Gustschin 350814a979SAnatolij Gustschin #define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key) 360814a979SAnatolij Gustschin #define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8) 3736b0b1d4STimur Tabi #define MFB_SET_ALPHA _IOW('M', 0, __u8) 3836b0b1d4STimur Tabi #define MFB_GET_ALPHA _IOR('M', 0, __u8) 3936b0b1d4STimur Tabi #define MFB_SET_AOID _IOW('M', 4, struct aoi_display_offset) 4036b0b1d4STimur Tabi #define MFB_GET_AOID _IOR('M', 4, struct aoi_display_offset) 4136b0b1d4STimur Tabi #define MFB_SET_PIXFMT _IOW('M', 8, __u32) 4236b0b1d4STimur Tabi #define MFB_GET_PIXFMT _IOR('M', 8, __u32) 430814a979SAnatolij Gustschin 4436b0b1d4STimur Tabi /* 45e95c17e9STimur Tabi * The MPC5121 BSP comes with a gamma_set utility that initializes the 46e95c17e9STimur Tabi * gamma table. Unfortunately, it uses bad values for the IOCTL commands, 47e95c17e9STimur Tabi * but there's nothing we can do about it now. These ioctls are only 48e95c17e9STimur Tabi * supported on the MPC5121. 49e95c17e9STimur Tabi */ 50e95c17e9STimur Tabi #define MFB_SET_GAMMA _IOW('M', 1, __u8) 51e95c17e9STimur Tabi #define MFB_GET_GAMMA _IOR('M', 1, __u8) 52e95c17e9STimur Tabi 53e95c17e9STimur Tabi /* 5436b0b1d4STimur Tabi * The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the 5536b0b1d4STimur Tabi * wrong value for 'size' field of the ioctl. The current macros above use the 5636b0b1d4STimur Tabi * right size, but we still need to provide backwards compatibility, at least 5736b0b1d4STimur Tabi * for a while. 5836b0b1d4STimur Tabi */ 5936b0b1d4STimur Tabi #define MFB_SET_PIXFMT_OLD 0x80014d08 6036b0b1d4STimur Tabi #define MFB_GET_PIXFMT_OLD 0x40014d08 610814a979SAnatolij Gustschin 620814a979SAnatolij Gustschin #ifdef __KERNEL__ 630814a979SAnatolij Gustschin 640814a979SAnatolij Gustschin /* 650814a979SAnatolij Gustschin * These are the fields of area descriptor(in DDR memory) for every plane 660814a979SAnatolij Gustschin */ 670814a979SAnatolij Gustschin struct diu_ad { 680814a979SAnatolij Gustschin /* Word 0(32-bit) in DDR memory */ 690814a979SAnatolij Gustschin /* __u16 comp; */ 700814a979SAnatolij Gustschin /* __u16 pixel_s:2; */ 7142f82367SColin Ian King /* __u16 palette:1; */ 720814a979SAnatolij Gustschin /* __u16 red_c:2; */ 730814a979SAnatolij Gustschin /* __u16 green_c:2; */ 740814a979SAnatolij Gustschin /* __u16 blue_c:2; */ 750814a979SAnatolij Gustschin /* __u16 alpha_c:3; */ 760814a979SAnatolij Gustschin /* __u16 byte_f:1; */ 770814a979SAnatolij Gustschin /* __u16 res0:3; */ 780814a979SAnatolij Gustschin 790814a979SAnatolij Gustschin __be32 pix_fmt; /* hard coding pixel format */ 800814a979SAnatolij Gustschin 810814a979SAnatolij Gustschin /* Word 1(32-bit) in DDR memory */ 820814a979SAnatolij Gustschin __le32 addr; 830814a979SAnatolij Gustschin 840814a979SAnatolij Gustschin /* Word 2(32-bit) in DDR memory */ 850814a979SAnatolij Gustschin /* __u32 delta_xs:11; */ 860814a979SAnatolij Gustschin /* __u32 res1:1; */ 870814a979SAnatolij Gustschin /* __u32 delta_ys:11; */ 880814a979SAnatolij Gustschin /* __u32 res2:1; */ 890814a979SAnatolij Gustschin /* __u32 g_alpha:8; */ 900814a979SAnatolij Gustschin __le32 src_size_g_alpha; 910814a979SAnatolij Gustschin 920814a979SAnatolij Gustschin /* Word 3(32-bit) in DDR memory */ 930814a979SAnatolij Gustschin /* __u32 delta_xi:11; */ 940814a979SAnatolij Gustschin /* __u32 res3:5; */ 950814a979SAnatolij Gustschin /* __u32 delta_yi:11; */ 960814a979SAnatolij Gustschin /* __u32 res4:3; */ 970814a979SAnatolij Gustschin /* __u32 flip:2; */ 980814a979SAnatolij Gustschin __le32 aoi_size; 990814a979SAnatolij Gustschin 1000814a979SAnatolij Gustschin /* Word 4(32-bit) in DDR memory */ 1010814a979SAnatolij Gustschin /*__u32 offset_xi:11; 1020814a979SAnatolij Gustschin __u32 res5:5; 1030814a979SAnatolij Gustschin __u32 offset_yi:11; 1040814a979SAnatolij Gustschin __u32 res6:5; 1050814a979SAnatolij Gustschin */ 1060814a979SAnatolij Gustschin __le32 offset_xyi; 1070814a979SAnatolij Gustschin 1080814a979SAnatolij Gustschin /* Word 5(32-bit) in DDR memory */ 1090814a979SAnatolij Gustschin /*__u32 offset_xd:11; 1100814a979SAnatolij Gustschin __u32 res7:5; 1110814a979SAnatolij Gustschin __u32 offset_yd:11; 1120814a979SAnatolij Gustschin __u32 res8:5; */ 1130814a979SAnatolij Gustschin __le32 offset_xyd; 1140814a979SAnatolij Gustschin 1150814a979SAnatolij Gustschin 1160814a979SAnatolij Gustschin /* Word 6(32-bit) in DDR memory */ 1170814a979SAnatolij Gustschin __u8 ckmax_r; 1180814a979SAnatolij Gustschin __u8 ckmax_g; 1190814a979SAnatolij Gustschin __u8 ckmax_b; 1200814a979SAnatolij Gustschin __u8 res9; 1210814a979SAnatolij Gustschin 1220814a979SAnatolij Gustschin /* Word 7(32-bit) in DDR memory */ 1230814a979SAnatolij Gustschin __u8 ckmin_r; 1240814a979SAnatolij Gustschin __u8 ckmin_g; 1250814a979SAnatolij Gustschin __u8 ckmin_b; 1260814a979SAnatolij Gustschin __u8 res10; 1270814a979SAnatolij Gustschin /* __u32 res10:8; */ 1280814a979SAnatolij Gustschin 1290814a979SAnatolij Gustschin /* Word 8(32-bit) in DDR memory */ 1300814a979SAnatolij Gustschin __le32 next_ad; 1310814a979SAnatolij Gustschin 1320814a979SAnatolij Gustschin /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ 1330814a979SAnatolij Gustschin __u32 paddr; 1340814a979SAnatolij Gustschin } __attribute__ ((packed)); 1350814a979SAnatolij Gustschin 1360814a979SAnatolij Gustschin /* DIU register map */ 1370814a979SAnatolij Gustschin struct diu { 1380814a979SAnatolij Gustschin __be32 desc[3]; 1390814a979SAnatolij Gustschin __be32 gamma; 14042f82367SColin Ian King __be32 palette; 1410814a979SAnatolij Gustschin __be32 cursor; 1420814a979SAnatolij Gustschin __be32 curs_pos; 1430814a979SAnatolij Gustschin __be32 diu_mode; 1440814a979SAnatolij Gustschin __be32 bgnd; 1450814a979SAnatolij Gustschin __be32 bgnd_wb; 1460814a979SAnatolij Gustschin __be32 disp_size; 1470814a979SAnatolij Gustschin __be32 wb_size; 1480814a979SAnatolij Gustschin __be32 wb_mem_addr; 1490814a979SAnatolij Gustschin __be32 hsyn_para; 1500814a979SAnatolij Gustschin __be32 vsyn_para; 1510814a979SAnatolij Gustschin __be32 syn_pol; 1520814a979SAnatolij Gustschin __be32 thresholds; 1530814a979SAnatolij Gustschin __be32 int_status; 1540814a979SAnatolij Gustschin __be32 int_mask; 1550814a979SAnatolij Gustschin __be32 colorbar[8]; 1560814a979SAnatolij Gustschin __be32 filling; 1570814a979SAnatolij Gustschin __be32 plut; 1580814a979SAnatolij Gustschin } __attribute__ ((packed)); 1590814a979SAnatolij Gustschin 160c4e5a023STimur Tabi /* 161c4e5a023STimur Tabi * Modes of operation of DIU. The DIU supports five different modes, but 162c4e5a023STimur Tabi * the driver only supports modes 0 and 1. 163c4e5a023STimur Tabi */ 1640814a979SAnatolij Gustschin #define MFB_MODE0 0 /* DIU off */ 1650814a979SAnatolij Gustschin #define MFB_MODE1 1 /* All three planes output to display */ 1660814a979SAnatolij Gustschin 1670814a979SAnatolij Gustschin #endif /* __KERNEL__ */ 1680814a979SAnatolij Gustschin #endif /* __FSL_DIU_FB_H__ */ 169