1 /* 2 * FPGA Framework 3 * 4 * Copyright (C) 2013-2016 Altera Corporation 5 * Copyright (C) 2017 Intel Corporation 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, 9 * version 2, as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 #ifndef _LINUX_FPGA_MGR_H 20 #define _LINUX_FPGA_MGR_H 21 22 #include <linux/mutex.h> 23 #include <linux/platform_device.h> 24 25 struct fpga_manager; 26 struct sg_table; 27 28 /** 29 * enum fpga_mgr_states - fpga framework states 30 * @FPGA_MGR_STATE_UNKNOWN: can't determine state 31 * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off 32 * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up 33 * @FPGA_MGR_STATE_RESET: FPGA in reset state 34 * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress 35 * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed 36 * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming 37 * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage 38 * @FPGA_MGR_STATE_WRITE: writing image to FPGA 39 * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA 40 * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps 41 * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE 42 * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating 43 */ 44 enum fpga_mgr_states { 45 /* default FPGA states */ 46 FPGA_MGR_STATE_UNKNOWN, 47 FPGA_MGR_STATE_POWER_OFF, 48 FPGA_MGR_STATE_POWER_UP, 49 FPGA_MGR_STATE_RESET, 50 51 /* getting an image for loading */ 52 FPGA_MGR_STATE_FIRMWARE_REQ, 53 FPGA_MGR_STATE_FIRMWARE_REQ_ERR, 54 55 /* write sequence: init, write, complete */ 56 FPGA_MGR_STATE_WRITE_INIT, 57 FPGA_MGR_STATE_WRITE_INIT_ERR, 58 FPGA_MGR_STATE_WRITE, 59 FPGA_MGR_STATE_WRITE_ERR, 60 FPGA_MGR_STATE_WRITE_COMPLETE, 61 FPGA_MGR_STATE_WRITE_COMPLETE_ERR, 62 63 /* fpga is programmed and operating */ 64 FPGA_MGR_STATE_OPERATING, 65 }; 66 67 /* 68 * FPGA Manager flags 69 * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported 70 * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting 71 * FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first 72 * FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed 73 */ 74 #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) 75 #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) 76 #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) 77 #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3) 78 #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4) 79 80 /** 81 * struct fpga_image_info - information specific to a FPGA image 82 * @flags: boolean flags as defined above 83 * @enable_timeout_us: maximum time to enable traffic through bridge (uSec) 84 * @disable_timeout_us: maximum time to disable traffic through bridge (uSec) 85 * @config_complete_timeout_us: maximum time for FPGA to switch to operating 86 * status in the write_complete op. 87 * @firmware_name: name of FPGA image firmware file 88 * @sgt: scatter/gather table containing FPGA image 89 * @buf: contiguous buffer containing FPGA image 90 * @count: size of buf 91 * @dev: device that owns this 92 */ 93 struct fpga_image_info { 94 u32 flags; 95 u32 enable_timeout_us; 96 u32 disable_timeout_us; 97 u32 config_complete_timeout_us; 98 char *firmware_name; 99 struct sg_table *sgt; 100 const char *buf; 101 size_t count; 102 struct device *dev; 103 }; 104 105 /** 106 * struct fpga_manager_ops - ops for low level fpga manager drivers 107 * @initial_header_size: Maximum number of bytes that should be passed into write_init 108 * @state: returns an enum value of the FPGA's state 109 * @write_init: prepare the FPGA to receive confuration data 110 * @write: write count bytes of configuration data to the FPGA 111 * @write_sg: write the scatter list of configuration data to the FPGA 112 * @write_complete: set FPGA to operating state after writing is done 113 * @fpga_remove: optional: Set FPGA into a specific state during driver remove 114 * 115 * fpga_manager_ops are the low level functions implemented by a specific 116 * fpga manager driver. The optional ones are tested for NULL before being 117 * called, so leaving them out is fine. 118 */ 119 struct fpga_manager_ops { 120 size_t initial_header_size; 121 enum fpga_mgr_states (*state)(struct fpga_manager *mgr); 122 int (*write_init)(struct fpga_manager *mgr, 123 struct fpga_image_info *info, 124 const char *buf, size_t count); 125 int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); 126 int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt); 127 int (*write_complete)(struct fpga_manager *mgr, 128 struct fpga_image_info *info); 129 void (*fpga_remove)(struct fpga_manager *mgr); 130 }; 131 132 /** 133 * struct fpga_manager - fpga manager structure 134 * @name: name of low level fpga manager 135 * @dev: fpga manager device 136 * @ref_mutex: only allows one reference to fpga manager 137 * @state: state of fpga manager 138 * @mops: pointer to struct of fpga manager ops 139 * @priv: low level driver private date 140 */ 141 struct fpga_manager { 142 const char *name; 143 struct device dev; 144 struct mutex ref_mutex; 145 enum fpga_mgr_states state; 146 const struct fpga_manager_ops *mops; 147 void *priv; 148 }; 149 150 #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev) 151 152 struct fpga_image_info *fpga_image_info_alloc(struct device *dev); 153 154 void fpga_image_info_free(struct fpga_image_info *info); 155 156 int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info); 157 158 int fpga_mgr_lock(struct fpga_manager *mgr); 159 void fpga_mgr_unlock(struct fpga_manager *mgr); 160 161 struct fpga_manager *of_fpga_mgr_get(struct device_node *node); 162 163 struct fpga_manager *fpga_mgr_get(struct device *dev); 164 165 void fpga_mgr_put(struct fpga_manager *mgr); 166 167 int fpga_mgr_register(struct device *dev, const char *name, 168 const struct fpga_manager_ops *mops, void *priv); 169 170 void fpga_mgr_unregister(struct device *dev); 171 172 #endif /*_LINUX_FPGA_MGR_H */ 173