1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. 4 */ 5 6 #ifndef __LINUX_DMA_IMX_H 7 #define __LINUX_DMA_IMX_H 8 9 #include <linux/scatterlist.h> 10 #include <linux/device.h> 11 #include <linux/dmaengine.h> 12 13 /* 14 * This enumerates peripheral types. Used for SDMA. 15 */ 16 enum sdma_peripheral_type { 17 IMX_DMATYPE_SSI, /* MCU domain SSI */ 18 IMX_DMATYPE_SSI_SP, /* Shared SSI */ 19 IMX_DMATYPE_MMC, /* MMC */ 20 IMX_DMATYPE_SDHC, /* SDHC */ 21 IMX_DMATYPE_UART, /* MCU domain UART */ 22 IMX_DMATYPE_UART_SP, /* Shared UART */ 23 IMX_DMATYPE_FIRI, /* FIRI */ 24 IMX_DMATYPE_CSPI, /* MCU domain CSPI */ 25 IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ 26 IMX_DMATYPE_SIM, /* SIM */ 27 IMX_DMATYPE_ATA, /* ATA */ 28 IMX_DMATYPE_CCM, /* CCM */ 29 IMX_DMATYPE_EXT, /* External peripheral */ 30 IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ 31 IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ 32 IMX_DMATYPE_DSP, /* DSP */ 33 IMX_DMATYPE_MEMORY, /* Memory */ 34 IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ 35 IMX_DMATYPE_SPDIF, /* SPDIF */ 36 IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ 37 IMX_DMATYPE_ASRC, /* ASRC */ 38 IMX_DMATYPE_ESAI, /* ESAI */ 39 IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */ 40 IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ 41 IMX_DMATYPE_SAI, /* SAI */ 42 IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */ 43 }; 44 45 enum imx_dma_prio { 46 DMA_PRIO_HIGH = 0, 47 DMA_PRIO_MEDIUM = 1, 48 DMA_PRIO_LOW = 2 49 }; 50 51 struct imx_dma_data { 52 int dma_request; /* DMA request line */ 53 int dma_request2; /* secondary DMA request line */ 54 enum sdma_peripheral_type peripheral_type; 55 int priority; 56 }; 57 58 static inline int imx_dma_is_ipu(struct dma_chan *chan) 59 { 60 return !strcmp(dev_name(chan->device->dev), "ipu-core"); 61 } 62 63 static inline int imx_dma_is_general_purpose(struct dma_chan *chan) 64 { 65 return !strcmp(chan->device->dev->driver->name, "imx-sdma") || 66 !strcmp(chan->device->dev->driver->name, "imx-dma"); 67 } 68 69 /** 70 * struct sdma_peripheral_config - SDMA config for audio 71 * @n_fifos_src: Number of FIFOs for recording 72 * @n_fifos_dst: Number of FIFOs for playback 73 * @stride_fifos_src: FIFO address stride for recording, 0 means all FIFOs are 74 * continuous, 1 means 1 word stride between FIFOs. All stride 75 * between FIFOs should be same. 76 * @stride_fifos_dst: FIFO address stride for playback 77 * @words_per_fifo: numbers of words per FIFO fetch/fill, 1 means 78 * one channel per FIFO, 2 means 2 channels per FIFO.. 79 * If 'n_fifos_src = 4' and 'words_per_fifo = 2', it 80 * means the first two words(channels) fetch from FIFO0 81 * and then jump to FIFO1 for next two words, and so on 82 * after the last FIFO3 fetched, roll back to FIFO0. 83 * @sw_done: Use software done. Needed for PDM (micfil) 84 * 85 * Some i.MX Audio devices (SAI, micfil) have multiple successive FIFO 86 * registers. For multichannel recording/playback the SAI/micfil have 87 * one FIFO register per channel and the SDMA engine has to read/write 88 * the next channel from/to the next register and wrap around to the 89 * first register when all channels are handled. The number of active 90 * channels must be communicated to the SDMA engine using this struct. 91 */ 92 struct sdma_peripheral_config { 93 int n_fifos_src; 94 int n_fifos_dst; 95 int stride_fifos_src; 96 int stride_fifos_dst; 97 int words_per_fifo; 98 bool sw_done; 99 }; 100 101 #endif /* __LINUX_DMA_IMX_H */ 102