1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_DMA_MAPPING_H 3 #define _LINUX_DMA_MAPPING_H 4 5 #include <linux/sizes.h> 6 #include <linux/string.h> 7 #include <linux/device.h> 8 #include <linux/err.h> 9 #include <linux/dma-direction.h> 10 #include <linux/scatterlist.h> 11 #include <linux/bug.h> 12 #include <linux/mem_encrypt.h> 13 14 /** 15 * List of possible attributes associated with a DMA mapping. The semantics 16 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst. 17 */ 18 19 /* 20 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping 21 * may be weakly ordered, that is that reads and writes may pass each other. 22 */ 23 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) 24 /* 25 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be 26 * buffered to improve performance. 27 */ 28 #define DMA_ATTR_WRITE_COMBINE (1UL << 2) 29 /* 30 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel 31 * virtual mapping for the allocated buffer. 32 */ 33 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) 34 /* 35 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of 36 * the CPU cache for the given buffer assuming that it has been already 37 * transferred to 'device' domain. 38 */ 39 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) 40 /* 41 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer 42 * in physical memory. 43 */ 44 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) 45 /* 46 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem 47 * that it's probably not worth the time to try to allocate memory to in a way 48 * that gives better TLB efficiency. 49 */ 50 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) 51 /* 52 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress 53 * allocation failure reports (similarly to __GFP_NOWARN). 54 */ 55 #define DMA_ATTR_NO_WARN (1UL << 8) 56 57 /* 58 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully 59 * accessible at an elevated privilege level (and ideally inaccessible or 60 * at least read-only at lesser-privileged levels). 61 */ 62 #define DMA_ATTR_PRIVILEGED (1UL << 9) 63 64 /* 65 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can 66 * be given to a device to use as a DMA source or target. It is specific to a 67 * given device and there may be a translation between the CPU physical address 68 * space and the bus address space. 69 * 70 * DMA_MAPPING_ERROR is the magic error code if a mapping failed. It should not 71 * be used directly in drivers, but checked for using dma_mapping_error() 72 * instead. 73 */ 74 #define DMA_MAPPING_ERROR (~(dma_addr_t)0) 75 76 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 77 78 #ifdef CONFIG_DMA_API_DEBUG 79 void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr); 80 void debug_dma_map_single(struct device *dev, const void *addr, 81 unsigned long len); 82 #else 83 static inline void debug_dma_mapping_error(struct device *dev, 84 dma_addr_t dma_addr) 85 { 86 } 87 static inline void debug_dma_map_single(struct device *dev, const void *addr, 88 unsigned long len) 89 { 90 } 91 #endif /* CONFIG_DMA_API_DEBUG */ 92 93 #ifdef CONFIG_HAS_DMA 94 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 95 { 96 debug_dma_mapping_error(dev, dma_addr); 97 98 if (dma_addr == DMA_MAPPING_ERROR) 99 return -ENOMEM; 100 return 0; 101 } 102 103 dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, 104 size_t offset, size_t size, enum dma_data_direction dir, 105 unsigned long attrs); 106 void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, 107 enum dma_data_direction dir, unsigned long attrs); 108 int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, 109 enum dma_data_direction dir, unsigned long attrs); 110 void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, 111 int nents, enum dma_data_direction dir, 112 unsigned long attrs); 113 dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, 114 size_t size, enum dma_data_direction dir, unsigned long attrs); 115 void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, 116 enum dma_data_direction dir, unsigned long attrs); 117 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, 118 enum dma_data_direction dir); 119 void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, 120 size_t size, enum dma_data_direction dir); 121 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 122 int nelems, enum dma_data_direction dir); 123 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 124 int nelems, enum dma_data_direction dir); 125 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 126 gfp_t flag, unsigned long attrs); 127 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 128 dma_addr_t dma_handle, unsigned long attrs); 129 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 130 gfp_t gfp, unsigned long attrs); 131 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 132 dma_addr_t dma_handle); 133 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 134 void *cpu_addr, dma_addr_t dma_addr, size_t size, 135 unsigned long attrs); 136 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 137 void *cpu_addr, dma_addr_t dma_addr, size_t size, 138 unsigned long attrs); 139 bool dma_can_mmap(struct device *dev); 140 int dma_supported(struct device *dev, u64 mask); 141 int dma_set_mask(struct device *dev, u64 mask); 142 int dma_set_coherent_mask(struct device *dev, u64 mask); 143 u64 dma_get_required_mask(struct device *dev); 144 size_t dma_max_mapping_size(struct device *dev); 145 bool dma_need_sync(struct device *dev, dma_addr_t dma_addr); 146 unsigned long dma_get_merge_boundary(struct device *dev); 147 #else /* CONFIG_HAS_DMA */ 148 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 149 struct page *page, size_t offset, size_t size, 150 enum dma_data_direction dir, unsigned long attrs) 151 { 152 return DMA_MAPPING_ERROR; 153 } 154 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 155 size_t size, enum dma_data_direction dir, unsigned long attrs) 156 { 157 } 158 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 159 int nents, enum dma_data_direction dir, unsigned long attrs) 160 { 161 return 0; 162 } 163 static inline void dma_unmap_sg_attrs(struct device *dev, 164 struct scatterlist *sg, int nents, enum dma_data_direction dir, 165 unsigned long attrs) 166 { 167 } 168 static inline dma_addr_t dma_map_resource(struct device *dev, 169 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, 170 unsigned long attrs) 171 { 172 return DMA_MAPPING_ERROR; 173 } 174 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 175 size_t size, enum dma_data_direction dir, unsigned long attrs) 176 { 177 } 178 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 179 size_t size, enum dma_data_direction dir) 180 { 181 } 182 static inline void dma_sync_single_for_device(struct device *dev, 183 dma_addr_t addr, size_t size, enum dma_data_direction dir) 184 { 185 } 186 static inline void dma_sync_sg_for_cpu(struct device *dev, 187 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 188 { 189 } 190 static inline void dma_sync_sg_for_device(struct device *dev, 191 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 192 { 193 } 194 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 195 { 196 return -ENOMEM; 197 } 198 static inline void *dma_alloc_attrs(struct device *dev, size_t size, 199 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) 200 { 201 return NULL; 202 } 203 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 204 dma_addr_t dma_handle, unsigned long attrs) 205 { 206 } 207 static inline void *dmam_alloc_attrs(struct device *dev, size_t size, 208 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 209 { 210 return NULL; 211 } 212 static inline void dmam_free_coherent(struct device *dev, size_t size, 213 void *vaddr, dma_addr_t dma_handle) 214 { 215 } 216 static inline int dma_get_sgtable_attrs(struct device *dev, 217 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, 218 size_t size, unsigned long attrs) 219 { 220 return -ENXIO; 221 } 222 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 223 void *cpu_addr, dma_addr_t dma_addr, size_t size, 224 unsigned long attrs) 225 { 226 return -ENXIO; 227 } 228 static inline bool dma_can_mmap(struct device *dev) 229 { 230 return false; 231 } 232 static inline int dma_supported(struct device *dev, u64 mask) 233 { 234 return 0; 235 } 236 static inline int dma_set_mask(struct device *dev, u64 mask) 237 { 238 return -EIO; 239 } 240 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 241 { 242 return -EIO; 243 } 244 static inline u64 dma_get_required_mask(struct device *dev) 245 { 246 return 0; 247 } 248 static inline size_t dma_max_mapping_size(struct device *dev) 249 { 250 return 0; 251 } 252 static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr) 253 { 254 return false; 255 } 256 static inline unsigned long dma_get_merge_boundary(struct device *dev) 257 { 258 return 0; 259 } 260 #endif /* CONFIG_HAS_DMA */ 261 262 struct page *dma_alloc_pages(struct device *dev, size_t size, 263 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); 264 void dma_free_pages(struct device *dev, size_t size, struct page *page, 265 dma_addr_t dma_handle, enum dma_data_direction dir); 266 267 static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, 268 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp) 269 { 270 struct page *page = dma_alloc_pages(dev, size, dma_handle, dir, gfp); 271 return page ? page_address(page) : NULL; 272 } 273 274 static inline void dma_free_noncoherent(struct device *dev, size_t size, 275 void *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir) 276 { 277 dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir); 278 } 279 280 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, 281 size_t size, enum dma_data_direction dir, unsigned long attrs) 282 { 283 /* DMA must never operate on areas that might be remapped. */ 284 if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr), 285 "rejecting DMA map of vmalloc memory\n")) 286 return DMA_MAPPING_ERROR; 287 debug_dma_map_single(dev, ptr, size); 288 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), 289 size, dir, attrs); 290 } 291 292 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, 293 size_t size, enum dma_data_direction dir, unsigned long attrs) 294 { 295 return dma_unmap_page_attrs(dev, addr, size, dir, attrs); 296 } 297 298 static inline void dma_sync_single_range_for_cpu(struct device *dev, 299 dma_addr_t addr, unsigned long offset, size_t size, 300 enum dma_data_direction dir) 301 { 302 return dma_sync_single_for_cpu(dev, addr + offset, size, dir); 303 } 304 305 static inline void dma_sync_single_range_for_device(struct device *dev, 306 dma_addr_t addr, unsigned long offset, size_t size, 307 enum dma_data_direction dir) 308 { 309 return dma_sync_single_for_device(dev, addr + offset, size, dir); 310 } 311 312 /** 313 * dma_map_sgtable - Map the given buffer for DMA 314 * @dev: The device for which to perform the DMA operation 315 * @sgt: The sg_table object describing the buffer 316 * @dir: DMA direction 317 * @attrs: Optional DMA attributes for the map operation 318 * 319 * Maps a buffer described by a scatterlist stored in the given sg_table 320 * object for the @dir DMA operation by the @dev device. After success the 321 * ownership for the buffer is transferred to the DMA domain. One has to 322 * call dma_sync_sgtable_for_cpu() or dma_unmap_sgtable() to move the 323 * ownership of the buffer back to the CPU domain before touching the 324 * buffer by the CPU. 325 * 326 * Returns 0 on success or -EINVAL on error during mapping the buffer. 327 */ 328 static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt, 329 enum dma_data_direction dir, unsigned long attrs) 330 { 331 int nents; 332 333 nents = dma_map_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs); 334 if (nents <= 0) 335 return -EINVAL; 336 sgt->nents = nents; 337 return 0; 338 } 339 340 /** 341 * dma_unmap_sgtable - Unmap the given buffer for DMA 342 * @dev: The device for which to perform the DMA operation 343 * @sgt: The sg_table object describing the buffer 344 * @dir: DMA direction 345 * @attrs: Optional DMA attributes for the unmap operation 346 * 347 * Unmaps a buffer described by a scatterlist stored in the given sg_table 348 * object for the @dir DMA operation by the @dev device. After this function 349 * the ownership of the buffer is transferred back to the CPU domain. 350 */ 351 static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt, 352 enum dma_data_direction dir, unsigned long attrs) 353 { 354 dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs); 355 } 356 357 /** 358 * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access 359 * @dev: The device for which to perform the DMA operation 360 * @sgt: The sg_table object describing the buffer 361 * @dir: DMA direction 362 * 363 * Performs the needed cache synchronization and moves the ownership of the 364 * buffer back to the CPU domain, so it is safe to perform any access to it 365 * by the CPU. Before doing any further DMA operations, one has to transfer 366 * the ownership of the buffer back to the DMA domain by calling the 367 * dma_sync_sgtable_for_device(). 368 */ 369 static inline void dma_sync_sgtable_for_cpu(struct device *dev, 370 struct sg_table *sgt, enum dma_data_direction dir) 371 { 372 dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir); 373 } 374 375 /** 376 * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA 377 * @dev: The device for which to perform the DMA operation 378 * @sgt: The sg_table object describing the buffer 379 * @dir: DMA direction 380 * 381 * Performs the needed cache synchronization and moves the ownership of the 382 * buffer back to the DMA domain, so it is safe to perform the DMA operation. 383 * Once finished, one has to call dma_sync_sgtable_for_cpu() or 384 * dma_unmap_sgtable(). 385 */ 386 static inline void dma_sync_sgtable_for_device(struct device *dev, 387 struct sg_table *sgt, enum dma_data_direction dir) 388 { 389 dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir); 390 } 391 392 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) 393 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) 394 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) 395 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) 396 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 397 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 398 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 399 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 400 401 static inline void *dma_alloc_coherent(struct device *dev, size_t size, 402 dma_addr_t *dma_handle, gfp_t gfp) 403 { 404 405 return dma_alloc_attrs(dev, size, dma_handle, gfp, 406 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 407 } 408 409 static inline void dma_free_coherent(struct device *dev, size_t size, 410 void *cpu_addr, dma_addr_t dma_handle) 411 { 412 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); 413 } 414 415 416 static inline u64 dma_get_mask(struct device *dev) 417 { 418 if (dev->dma_mask && *dev->dma_mask) 419 return *dev->dma_mask; 420 return DMA_BIT_MASK(32); 421 } 422 423 /* 424 * Set both the DMA mask and the coherent DMA mask to the same thing. 425 * Note that we don't check the return value from dma_set_coherent_mask() 426 * as the DMA API guarantees that the coherent DMA mask can be set to 427 * the same or smaller than the streaming DMA mask. 428 */ 429 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 430 { 431 int rc = dma_set_mask(dev, mask); 432 if (rc == 0) 433 dma_set_coherent_mask(dev, mask); 434 return rc; 435 } 436 437 /* 438 * Similar to the above, except it deals with the case where the device 439 * does not have dev->dma_mask appropriately setup. 440 */ 441 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 442 { 443 dev->dma_mask = &dev->coherent_dma_mask; 444 return dma_set_mask_and_coherent(dev, mask); 445 } 446 447 /** 448 * dma_addressing_limited - return if the device is addressing limited 449 * @dev: device to check 450 * 451 * Return %true if the devices DMA mask is too small to address all memory in 452 * the system, else %false. Lack of addressing bits is the prime reason for 453 * bounce buffering, but might not be the only one. 454 */ 455 static inline bool dma_addressing_limited(struct device *dev) 456 { 457 return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < 458 dma_get_required_mask(dev); 459 } 460 461 static inline unsigned int dma_get_max_seg_size(struct device *dev) 462 { 463 if (dev->dma_parms && dev->dma_parms->max_segment_size) 464 return dev->dma_parms->max_segment_size; 465 return SZ_64K; 466 } 467 468 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) 469 { 470 if (dev->dma_parms) { 471 dev->dma_parms->max_segment_size = size; 472 return 0; 473 } 474 return -EIO; 475 } 476 477 static inline unsigned long dma_get_seg_boundary(struct device *dev) 478 { 479 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) 480 return dev->dma_parms->segment_boundary_mask; 481 return ULONG_MAX; 482 } 483 484 /** 485 * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units 486 * @dev: device to guery the boundary for 487 * @page_shift: ilog() of the IOMMU page size 488 * 489 * Return the segment boundary in IOMMU page units (which may be different from 490 * the CPU page size) for the passed in device. 491 * 492 * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for 493 * non-DMA API callers. 494 */ 495 static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev, 496 unsigned int page_shift) 497 { 498 if (!dev) 499 return (U32_MAX >> page_shift) + 1; 500 return (dma_get_seg_boundary(dev) >> page_shift) + 1; 501 } 502 503 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 504 { 505 if (dev->dma_parms) { 506 dev->dma_parms->segment_boundary_mask = mask; 507 return 0; 508 } 509 return -EIO; 510 } 511 512 static inline unsigned int dma_get_min_align_mask(struct device *dev) 513 { 514 if (dev->dma_parms) 515 return dev->dma_parms->min_align_mask; 516 return 0; 517 } 518 519 static inline int dma_set_min_align_mask(struct device *dev, 520 unsigned int min_align_mask) 521 { 522 if (WARN_ON_ONCE(!dev->dma_parms)) 523 return -EIO; 524 dev->dma_parms->min_align_mask = min_align_mask; 525 return 0; 526 } 527 528 static inline int dma_get_cache_alignment(void) 529 { 530 #ifdef ARCH_DMA_MINALIGN 531 return ARCH_DMA_MINALIGN; 532 #endif 533 return 1; 534 } 535 536 static inline void *dmam_alloc_coherent(struct device *dev, size_t size, 537 dma_addr_t *dma_handle, gfp_t gfp) 538 { 539 return dmam_alloc_attrs(dev, size, dma_handle, gfp, 540 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 541 } 542 543 static inline void *dma_alloc_wc(struct device *dev, size_t size, 544 dma_addr_t *dma_addr, gfp_t gfp) 545 { 546 unsigned long attrs = DMA_ATTR_WRITE_COMBINE; 547 548 if (gfp & __GFP_NOWARN) 549 attrs |= DMA_ATTR_NO_WARN; 550 551 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); 552 } 553 554 static inline void dma_free_wc(struct device *dev, size_t size, 555 void *cpu_addr, dma_addr_t dma_addr) 556 { 557 return dma_free_attrs(dev, size, cpu_addr, dma_addr, 558 DMA_ATTR_WRITE_COMBINE); 559 } 560 561 static inline int dma_mmap_wc(struct device *dev, 562 struct vm_area_struct *vma, 563 void *cpu_addr, dma_addr_t dma_addr, 564 size_t size) 565 { 566 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, 567 DMA_ATTR_WRITE_COMBINE); 568 } 569 570 #ifdef CONFIG_NEED_DMA_MAP_STATE 571 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 572 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 573 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 574 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 575 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 576 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 577 #else 578 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 579 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 580 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 581 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 582 #define dma_unmap_len(PTR, LEN_NAME) (0) 583 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 584 #endif 585 586 #endif /* _LINUX_DMA_MAPPING_H */ 587