1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef LINUX_BCMA_H_ 3 #define LINUX_BCMA_H_ 4 5 #include <linux/pci.h> 6 #include <linux/mod_devicetable.h> 7 8 #include <linux/bcma/bcma_driver_arm_c9.h> 9 #include <linux/bcma/bcma_driver_chipcommon.h> 10 #include <linux/bcma/bcma_driver_pci.h> 11 #include <linux/bcma/bcma_driver_pcie2.h> 12 #include <linux/bcma/bcma_driver_mips.h> 13 #include <linux/bcma/bcma_driver_gmac_cmn.h> 14 #include <linux/ssb/ssb.h> /* SPROM sharing */ 15 16 #include <linux/bcma/bcma_regs.h> 17 18 struct bcma_device; 19 struct bcma_bus; 20 21 enum bcma_hosttype { 22 BCMA_HOSTTYPE_PCI, 23 BCMA_HOSTTYPE_SDIO, 24 BCMA_HOSTTYPE_SOC, 25 }; 26 27 struct bcma_chipinfo { 28 u16 id; 29 u8 rev; 30 u8 pkg; 31 }; 32 33 struct bcma_boardinfo { 34 u16 vendor; 35 u16 type; 36 }; 37 38 enum bcma_clkmode { 39 BCMA_CLKMODE_FAST, 40 BCMA_CLKMODE_DYNAMIC, 41 }; 42 43 struct bcma_host_ops { 44 u8 (*read8)(struct bcma_device *core, u16 offset); 45 u16 (*read16)(struct bcma_device *core, u16 offset); 46 u32 (*read32)(struct bcma_device *core, u16 offset); 47 void (*write8)(struct bcma_device *core, u16 offset, u8 value); 48 void (*write16)(struct bcma_device *core, u16 offset, u16 value); 49 void (*write32)(struct bcma_device *core, u16 offset, u32 value); 50 #ifdef CONFIG_BCMA_BLOCKIO 51 void (*block_read)(struct bcma_device *core, void *buffer, 52 size_t count, u16 offset, u8 reg_width); 53 void (*block_write)(struct bcma_device *core, const void *buffer, 54 size_t count, u16 offset, u8 reg_width); 55 #endif 56 /* Agent ops */ 57 u32 (*aread32)(struct bcma_device *core, u16 offset); 58 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value); 59 }; 60 61 /* Core manufacturers */ 62 #define BCMA_MANUF_ARM 0x43B 63 #define BCMA_MANUF_MIPS 0x4A7 64 #define BCMA_MANUF_BCM 0x4BF 65 66 /* Core class values. */ 67 #define BCMA_CL_SIM 0x0 68 #define BCMA_CL_EROM 0x1 69 #define BCMA_CL_CORESIGHT 0x9 70 #define BCMA_CL_VERIF 0xB 71 #define BCMA_CL_OPTIMO 0xD 72 #define BCMA_CL_GEN 0xE 73 #define BCMA_CL_PRIMECELL 0xF 74 75 /* Core-ID values. */ 76 #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ 77 #define BCMA_CORE_4706_CHIPCOMMON 0x500 78 #define BCMA_CORE_NS_PCIEG2 0x501 79 #define BCMA_CORE_NS_DMA 0x502 80 #define BCMA_CORE_NS_SDIO3 0x503 81 #define BCMA_CORE_NS_USB20 0x504 82 #define BCMA_CORE_NS_USB30 0x505 83 #define BCMA_CORE_NS_A9JTAG 0x506 84 #define BCMA_CORE_NS_DDR23 0x507 85 #define BCMA_CORE_NS_ROM 0x508 86 #define BCMA_CORE_NS_NAND 0x509 87 #define BCMA_CORE_NS_QSPI 0x50A 88 #define BCMA_CORE_NS_CHIPCOMMON_B 0x50B 89 #define BCMA_CORE_4706_SOC_RAM 0x50E 90 #define BCMA_CORE_ARMCA9 0x510 91 #define BCMA_CORE_4706_MAC_GBIT 0x52D 92 #define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */ 93 #define BCMA_CORE_ALTA 0x534 /* I2S core */ 94 #define BCMA_CORE_4706_MAC_GBIT_COMMON 0x5DC 95 #define BCMA_CORE_DDR23_PHY 0x5DD 96 #define BCMA_CORE_INVALID 0x700 97 #define BCMA_CORE_CHIPCOMMON 0x800 98 #define BCMA_CORE_ILINE20 0x801 99 #define BCMA_CORE_SRAM 0x802 100 #define BCMA_CORE_SDRAM 0x803 101 #define BCMA_CORE_PCI 0x804 102 #define BCMA_CORE_MIPS 0x805 103 #define BCMA_CORE_ETHERNET 0x806 104 #define BCMA_CORE_V90 0x807 105 #define BCMA_CORE_USB11_HOSTDEV 0x808 106 #define BCMA_CORE_ADSL 0x809 107 #define BCMA_CORE_ILINE100 0x80A 108 #define BCMA_CORE_IPSEC 0x80B 109 #define BCMA_CORE_UTOPIA 0x80C 110 #define BCMA_CORE_PCMCIA 0x80D 111 #define BCMA_CORE_INTERNAL_MEM 0x80E 112 #define BCMA_CORE_MEMC_SDRAM 0x80F 113 #define BCMA_CORE_OFDM 0x810 114 #define BCMA_CORE_EXTIF 0x811 115 #define BCMA_CORE_80211 0x812 116 #define BCMA_CORE_PHY_A 0x813 117 #define BCMA_CORE_PHY_B 0x814 118 #define BCMA_CORE_PHY_G 0x815 119 #define BCMA_CORE_MIPS_3302 0x816 120 #define BCMA_CORE_USB11_HOST 0x817 121 #define BCMA_CORE_USB11_DEV 0x818 122 #define BCMA_CORE_USB20_HOST 0x819 123 #define BCMA_CORE_USB20_DEV 0x81A 124 #define BCMA_CORE_SDIO_HOST 0x81B 125 #define BCMA_CORE_ROBOSWITCH 0x81C 126 #define BCMA_CORE_PARA_ATA 0x81D 127 #define BCMA_CORE_SATA_XORDMA 0x81E 128 #define BCMA_CORE_ETHERNET_GBIT 0x81F 129 #define BCMA_CORE_PCIE 0x820 130 #define BCMA_CORE_PHY_N 0x821 131 #define BCMA_CORE_SRAM_CTL 0x822 132 #define BCMA_CORE_MINI_MACPHY 0x823 133 #define BCMA_CORE_ARM_1176 0x824 134 #define BCMA_CORE_ARM_7TDMI 0x825 135 #define BCMA_CORE_PHY_LP 0x826 136 #define BCMA_CORE_PMU 0x827 137 #define BCMA_CORE_PHY_SSN 0x828 138 #define BCMA_CORE_SDIO_DEV 0x829 139 #define BCMA_CORE_ARM_CM3 0x82A 140 #define BCMA_CORE_PHY_HT 0x82B 141 #define BCMA_CORE_MIPS_74K 0x82C 142 #define BCMA_CORE_MAC_GBIT 0x82D 143 #define BCMA_CORE_DDR12_MEM_CTL 0x82E 144 #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */ 145 #define BCMA_CORE_OCP_OCP_BRIDGE 0x830 146 #define BCMA_CORE_SHARED_COMMON 0x831 147 #define BCMA_CORE_OCP_AHB_BRIDGE 0x832 148 #define BCMA_CORE_SPI_HOST 0x833 149 #define BCMA_CORE_I2S 0x834 150 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ 151 #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ 152 #define BCMA_CORE_PHY_AC 0x83B 153 #define BCMA_CORE_PCIE2 0x83C /* PCI Express Gen2 */ 154 #define BCMA_CORE_USB30_DEV 0x83D 155 #define BCMA_CORE_ARM_CR4 0x83E 156 #define BCMA_CORE_GCI 0x840 157 #define BCMA_CORE_CMEM 0x846 /* CNDS DDR2/3 memory controller */ 158 #define BCMA_CORE_ARM_CA7 0x847 159 #define BCMA_CORE_SYS_MEM 0x849 160 #define BCMA_CORE_DEFAULT 0xFFF 161 162 #define BCMA_MAX_NR_CORES 16 163 #define BCMA_CORE_SIZE 0x1000 164 165 /* Chip IDs of PCIe devices */ 166 #define BCMA_CHIP_ID_BCM4313 0x4313 167 #define BCMA_CHIP_ID_BCM43142 43142 168 #define BCMA_CHIP_ID_BCM43131 43131 169 #define BCMA_CHIP_ID_BCM43217 43217 170 #define BCMA_CHIP_ID_BCM43222 43222 171 #define BCMA_CHIP_ID_BCM43224 43224 172 #define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8 173 #define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa 174 #define BCMA_CHIP_ID_BCM43225 43225 175 #define BCMA_CHIP_ID_BCM43227 43227 176 #define BCMA_CHIP_ID_BCM43228 43228 177 #define BCMA_CHIP_ID_BCM43421 43421 178 #define BCMA_CHIP_ID_BCM43428 43428 179 #define BCMA_CHIP_ID_BCM43431 43431 180 #define BCMA_CHIP_ID_BCM43460 43460 181 #define BCMA_CHIP_ID_BCM4331 0x4331 182 #define BCMA_CHIP_ID_BCM6362 0x6362 183 #define BCMA_CHIP_ID_BCM4360 0x4360 184 #define BCMA_CHIP_ID_BCM4352 0x4352 185 186 /* Chip IDs of SoCs */ 187 #define BCMA_CHIP_ID_BCM4706 0x5300 188 #define BCMA_PKG_ID_BCM4706L 1 189 #define BCMA_CHIP_ID_BCM4716 0x4716 190 #define BCMA_PKG_ID_BCM4716 8 191 #define BCMA_PKG_ID_BCM4717 9 192 #define BCMA_PKG_ID_BCM4718 10 193 #define BCMA_CHIP_ID_BCM47162 47162 194 #define BCMA_CHIP_ID_BCM4748 0x4748 195 #define BCMA_CHIP_ID_BCM4749 0x4749 196 #define BCMA_CHIP_ID_BCM5356 0x5356 197 #define BCMA_CHIP_ID_BCM5357 0x5357 198 #define BCMA_PKG_ID_BCM5358 9 199 #define BCMA_PKG_ID_BCM47186 10 200 #define BCMA_PKG_ID_BCM5357 11 201 #define BCMA_CHIP_ID_BCM53572 53572 202 #define BCMA_PKG_ID_BCM47188 9 203 #define BCMA_CHIP_ID_BCM4707 53010 204 #define BCMA_PKG_ID_BCM4707 1 205 #define BCMA_PKG_ID_BCM4708 2 206 #define BCMA_PKG_ID_BCM4709 0 207 #define BCMA_CHIP_ID_BCM47094 53030 208 #define BCMA_CHIP_ID_BCM53018 53018 209 #define BCMA_CHIP_ID_BCM53573 53573 210 #define BCMA_PKG_ID_BCM53573 0 211 #define BCMA_PKG_ID_BCM47189 1 212 213 /* Board types (on PCI usually equals to the subsystem dev id) */ 214 /* BCM4313 */ 215 #define BCMA_BOARD_TYPE_BCM94313BU 0X050F 216 #define BCMA_BOARD_TYPE_BCM94313HM 0X0510 217 #define BCMA_BOARD_TYPE_BCM94313EPA 0X0511 218 #define BCMA_BOARD_TYPE_BCM94313HMG 0X051C 219 /* BCM4716 */ 220 #define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD 221 /* BCM43224 */ 222 #define BCMA_BOARD_TYPE_BCM943224X21 0X056E 223 #define BCMA_BOARD_TYPE_BCM943224X21_FCC 0X00D1 224 #define BCMA_BOARD_TYPE_BCM943224X21B 0X00E9 225 #define BCMA_BOARD_TYPE_BCM943224M93 0X008B 226 #define BCMA_BOARD_TYPE_BCM943224M93A 0X0090 227 #define BCMA_BOARD_TYPE_BCM943224X16 0X0093 228 #define BCMA_BOARD_TYPE_BCM94322X9 0X008D 229 #define BCMA_BOARD_TYPE_BCM94322M35E 0X008E 230 /* BCM43228 */ 231 #define BCMA_BOARD_TYPE_BCM943228BU8 0X0540 232 #define BCMA_BOARD_TYPE_BCM943228BU9 0X0541 233 #define BCMA_BOARD_TYPE_BCM943228BU 0X0542 234 #define BCMA_BOARD_TYPE_BCM943227HM4L 0X0543 235 #define BCMA_BOARD_TYPE_BCM943227HMB 0X0544 236 #define BCMA_BOARD_TYPE_BCM943228HM4L 0X0545 237 #define BCMA_BOARD_TYPE_BCM943228SD 0X0573 238 /* BCM4331 */ 239 #define BCMA_BOARD_TYPE_BCM94331X19 0X00D6 240 #define BCMA_BOARD_TYPE_BCM94331X28 0X00E4 241 #define BCMA_BOARD_TYPE_BCM94331X28B 0X010E 242 #define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX 0X00E4 243 #define BCMA_BOARD_TYPE_BCM94331X12_2G 0X00EC 244 #define BCMA_BOARD_TYPE_BCM94331X12_5G 0X00ED 245 #define BCMA_BOARD_TYPE_BCM94331X29B 0X00EF 246 #define BCMA_BOARD_TYPE_BCM94331CSAX 0X00EF 247 #define BCMA_BOARD_TYPE_BCM94331X19C 0X00F5 248 #define BCMA_BOARD_TYPE_BCM94331X33 0X00F4 249 #define BCMA_BOARD_TYPE_BCM94331BU 0X0523 250 #define BCMA_BOARD_TYPE_BCM94331S9BU 0X0524 251 #define BCMA_BOARD_TYPE_BCM94331MC 0X0525 252 #define BCMA_BOARD_TYPE_BCM94331MCI 0X0526 253 #define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527 254 #define BCMA_BOARD_TYPE_BCM94331HM 0X0574 255 #define BCMA_BOARD_TYPE_BCM94331PCIEDUAL 0X059B 256 #define BCMA_BOARD_TYPE_BCM94331MCH5 0X05A9 257 #define BCMA_BOARD_TYPE_BCM94331CS 0X05C6 258 #define BCMA_BOARD_TYPE_BCM94331CD 0X05DA 259 /* BCM53572 */ 260 #define BCMA_BOARD_TYPE_BCM953572BU 0X058D 261 #define BCMA_BOARD_TYPE_BCM953572NR2 0X058E 262 #define BCMA_BOARD_TYPE_BCM947188NR2 0X058F 263 #define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590 264 /* BCM43142 */ 265 #define BCMA_BOARD_TYPE_BCM943142HM 0X05E0 266 267 struct bcma_device { 268 struct bcma_bus *bus; 269 struct bcma_device_id id; 270 271 struct device dev; 272 struct device *dma_dev; 273 274 unsigned int irq; 275 bool dev_registered; 276 277 u8 core_index; 278 u8 core_unit; 279 280 u32 addr; 281 u32 addr_s[8]; 282 u32 wrap; 283 284 void __iomem *io_addr; 285 void __iomem *io_wrap; 286 287 void *drvdata; 288 struct list_head list; 289 }; 290 291 static inline void *bcma_get_drvdata(struct bcma_device *core) 292 { 293 return core->drvdata; 294 } 295 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata) 296 { 297 core->drvdata = drvdata; 298 } 299 300 struct bcma_driver { 301 const char *name; 302 const struct bcma_device_id *id_table; 303 304 int (*probe)(struct bcma_device *dev); 305 void (*remove)(struct bcma_device *dev); 306 int (*suspend)(struct bcma_device *dev); 307 int (*resume)(struct bcma_device *dev); 308 void (*shutdown)(struct bcma_device *dev); 309 310 struct device_driver drv; 311 }; 312 extern 313 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner); 314 #define bcma_driver_register(drv) \ 315 __bcma_driver_register(drv, THIS_MODULE) 316 317 extern void bcma_driver_unregister(struct bcma_driver *drv); 318 319 /* module_bcma_driver() - Helper macro for drivers that don't do 320 * anything special in module init/exit. This eliminates a lot of 321 * boilerplate. Each module may only use this macro once, and 322 * calling it replaces module_init() and module_exit() 323 */ 324 #define module_bcma_driver(__bcma_driver) \ 325 module_driver(__bcma_driver, bcma_driver_register, \ 326 bcma_driver_unregister) 327 328 /* Set a fallback SPROM. 329 * See kdoc at the function definition for complete documentation. */ 330 extern int bcma_arch_register_fallback_sprom( 331 int (*sprom_callback)(struct bcma_bus *bus, 332 struct ssb_sprom *out)); 333 334 struct bcma_bus { 335 /* The MMIO area. */ 336 void __iomem *mmio; 337 338 const struct bcma_host_ops *ops; 339 340 enum bcma_hosttype hosttype; 341 bool host_is_pcie2; /* Used for BCMA_HOSTTYPE_PCI only */ 342 union { 343 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */ 344 struct pci_dev *host_pci; 345 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */ 346 struct sdio_func *host_sdio; 347 /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */ 348 struct platform_device *host_pdev; 349 }; 350 351 struct bcma_chipinfo chipinfo; 352 353 struct bcma_boardinfo boardinfo; 354 355 struct bcma_device *mapped_core; 356 struct list_head cores; 357 u8 nr_cores; 358 u8 num; 359 360 struct bcma_drv_cc drv_cc; 361 struct bcma_drv_cc_b drv_cc_b; 362 struct bcma_drv_pci drv_pci[2]; 363 struct bcma_drv_pcie2 drv_pcie2; 364 struct bcma_drv_mips drv_mips; 365 struct bcma_drv_gmac_cmn drv_gmac_cmn; 366 367 /* We decided to share SPROM struct with SSB as long as we do not need 368 * any hacks for BCMA. This simplifies drivers code. */ 369 struct ssb_sprom sprom; 370 }; 371 372 static inline u32 bcma_read8(struct bcma_device *core, u16 offset) 373 { 374 return core->bus->ops->read8(core, offset); 375 } 376 static inline u32 bcma_read16(struct bcma_device *core, u16 offset) 377 { 378 return core->bus->ops->read16(core, offset); 379 } 380 static inline u32 bcma_read32(struct bcma_device *core, u16 offset) 381 { 382 return core->bus->ops->read32(core, offset); 383 } 384 static inline 385 void bcma_write8(struct bcma_device *core, u16 offset, u32 value) 386 { 387 core->bus->ops->write8(core, offset, value); 388 } 389 static inline 390 void bcma_write16(struct bcma_device *core, u16 offset, u32 value) 391 { 392 core->bus->ops->write16(core, offset, value); 393 } 394 static inline 395 void bcma_write32(struct bcma_device *core, u16 offset, u32 value) 396 { 397 core->bus->ops->write32(core, offset, value); 398 } 399 #ifdef CONFIG_BCMA_BLOCKIO 400 static inline void bcma_block_read(struct bcma_device *core, void *buffer, 401 size_t count, u16 offset, u8 reg_width) 402 { 403 core->bus->ops->block_read(core, buffer, count, offset, reg_width); 404 } 405 static inline void bcma_block_write(struct bcma_device *core, 406 const void *buffer, size_t count, 407 u16 offset, u8 reg_width) 408 { 409 core->bus->ops->block_write(core, buffer, count, offset, reg_width); 410 } 411 #endif 412 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset) 413 { 414 return core->bus->ops->aread32(core, offset); 415 } 416 static inline 417 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value) 418 { 419 core->bus->ops->awrite32(core, offset, value); 420 } 421 422 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask) 423 { 424 bcma_write32(cc, offset, bcma_read32(cc, offset) & mask); 425 } 426 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set) 427 { 428 bcma_write32(cc, offset, bcma_read32(cc, offset) | set); 429 } 430 static inline void bcma_maskset32(struct bcma_device *cc, 431 u16 offset, u32 mask, u32 set) 432 { 433 bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set); 434 } 435 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask) 436 { 437 bcma_write16(cc, offset, bcma_read16(cc, offset) & mask); 438 } 439 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set) 440 { 441 bcma_write16(cc, offset, bcma_read16(cc, offset) | set); 442 } 443 static inline void bcma_maskset16(struct bcma_device *cc, 444 u16 offset, u16 mask, u16 set) 445 { 446 bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set); 447 } 448 449 extern struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid, 450 u8 unit); 451 static inline struct bcma_device *bcma_find_core(struct bcma_bus *bus, 452 u16 coreid) 453 { 454 return bcma_find_core_unit(bus, coreid, 0); 455 } 456 457 #ifdef CONFIG_BCMA_HOST_PCI 458 extern void bcma_host_pci_up(struct bcma_bus *bus); 459 extern void bcma_host_pci_down(struct bcma_bus *bus); 460 extern int bcma_host_pci_irq_ctl(struct bcma_bus *bus, 461 struct bcma_device *core, bool enable); 462 #else 463 static inline void bcma_host_pci_up(struct bcma_bus *bus) 464 { 465 } 466 static inline void bcma_host_pci_down(struct bcma_bus *bus) 467 { 468 } 469 static inline int bcma_host_pci_irq_ctl(struct bcma_bus *bus, 470 struct bcma_device *core, bool enable) 471 { 472 if (bus->hosttype == BCMA_HOSTTYPE_PCI) 473 return -ENOTSUPP; 474 return 0; 475 } 476 #endif 477 478 extern bool bcma_core_is_enabled(struct bcma_device *core); 479 extern void bcma_core_disable(struct bcma_device *core, u32 flags); 480 extern int bcma_core_enable(struct bcma_device *core, u32 flags); 481 extern void bcma_core_set_clockmode(struct bcma_device *core, 482 enum bcma_clkmode clkmode); 483 extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, 484 bool on); 485 extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset); 486 #define BCMA_DMA_TRANSLATION_MASK 0xC0000000 487 #define BCMA_DMA_TRANSLATION_NONE 0x00000000 488 #define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */ 489 #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */ 490 extern u32 bcma_core_dma_translation(struct bcma_device *core); 491 492 extern unsigned int bcma_core_irq(struct bcma_device *core, int num); 493 494 #endif /* LINUX_BCMA_H_ */ 495