1 #ifndef LINUX_BCMA_H_ 2 #define LINUX_BCMA_H_ 3 4 #include <linux/pci.h> 5 #include <linux/mod_devicetable.h> 6 7 #include <linux/bcma/bcma_driver_chipcommon.h> 8 #include <linux/bcma/bcma_driver_pci.h> 9 #include <linux/bcma/bcma_driver_mips.h> 10 #include <linux/bcma/bcma_driver_gmac_cmn.h> 11 #include <linux/ssb/ssb.h> /* SPROM sharing */ 12 13 #include <linux/bcma/bcma_regs.h> 14 15 struct bcma_device; 16 struct bcma_bus; 17 18 enum bcma_hosttype { 19 BCMA_HOSTTYPE_PCI, 20 BCMA_HOSTTYPE_SDIO, 21 BCMA_HOSTTYPE_SOC, 22 }; 23 24 struct bcma_chipinfo { 25 u16 id; 26 u8 rev; 27 u8 pkg; 28 }; 29 30 struct bcma_boardinfo { 31 u16 vendor; 32 u16 type; 33 }; 34 35 enum bcma_clkmode { 36 BCMA_CLKMODE_FAST, 37 BCMA_CLKMODE_DYNAMIC, 38 }; 39 40 struct bcma_host_ops { 41 u8 (*read8)(struct bcma_device *core, u16 offset); 42 u16 (*read16)(struct bcma_device *core, u16 offset); 43 u32 (*read32)(struct bcma_device *core, u16 offset); 44 void (*write8)(struct bcma_device *core, u16 offset, u8 value); 45 void (*write16)(struct bcma_device *core, u16 offset, u16 value); 46 void (*write32)(struct bcma_device *core, u16 offset, u32 value); 47 #ifdef CONFIG_BCMA_BLOCKIO 48 void (*block_read)(struct bcma_device *core, void *buffer, 49 size_t count, u16 offset, u8 reg_width); 50 void (*block_write)(struct bcma_device *core, const void *buffer, 51 size_t count, u16 offset, u8 reg_width); 52 #endif 53 /* Agent ops */ 54 u32 (*aread32)(struct bcma_device *core, u16 offset); 55 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value); 56 }; 57 58 /* Core manufacturers */ 59 #define BCMA_MANUF_ARM 0x43B 60 #define BCMA_MANUF_MIPS 0x4A7 61 #define BCMA_MANUF_BCM 0x4BF 62 63 /* Core class values. */ 64 #define BCMA_CL_SIM 0x0 65 #define BCMA_CL_EROM 0x1 66 #define BCMA_CL_CORESIGHT 0x9 67 #define BCMA_CL_VERIF 0xB 68 #define BCMA_CL_OPTIMO 0xD 69 #define BCMA_CL_GEN 0xE 70 #define BCMA_CL_PRIMECELL 0xF 71 72 /* Core-ID values. */ 73 #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ 74 #define BCMA_CORE_4706_CHIPCOMMON 0x500 75 #define BCMA_CORE_PCIEG2 0x501 76 #define BCMA_CORE_DMA 0x502 77 #define BCMA_CORE_SDIO3 0x503 78 #define BCMA_CORE_USB20 0x504 79 #define BCMA_CORE_USB30 0x505 80 #define BCMA_CORE_A9JTAG 0x506 81 #define BCMA_CORE_DDR23 0x507 82 #define BCMA_CORE_ROM 0x508 83 #define BCMA_CORE_NAND 0x509 84 #define BCMA_CORE_QSPI 0x50A 85 #define BCMA_CORE_CHIPCOMMON_B 0x50B 86 #define BCMA_CORE_4706_SOC_RAM 0x50E 87 #define BCMA_CORE_ARMCA9 0x510 88 #define BCMA_CORE_4706_MAC_GBIT 0x52D 89 #define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */ 90 #define BCMA_CORE_ALTA 0x534 /* I2S core */ 91 #define BCMA_CORE_4706_MAC_GBIT_COMMON 0x5DC 92 #define BCMA_CORE_DDR23_PHY 0x5DD 93 #define BCMA_CORE_INVALID 0x700 94 #define BCMA_CORE_CHIPCOMMON 0x800 95 #define BCMA_CORE_ILINE20 0x801 96 #define BCMA_CORE_SRAM 0x802 97 #define BCMA_CORE_SDRAM 0x803 98 #define BCMA_CORE_PCI 0x804 99 #define BCMA_CORE_MIPS 0x805 100 #define BCMA_CORE_ETHERNET 0x806 101 #define BCMA_CORE_V90 0x807 102 #define BCMA_CORE_USB11_HOSTDEV 0x808 103 #define BCMA_CORE_ADSL 0x809 104 #define BCMA_CORE_ILINE100 0x80A 105 #define BCMA_CORE_IPSEC 0x80B 106 #define BCMA_CORE_UTOPIA 0x80C 107 #define BCMA_CORE_PCMCIA 0x80D 108 #define BCMA_CORE_INTERNAL_MEM 0x80E 109 #define BCMA_CORE_MEMC_SDRAM 0x80F 110 #define BCMA_CORE_OFDM 0x810 111 #define BCMA_CORE_EXTIF 0x811 112 #define BCMA_CORE_80211 0x812 113 #define BCMA_CORE_PHY_A 0x813 114 #define BCMA_CORE_PHY_B 0x814 115 #define BCMA_CORE_PHY_G 0x815 116 #define BCMA_CORE_MIPS_3302 0x816 117 #define BCMA_CORE_USB11_HOST 0x817 118 #define BCMA_CORE_USB11_DEV 0x818 119 #define BCMA_CORE_USB20_HOST 0x819 120 #define BCMA_CORE_USB20_DEV 0x81A 121 #define BCMA_CORE_SDIO_HOST 0x81B 122 #define BCMA_CORE_ROBOSWITCH 0x81C 123 #define BCMA_CORE_PARA_ATA 0x81D 124 #define BCMA_CORE_SATA_XORDMA 0x81E 125 #define BCMA_CORE_ETHERNET_GBIT 0x81F 126 #define BCMA_CORE_PCIE 0x820 127 #define BCMA_CORE_PHY_N 0x821 128 #define BCMA_CORE_SRAM_CTL 0x822 129 #define BCMA_CORE_MINI_MACPHY 0x823 130 #define BCMA_CORE_ARM_1176 0x824 131 #define BCMA_CORE_ARM_7TDMI 0x825 132 #define BCMA_CORE_PHY_LP 0x826 133 #define BCMA_CORE_PMU 0x827 134 #define BCMA_CORE_PHY_SSN 0x828 135 #define BCMA_CORE_SDIO_DEV 0x829 136 #define BCMA_CORE_ARM_CM3 0x82A 137 #define BCMA_CORE_PHY_HT 0x82B 138 #define BCMA_CORE_MIPS_74K 0x82C 139 #define BCMA_CORE_MAC_GBIT 0x82D 140 #define BCMA_CORE_DDR12_MEM_CTL 0x82E 141 #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */ 142 #define BCMA_CORE_OCP_OCP_BRIDGE 0x830 143 #define BCMA_CORE_SHARED_COMMON 0x831 144 #define BCMA_CORE_OCP_AHB_BRIDGE 0x832 145 #define BCMA_CORE_SPI_HOST 0x833 146 #define BCMA_CORE_I2S 0x834 147 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ 148 #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ 149 #define BCMA_CORE_PHY_AC 0x83B 150 #define BCMA_CORE_PCIE2 0x83C /* PCI Express Gen2 */ 151 #define BCMA_CORE_USB30_DEV 0x83D 152 #define BCMA_CORE_ARM_CR4 0x83E 153 #define BCMA_CORE_DEFAULT 0xFFF 154 155 #define BCMA_MAX_NR_CORES 16 156 157 /* Chip IDs of PCIe devices */ 158 #define BCMA_CHIP_ID_BCM4313 0x4313 159 #define BCMA_CHIP_ID_BCM43142 43142 160 #define BCMA_CHIP_ID_BCM43224 43224 161 #define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8 162 #define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa 163 #define BCMA_CHIP_ID_BCM43225 43225 164 #define BCMA_CHIP_ID_BCM43227 43227 165 #define BCMA_CHIP_ID_BCM43228 43228 166 #define BCMA_CHIP_ID_BCM43421 43421 167 #define BCMA_CHIP_ID_BCM43428 43428 168 #define BCMA_CHIP_ID_BCM43431 43431 169 #define BCMA_CHIP_ID_BCM43460 43460 170 #define BCMA_CHIP_ID_BCM4331 0x4331 171 #define BCMA_CHIP_ID_BCM6362 0x6362 172 #define BCMA_CHIP_ID_BCM4360 0x4360 173 #define BCMA_CHIP_ID_BCM4352 0x4352 174 175 /* Chip IDs of SoCs */ 176 #define BCMA_CHIP_ID_BCM4706 0x5300 177 #define BCMA_PKG_ID_BCM4706L 1 178 #define BCMA_CHIP_ID_BCM4716 0x4716 179 #define BCMA_PKG_ID_BCM4716 8 180 #define BCMA_PKG_ID_BCM4717 9 181 #define BCMA_PKG_ID_BCM4718 10 182 #define BCMA_CHIP_ID_BCM47162 47162 183 #define BCMA_CHIP_ID_BCM4748 0x4748 184 #define BCMA_CHIP_ID_BCM4749 0x4749 185 #define BCMA_CHIP_ID_BCM5356 0x5356 186 #define BCMA_CHIP_ID_BCM5357 0x5357 187 #define BCMA_PKG_ID_BCM5358 9 188 #define BCMA_PKG_ID_BCM47186 10 189 #define BCMA_PKG_ID_BCM5357 11 190 #define BCMA_CHIP_ID_BCM53572 53572 191 #define BCMA_PKG_ID_BCM47188 9 192 #define BCMA_CHIP_ID_BCM4707 53010 193 #define BCMA_PKG_ID_BCM4707 1 194 #define BCMA_PKG_ID_BCM4708 2 195 #define BCMA_PKG_ID_BCM4709 0 196 #define BCMA_CHIP_ID_BCM53018 53018 197 198 /* Board types (on PCI usually equals to the subsystem dev id) */ 199 /* BCM4313 */ 200 #define BCMA_BOARD_TYPE_BCM94313BU 0X050F 201 #define BCMA_BOARD_TYPE_BCM94313HM 0X0510 202 #define BCMA_BOARD_TYPE_BCM94313EPA 0X0511 203 #define BCMA_BOARD_TYPE_BCM94313HMG 0X051C 204 /* BCM4716 */ 205 #define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD 206 /* BCM43224 */ 207 #define BCMA_BOARD_TYPE_BCM943224X21 0X056E 208 #define BCMA_BOARD_TYPE_BCM943224X21_FCC 0X00D1 209 #define BCMA_BOARD_TYPE_BCM943224X21B 0X00E9 210 #define BCMA_BOARD_TYPE_BCM943224M93 0X008B 211 #define BCMA_BOARD_TYPE_BCM943224M93A 0X0090 212 #define BCMA_BOARD_TYPE_BCM943224X16 0X0093 213 #define BCMA_BOARD_TYPE_BCM94322X9 0X008D 214 #define BCMA_BOARD_TYPE_BCM94322M35E 0X008E 215 /* BCM43228 */ 216 #define BCMA_BOARD_TYPE_BCM943228BU8 0X0540 217 #define BCMA_BOARD_TYPE_BCM943228BU9 0X0541 218 #define BCMA_BOARD_TYPE_BCM943228BU 0X0542 219 #define BCMA_BOARD_TYPE_BCM943227HM4L 0X0543 220 #define BCMA_BOARD_TYPE_BCM943227HMB 0X0544 221 #define BCMA_BOARD_TYPE_BCM943228HM4L 0X0545 222 #define BCMA_BOARD_TYPE_BCM943228SD 0X0573 223 /* BCM4331 */ 224 #define BCMA_BOARD_TYPE_BCM94331X19 0X00D6 225 #define BCMA_BOARD_TYPE_BCM94331X28 0X00E4 226 #define BCMA_BOARD_TYPE_BCM94331X28B 0X010E 227 #define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX 0X00E4 228 #define BCMA_BOARD_TYPE_BCM94331X12_2G 0X00EC 229 #define BCMA_BOARD_TYPE_BCM94331X12_5G 0X00ED 230 #define BCMA_BOARD_TYPE_BCM94331X29B 0X00EF 231 #define BCMA_BOARD_TYPE_BCM94331CSAX 0X00EF 232 #define BCMA_BOARD_TYPE_BCM94331X19C 0X00F5 233 #define BCMA_BOARD_TYPE_BCM94331X33 0X00F4 234 #define BCMA_BOARD_TYPE_BCM94331BU 0X0523 235 #define BCMA_BOARD_TYPE_BCM94331S9BU 0X0524 236 #define BCMA_BOARD_TYPE_BCM94331MC 0X0525 237 #define BCMA_BOARD_TYPE_BCM94331MCI 0X0526 238 #define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527 239 #define BCMA_BOARD_TYPE_BCM94331HM 0X0574 240 #define BCMA_BOARD_TYPE_BCM94331PCIEDUAL 0X059B 241 #define BCMA_BOARD_TYPE_BCM94331MCH5 0X05A9 242 #define BCMA_BOARD_TYPE_BCM94331CS 0X05C6 243 #define BCMA_BOARD_TYPE_BCM94331CD 0X05DA 244 /* BCM53572 */ 245 #define BCMA_BOARD_TYPE_BCM953572BU 0X058D 246 #define BCMA_BOARD_TYPE_BCM953572NR2 0X058E 247 #define BCMA_BOARD_TYPE_BCM947188NR2 0X058F 248 #define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590 249 /* BCM43142 */ 250 #define BCMA_BOARD_TYPE_BCM943142HM 0X05E0 251 252 struct bcma_device { 253 struct bcma_bus *bus; 254 struct bcma_device_id id; 255 256 struct device dev; 257 struct device *dma_dev; 258 259 unsigned int irq; 260 bool dev_registered; 261 262 u8 core_index; 263 u8 core_unit; 264 265 u32 addr; 266 u32 addr1; 267 u32 wrap; 268 269 void __iomem *io_addr; 270 void __iomem *io_wrap; 271 272 void *drvdata; 273 struct list_head list; 274 }; 275 276 static inline void *bcma_get_drvdata(struct bcma_device *core) 277 { 278 return core->drvdata; 279 } 280 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata) 281 { 282 core->drvdata = drvdata; 283 } 284 285 struct bcma_driver { 286 const char *name; 287 const struct bcma_device_id *id_table; 288 289 int (*probe)(struct bcma_device *dev); 290 void (*remove)(struct bcma_device *dev); 291 int (*suspend)(struct bcma_device *dev); 292 int (*resume)(struct bcma_device *dev); 293 void (*shutdown)(struct bcma_device *dev); 294 295 struct device_driver drv; 296 }; 297 extern 298 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner); 299 #define bcma_driver_register(drv) \ 300 __bcma_driver_register(drv, THIS_MODULE) 301 302 extern void bcma_driver_unregister(struct bcma_driver *drv); 303 304 /* Set a fallback SPROM. 305 * See kdoc at the function definition for complete documentation. */ 306 extern int bcma_arch_register_fallback_sprom( 307 int (*sprom_callback)(struct bcma_bus *bus, 308 struct ssb_sprom *out)); 309 310 struct bcma_bus { 311 /* The MMIO area. */ 312 void __iomem *mmio; 313 314 const struct bcma_host_ops *ops; 315 316 enum bcma_hosttype hosttype; 317 union { 318 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */ 319 struct pci_dev *host_pci; 320 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */ 321 struct sdio_func *host_sdio; 322 }; 323 324 struct bcma_chipinfo chipinfo; 325 326 struct bcma_boardinfo boardinfo; 327 328 struct bcma_device *mapped_core; 329 struct list_head cores; 330 u8 nr_cores; 331 u8 init_done:1; 332 u8 num; 333 334 struct bcma_drv_cc drv_cc; 335 struct bcma_drv_pci drv_pci[2]; 336 struct bcma_drv_mips drv_mips; 337 struct bcma_drv_gmac_cmn drv_gmac_cmn; 338 339 /* We decided to share SPROM struct with SSB as long as we do not need 340 * any hacks for BCMA. This simplifies drivers code. */ 341 struct ssb_sprom sprom; 342 }; 343 344 static inline u32 bcma_read8(struct bcma_device *core, u16 offset) 345 { 346 return core->bus->ops->read8(core, offset); 347 } 348 static inline u32 bcma_read16(struct bcma_device *core, u16 offset) 349 { 350 return core->bus->ops->read16(core, offset); 351 } 352 static inline u32 bcma_read32(struct bcma_device *core, u16 offset) 353 { 354 return core->bus->ops->read32(core, offset); 355 } 356 static inline 357 void bcma_write8(struct bcma_device *core, u16 offset, u32 value) 358 { 359 core->bus->ops->write8(core, offset, value); 360 } 361 static inline 362 void bcma_write16(struct bcma_device *core, u16 offset, u32 value) 363 { 364 core->bus->ops->write16(core, offset, value); 365 } 366 static inline 367 void bcma_write32(struct bcma_device *core, u16 offset, u32 value) 368 { 369 core->bus->ops->write32(core, offset, value); 370 } 371 #ifdef CONFIG_BCMA_BLOCKIO 372 static inline void bcma_block_read(struct bcma_device *core, void *buffer, 373 size_t count, u16 offset, u8 reg_width) 374 { 375 core->bus->ops->block_read(core, buffer, count, offset, reg_width); 376 } 377 static inline void bcma_block_write(struct bcma_device *core, 378 const void *buffer, size_t count, 379 u16 offset, u8 reg_width) 380 { 381 core->bus->ops->block_write(core, buffer, count, offset, reg_width); 382 } 383 #endif 384 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset) 385 { 386 return core->bus->ops->aread32(core, offset); 387 } 388 static inline 389 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value) 390 { 391 core->bus->ops->awrite32(core, offset, value); 392 } 393 394 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask) 395 { 396 bcma_write32(cc, offset, bcma_read32(cc, offset) & mask); 397 } 398 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set) 399 { 400 bcma_write32(cc, offset, bcma_read32(cc, offset) | set); 401 } 402 static inline void bcma_maskset32(struct bcma_device *cc, 403 u16 offset, u32 mask, u32 set) 404 { 405 bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set); 406 } 407 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask) 408 { 409 bcma_write16(cc, offset, bcma_read16(cc, offset) & mask); 410 } 411 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set) 412 { 413 bcma_write16(cc, offset, bcma_read16(cc, offset) | set); 414 } 415 static inline void bcma_maskset16(struct bcma_device *cc, 416 u16 offset, u16 mask, u16 set) 417 { 418 bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set); 419 } 420 421 extern struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid); 422 extern bool bcma_core_is_enabled(struct bcma_device *core); 423 extern void bcma_core_disable(struct bcma_device *core, u32 flags); 424 extern int bcma_core_enable(struct bcma_device *core, u32 flags); 425 extern void bcma_core_set_clockmode(struct bcma_device *core, 426 enum bcma_clkmode clkmode); 427 extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, 428 bool on); 429 extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset); 430 #define BCMA_DMA_TRANSLATION_MASK 0xC0000000 431 #define BCMA_DMA_TRANSLATION_NONE 0x00000000 432 #define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */ 433 #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */ 434 extern u32 bcma_core_dma_translation(struct bcma_device *core); 435 436 #endif /* LINUX_BCMA_H_ */ 437