1 #ifndef LINUX_BCMA_H_ 2 #define LINUX_BCMA_H_ 3 4 #include <linux/pci.h> 5 #include <linux/mod_devicetable.h> 6 7 #include <linux/bcma/bcma_driver_chipcommon.h> 8 #include <linux/bcma/bcma_driver_pci.h> 9 #include <linux/bcma/bcma_driver_mips.h> 10 #include <linux/bcma/bcma_driver_gmac_cmn.h> 11 #include <linux/ssb/ssb.h> /* SPROM sharing */ 12 13 #include <linux/bcma/bcma_regs.h> 14 15 struct bcma_device; 16 struct bcma_bus; 17 18 enum bcma_hosttype { 19 BCMA_HOSTTYPE_PCI, 20 BCMA_HOSTTYPE_SDIO, 21 BCMA_HOSTTYPE_SOC, 22 }; 23 24 struct bcma_chipinfo { 25 u16 id; 26 u8 rev; 27 u8 pkg; 28 }; 29 30 struct bcma_boardinfo { 31 u16 vendor; 32 u16 type; 33 }; 34 35 enum bcma_clkmode { 36 BCMA_CLKMODE_FAST, 37 BCMA_CLKMODE_DYNAMIC, 38 }; 39 40 struct bcma_host_ops { 41 u8 (*read8)(struct bcma_device *core, u16 offset); 42 u16 (*read16)(struct bcma_device *core, u16 offset); 43 u32 (*read32)(struct bcma_device *core, u16 offset); 44 void (*write8)(struct bcma_device *core, u16 offset, u8 value); 45 void (*write16)(struct bcma_device *core, u16 offset, u16 value); 46 void (*write32)(struct bcma_device *core, u16 offset, u32 value); 47 #ifdef CONFIG_BCMA_BLOCKIO 48 void (*block_read)(struct bcma_device *core, void *buffer, 49 size_t count, u16 offset, u8 reg_width); 50 void (*block_write)(struct bcma_device *core, const void *buffer, 51 size_t count, u16 offset, u8 reg_width); 52 #endif 53 /* Agent ops */ 54 u32 (*aread32)(struct bcma_device *core, u16 offset); 55 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value); 56 }; 57 58 /* Core manufacturers */ 59 #define BCMA_MANUF_ARM 0x43B 60 #define BCMA_MANUF_MIPS 0x4A7 61 #define BCMA_MANUF_BCM 0x4BF 62 63 /* Core class values. */ 64 #define BCMA_CL_SIM 0x0 65 #define BCMA_CL_EROM 0x1 66 #define BCMA_CL_CORESIGHT 0x9 67 #define BCMA_CL_VERIF 0xB 68 #define BCMA_CL_OPTIMO 0xD 69 #define BCMA_CL_GEN 0xE 70 #define BCMA_CL_PRIMECELL 0xF 71 72 /* Core-ID values. */ 73 #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ 74 #define BCMA_CORE_4706_CHIPCOMMON 0x500 75 #define BCMA_CORE_4706_SOC_RAM 0x50E 76 #define BCMA_CORE_4706_MAC_GBIT 0x52D 77 #define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */ 78 #define BCMA_CORE_ALTA 0x534 /* I2S core */ 79 #define BCMA_CORE_4706_MAC_GBIT_COMMON 0x5DC 80 #define BCMA_CORE_DDR23_PHY 0x5DD 81 #define BCMA_CORE_INVALID 0x700 82 #define BCMA_CORE_CHIPCOMMON 0x800 83 #define BCMA_CORE_ILINE20 0x801 84 #define BCMA_CORE_SRAM 0x802 85 #define BCMA_CORE_SDRAM 0x803 86 #define BCMA_CORE_PCI 0x804 87 #define BCMA_CORE_MIPS 0x805 88 #define BCMA_CORE_ETHERNET 0x806 89 #define BCMA_CORE_V90 0x807 90 #define BCMA_CORE_USB11_HOSTDEV 0x808 91 #define BCMA_CORE_ADSL 0x809 92 #define BCMA_CORE_ILINE100 0x80A 93 #define BCMA_CORE_IPSEC 0x80B 94 #define BCMA_CORE_UTOPIA 0x80C 95 #define BCMA_CORE_PCMCIA 0x80D 96 #define BCMA_CORE_INTERNAL_MEM 0x80E 97 #define BCMA_CORE_MEMC_SDRAM 0x80F 98 #define BCMA_CORE_OFDM 0x810 99 #define BCMA_CORE_EXTIF 0x811 100 #define BCMA_CORE_80211 0x812 101 #define BCMA_CORE_PHY_A 0x813 102 #define BCMA_CORE_PHY_B 0x814 103 #define BCMA_CORE_PHY_G 0x815 104 #define BCMA_CORE_MIPS_3302 0x816 105 #define BCMA_CORE_USB11_HOST 0x817 106 #define BCMA_CORE_USB11_DEV 0x818 107 #define BCMA_CORE_USB20_HOST 0x819 108 #define BCMA_CORE_USB20_DEV 0x81A 109 #define BCMA_CORE_SDIO_HOST 0x81B 110 #define BCMA_CORE_ROBOSWITCH 0x81C 111 #define BCMA_CORE_PARA_ATA 0x81D 112 #define BCMA_CORE_SATA_XORDMA 0x81E 113 #define BCMA_CORE_ETHERNET_GBIT 0x81F 114 #define BCMA_CORE_PCIE 0x820 115 #define BCMA_CORE_PHY_N 0x821 116 #define BCMA_CORE_SRAM_CTL 0x822 117 #define BCMA_CORE_MINI_MACPHY 0x823 118 #define BCMA_CORE_ARM_1176 0x824 119 #define BCMA_CORE_ARM_7TDMI 0x825 120 #define BCMA_CORE_PHY_LP 0x826 121 #define BCMA_CORE_PMU 0x827 122 #define BCMA_CORE_PHY_SSN 0x828 123 #define BCMA_CORE_SDIO_DEV 0x829 124 #define BCMA_CORE_ARM_CM3 0x82A 125 #define BCMA_CORE_PHY_HT 0x82B 126 #define BCMA_CORE_MIPS_74K 0x82C 127 #define BCMA_CORE_MAC_GBIT 0x82D 128 #define BCMA_CORE_DDR12_MEM_CTL 0x82E 129 #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */ 130 #define BCMA_CORE_OCP_OCP_BRIDGE 0x830 131 #define BCMA_CORE_SHARED_COMMON 0x831 132 #define BCMA_CORE_OCP_AHB_BRIDGE 0x832 133 #define BCMA_CORE_SPI_HOST 0x833 134 #define BCMA_CORE_I2S 0x834 135 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ 136 #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ 137 #define BCMA_CORE_DEFAULT 0xFFF 138 139 #define BCMA_MAX_NR_CORES 16 140 141 /* Chip IDs of PCIe devices */ 142 #define BCMA_CHIP_ID_BCM4313 0x4313 143 #define BCMA_CHIP_ID_BCM43224 43224 144 #define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8 145 #define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa 146 #define BCMA_CHIP_ID_BCM43225 43225 147 #define BCMA_CHIP_ID_BCM43227 43227 148 #define BCMA_CHIP_ID_BCM43228 43228 149 #define BCMA_CHIP_ID_BCM43421 43421 150 #define BCMA_CHIP_ID_BCM43428 43428 151 #define BCMA_CHIP_ID_BCM43431 43431 152 #define BCMA_CHIP_ID_BCM43460 43460 153 #define BCMA_CHIP_ID_BCM4331 0x4331 154 #define BCMA_CHIP_ID_BCM6362 0x6362 155 #define BCMA_CHIP_ID_BCM4360 0x4360 156 #define BCMA_CHIP_ID_BCM4352 0x4352 157 158 /* Chip IDs of SoCs */ 159 #define BCMA_CHIP_ID_BCM4706 0x5300 160 #define BCMA_PKG_ID_BCM4706L 1 161 #define BCMA_CHIP_ID_BCM4716 0x4716 162 #define BCMA_PKG_ID_BCM4716 8 163 #define BCMA_PKG_ID_BCM4717 9 164 #define BCMA_PKG_ID_BCM4718 10 165 #define BCMA_CHIP_ID_BCM47162 47162 166 #define BCMA_CHIP_ID_BCM4748 0x4748 167 #define BCMA_CHIP_ID_BCM4749 0x4749 168 #define BCMA_CHIP_ID_BCM5356 0x5356 169 #define BCMA_CHIP_ID_BCM5357 0x5357 170 #define BCMA_PKG_ID_BCM5358 9 171 #define BCMA_PKG_ID_BCM47186 10 172 #define BCMA_PKG_ID_BCM5357 11 173 #define BCMA_CHIP_ID_BCM53572 53572 174 #define BCMA_PKG_ID_BCM47188 9 175 176 struct bcma_device { 177 struct bcma_bus *bus; 178 struct bcma_device_id id; 179 180 struct device dev; 181 struct device *dma_dev; 182 183 unsigned int irq; 184 bool dev_registered; 185 186 u8 core_index; 187 u8 core_unit; 188 189 u32 addr; 190 u32 addr1; 191 u32 wrap; 192 193 void __iomem *io_addr; 194 void __iomem *io_wrap; 195 196 void *drvdata; 197 struct list_head list; 198 }; 199 200 static inline void *bcma_get_drvdata(struct bcma_device *core) 201 { 202 return core->drvdata; 203 } 204 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata) 205 { 206 core->drvdata = drvdata; 207 } 208 209 struct bcma_driver { 210 const char *name; 211 const struct bcma_device_id *id_table; 212 213 int (*probe)(struct bcma_device *dev); 214 void (*remove)(struct bcma_device *dev); 215 int (*suspend)(struct bcma_device *dev); 216 int (*resume)(struct bcma_device *dev); 217 void (*shutdown)(struct bcma_device *dev); 218 219 struct device_driver drv; 220 }; 221 extern 222 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner); 223 #define bcma_driver_register(drv) \ 224 __bcma_driver_register(drv, THIS_MODULE) 225 226 extern void bcma_driver_unregister(struct bcma_driver *drv); 227 228 /* Set a fallback SPROM. 229 * See kdoc at the function definition for complete documentation. */ 230 extern int bcma_arch_register_fallback_sprom( 231 int (*sprom_callback)(struct bcma_bus *bus, 232 struct ssb_sprom *out)); 233 234 struct bcma_bus { 235 /* The MMIO area. */ 236 void __iomem *mmio; 237 238 const struct bcma_host_ops *ops; 239 240 enum bcma_hosttype hosttype; 241 union { 242 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */ 243 struct pci_dev *host_pci; 244 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */ 245 struct sdio_func *host_sdio; 246 }; 247 248 struct bcma_chipinfo chipinfo; 249 250 struct bcma_boardinfo boardinfo; 251 252 struct bcma_device *mapped_core; 253 struct list_head cores; 254 u8 nr_cores; 255 u8 init_done:1; 256 u8 num; 257 258 struct bcma_drv_cc drv_cc; 259 struct bcma_drv_pci drv_pci[2]; 260 struct bcma_drv_mips drv_mips; 261 struct bcma_drv_gmac_cmn drv_gmac_cmn; 262 263 /* We decided to share SPROM struct with SSB as long as we do not need 264 * any hacks for BCMA. This simplifies drivers code. */ 265 struct ssb_sprom sprom; 266 }; 267 268 static inline u32 bcma_read8(struct bcma_device *core, u16 offset) 269 { 270 return core->bus->ops->read8(core, offset); 271 } 272 static inline u32 bcma_read16(struct bcma_device *core, u16 offset) 273 { 274 return core->bus->ops->read16(core, offset); 275 } 276 static inline u32 bcma_read32(struct bcma_device *core, u16 offset) 277 { 278 return core->bus->ops->read32(core, offset); 279 } 280 static inline 281 void bcma_write8(struct bcma_device *core, u16 offset, u32 value) 282 { 283 core->bus->ops->write8(core, offset, value); 284 } 285 static inline 286 void bcma_write16(struct bcma_device *core, u16 offset, u32 value) 287 { 288 core->bus->ops->write16(core, offset, value); 289 } 290 static inline 291 void bcma_write32(struct bcma_device *core, u16 offset, u32 value) 292 { 293 core->bus->ops->write32(core, offset, value); 294 } 295 #ifdef CONFIG_BCMA_BLOCKIO 296 static inline void bcma_block_read(struct bcma_device *core, void *buffer, 297 size_t count, u16 offset, u8 reg_width) 298 { 299 core->bus->ops->block_read(core, buffer, count, offset, reg_width); 300 } 301 static inline void bcma_block_write(struct bcma_device *core, 302 const void *buffer, size_t count, 303 u16 offset, u8 reg_width) 304 { 305 core->bus->ops->block_write(core, buffer, count, offset, reg_width); 306 } 307 #endif 308 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset) 309 { 310 return core->bus->ops->aread32(core, offset); 311 } 312 static inline 313 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value) 314 { 315 core->bus->ops->awrite32(core, offset, value); 316 } 317 318 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask) 319 { 320 bcma_write32(cc, offset, bcma_read32(cc, offset) & mask); 321 } 322 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set) 323 { 324 bcma_write32(cc, offset, bcma_read32(cc, offset) | set); 325 } 326 static inline void bcma_maskset32(struct bcma_device *cc, 327 u16 offset, u32 mask, u32 set) 328 { 329 bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set); 330 } 331 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask) 332 { 333 bcma_write16(cc, offset, bcma_read16(cc, offset) & mask); 334 } 335 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set) 336 { 337 bcma_write16(cc, offset, bcma_read16(cc, offset) | set); 338 } 339 static inline void bcma_maskset16(struct bcma_device *cc, 340 u16 offset, u16 mask, u16 set) 341 { 342 bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set); 343 } 344 345 extern struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid); 346 extern bool bcma_core_is_enabled(struct bcma_device *core); 347 extern void bcma_core_disable(struct bcma_device *core, u32 flags); 348 extern int bcma_core_enable(struct bcma_device *core, u32 flags); 349 extern void bcma_core_set_clockmode(struct bcma_device *core, 350 enum bcma_clkmode clkmode); 351 extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, 352 bool on); 353 extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset); 354 #define BCMA_DMA_TRANSLATION_MASK 0xC0000000 355 #define BCMA_DMA_TRANSLATION_NONE 0x00000000 356 #define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */ 357 #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */ 358 extern u32 bcma_core_dma_translation(struct bcma_device *core); 359 360 #endif /* LINUX_BCMA_H_ */ 361