1 #ifndef LINUX_BCMA_H_ 2 #define LINUX_BCMA_H_ 3 4 #include <linux/pci.h> 5 #include <linux/mod_devicetable.h> 6 7 #include <linux/bcma/bcma_driver_arm_c9.h> 8 #include <linux/bcma/bcma_driver_chipcommon.h> 9 #include <linux/bcma/bcma_driver_pci.h> 10 #include <linux/bcma/bcma_driver_pcie2.h> 11 #include <linux/bcma/bcma_driver_mips.h> 12 #include <linux/bcma/bcma_driver_gmac_cmn.h> 13 #include <linux/ssb/ssb.h> /* SPROM sharing */ 14 15 #include <linux/bcma/bcma_regs.h> 16 17 struct bcma_device; 18 struct bcma_bus; 19 20 enum bcma_hosttype { 21 BCMA_HOSTTYPE_PCI, 22 BCMA_HOSTTYPE_SDIO, 23 BCMA_HOSTTYPE_SOC, 24 }; 25 26 struct bcma_chipinfo { 27 u16 id; 28 u8 rev; 29 u8 pkg; 30 }; 31 32 struct bcma_boardinfo { 33 u16 vendor; 34 u16 type; 35 }; 36 37 enum bcma_clkmode { 38 BCMA_CLKMODE_FAST, 39 BCMA_CLKMODE_DYNAMIC, 40 }; 41 42 struct bcma_host_ops { 43 u8 (*read8)(struct bcma_device *core, u16 offset); 44 u16 (*read16)(struct bcma_device *core, u16 offset); 45 u32 (*read32)(struct bcma_device *core, u16 offset); 46 void (*write8)(struct bcma_device *core, u16 offset, u8 value); 47 void (*write16)(struct bcma_device *core, u16 offset, u16 value); 48 void (*write32)(struct bcma_device *core, u16 offset, u32 value); 49 #ifdef CONFIG_BCMA_BLOCKIO 50 void (*block_read)(struct bcma_device *core, void *buffer, 51 size_t count, u16 offset, u8 reg_width); 52 void (*block_write)(struct bcma_device *core, const void *buffer, 53 size_t count, u16 offset, u8 reg_width); 54 #endif 55 /* Agent ops */ 56 u32 (*aread32)(struct bcma_device *core, u16 offset); 57 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value); 58 }; 59 60 /* Core manufacturers */ 61 #define BCMA_MANUF_ARM 0x43B 62 #define BCMA_MANUF_MIPS 0x4A7 63 #define BCMA_MANUF_BCM 0x4BF 64 65 /* Core class values. */ 66 #define BCMA_CL_SIM 0x0 67 #define BCMA_CL_EROM 0x1 68 #define BCMA_CL_CORESIGHT 0x9 69 #define BCMA_CL_VERIF 0xB 70 #define BCMA_CL_OPTIMO 0xD 71 #define BCMA_CL_GEN 0xE 72 #define BCMA_CL_PRIMECELL 0xF 73 74 /* Core-ID values. */ 75 #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ 76 #define BCMA_CORE_4706_CHIPCOMMON 0x500 77 #define BCMA_CORE_NS_PCIEG2 0x501 78 #define BCMA_CORE_NS_DMA 0x502 79 #define BCMA_CORE_NS_SDIO3 0x503 80 #define BCMA_CORE_NS_USB20 0x504 81 #define BCMA_CORE_NS_USB30 0x505 82 #define BCMA_CORE_NS_A9JTAG 0x506 83 #define BCMA_CORE_NS_DDR23 0x507 84 #define BCMA_CORE_NS_ROM 0x508 85 #define BCMA_CORE_NS_NAND 0x509 86 #define BCMA_CORE_NS_QSPI 0x50A 87 #define BCMA_CORE_NS_CHIPCOMMON_B 0x50B 88 #define BCMA_CORE_4706_SOC_RAM 0x50E 89 #define BCMA_CORE_ARMCA9 0x510 90 #define BCMA_CORE_4706_MAC_GBIT 0x52D 91 #define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */ 92 #define BCMA_CORE_ALTA 0x534 /* I2S core */ 93 #define BCMA_CORE_4706_MAC_GBIT_COMMON 0x5DC 94 #define BCMA_CORE_DDR23_PHY 0x5DD 95 #define BCMA_CORE_INVALID 0x700 96 #define BCMA_CORE_CHIPCOMMON 0x800 97 #define BCMA_CORE_ILINE20 0x801 98 #define BCMA_CORE_SRAM 0x802 99 #define BCMA_CORE_SDRAM 0x803 100 #define BCMA_CORE_PCI 0x804 101 #define BCMA_CORE_MIPS 0x805 102 #define BCMA_CORE_ETHERNET 0x806 103 #define BCMA_CORE_V90 0x807 104 #define BCMA_CORE_USB11_HOSTDEV 0x808 105 #define BCMA_CORE_ADSL 0x809 106 #define BCMA_CORE_ILINE100 0x80A 107 #define BCMA_CORE_IPSEC 0x80B 108 #define BCMA_CORE_UTOPIA 0x80C 109 #define BCMA_CORE_PCMCIA 0x80D 110 #define BCMA_CORE_INTERNAL_MEM 0x80E 111 #define BCMA_CORE_MEMC_SDRAM 0x80F 112 #define BCMA_CORE_OFDM 0x810 113 #define BCMA_CORE_EXTIF 0x811 114 #define BCMA_CORE_80211 0x812 115 #define BCMA_CORE_PHY_A 0x813 116 #define BCMA_CORE_PHY_B 0x814 117 #define BCMA_CORE_PHY_G 0x815 118 #define BCMA_CORE_MIPS_3302 0x816 119 #define BCMA_CORE_USB11_HOST 0x817 120 #define BCMA_CORE_USB11_DEV 0x818 121 #define BCMA_CORE_USB20_HOST 0x819 122 #define BCMA_CORE_USB20_DEV 0x81A 123 #define BCMA_CORE_SDIO_HOST 0x81B 124 #define BCMA_CORE_ROBOSWITCH 0x81C 125 #define BCMA_CORE_PARA_ATA 0x81D 126 #define BCMA_CORE_SATA_XORDMA 0x81E 127 #define BCMA_CORE_ETHERNET_GBIT 0x81F 128 #define BCMA_CORE_PCIE 0x820 129 #define BCMA_CORE_PHY_N 0x821 130 #define BCMA_CORE_SRAM_CTL 0x822 131 #define BCMA_CORE_MINI_MACPHY 0x823 132 #define BCMA_CORE_ARM_1176 0x824 133 #define BCMA_CORE_ARM_7TDMI 0x825 134 #define BCMA_CORE_PHY_LP 0x826 135 #define BCMA_CORE_PMU 0x827 136 #define BCMA_CORE_PHY_SSN 0x828 137 #define BCMA_CORE_SDIO_DEV 0x829 138 #define BCMA_CORE_ARM_CM3 0x82A 139 #define BCMA_CORE_PHY_HT 0x82B 140 #define BCMA_CORE_MIPS_74K 0x82C 141 #define BCMA_CORE_MAC_GBIT 0x82D 142 #define BCMA_CORE_DDR12_MEM_CTL 0x82E 143 #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */ 144 #define BCMA_CORE_OCP_OCP_BRIDGE 0x830 145 #define BCMA_CORE_SHARED_COMMON 0x831 146 #define BCMA_CORE_OCP_AHB_BRIDGE 0x832 147 #define BCMA_CORE_SPI_HOST 0x833 148 #define BCMA_CORE_I2S 0x834 149 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ 150 #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ 151 #define BCMA_CORE_PHY_AC 0x83B 152 #define BCMA_CORE_PCIE2 0x83C /* PCI Express Gen2 */ 153 #define BCMA_CORE_USB30_DEV 0x83D 154 #define BCMA_CORE_ARM_CR4 0x83E 155 #define BCMA_CORE_GCI 0x840 156 #define BCMA_CORE_CMEM 0x846 /* CNDS DDR2/3 memory controller */ 157 #define BCMA_CORE_ARM_CA7 0x847 158 #define BCMA_CORE_SYS_MEM 0x849 159 #define BCMA_CORE_DEFAULT 0xFFF 160 161 #define BCMA_MAX_NR_CORES 16 162 #define BCMA_CORE_SIZE 0x1000 163 164 /* Chip IDs of PCIe devices */ 165 #define BCMA_CHIP_ID_BCM4313 0x4313 166 #define BCMA_CHIP_ID_BCM43142 43142 167 #define BCMA_CHIP_ID_BCM43131 43131 168 #define BCMA_CHIP_ID_BCM43217 43217 169 #define BCMA_CHIP_ID_BCM43222 43222 170 #define BCMA_CHIP_ID_BCM43224 43224 171 #define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8 172 #define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa 173 #define BCMA_CHIP_ID_BCM43225 43225 174 #define BCMA_CHIP_ID_BCM43227 43227 175 #define BCMA_CHIP_ID_BCM43228 43228 176 #define BCMA_CHIP_ID_BCM43421 43421 177 #define BCMA_CHIP_ID_BCM43428 43428 178 #define BCMA_CHIP_ID_BCM43431 43431 179 #define BCMA_CHIP_ID_BCM43460 43460 180 #define BCMA_CHIP_ID_BCM4331 0x4331 181 #define BCMA_CHIP_ID_BCM6362 0x6362 182 #define BCMA_CHIP_ID_BCM4360 0x4360 183 #define BCMA_CHIP_ID_BCM4352 0x4352 184 185 /* Chip IDs of SoCs */ 186 #define BCMA_CHIP_ID_BCM4706 0x5300 187 #define BCMA_PKG_ID_BCM4706L 1 188 #define BCMA_CHIP_ID_BCM4716 0x4716 189 #define BCMA_PKG_ID_BCM4716 8 190 #define BCMA_PKG_ID_BCM4717 9 191 #define BCMA_PKG_ID_BCM4718 10 192 #define BCMA_CHIP_ID_BCM47162 47162 193 #define BCMA_CHIP_ID_BCM4748 0x4748 194 #define BCMA_CHIP_ID_BCM4749 0x4749 195 #define BCMA_CHIP_ID_BCM5356 0x5356 196 #define BCMA_CHIP_ID_BCM5357 0x5357 197 #define BCMA_PKG_ID_BCM5358 9 198 #define BCMA_PKG_ID_BCM47186 10 199 #define BCMA_PKG_ID_BCM5357 11 200 #define BCMA_CHIP_ID_BCM53572 53572 201 #define BCMA_PKG_ID_BCM47188 9 202 #define BCMA_CHIP_ID_BCM4707 53010 203 #define BCMA_PKG_ID_BCM4707 1 204 #define BCMA_PKG_ID_BCM4708 2 205 #define BCMA_PKG_ID_BCM4709 0 206 #define BCMA_CHIP_ID_BCM47094 53030 207 #define BCMA_CHIP_ID_BCM53018 53018 208 #define BCMA_CHIP_ID_BCM53573 53573 209 #define BCMA_PKG_ID_BCM53573 0 210 #define BCMA_PKG_ID_BCM47189 1 211 212 /* Board types (on PCI usually equals to the subsystem dev id) */ 213 /* BCM4313 */ 214 #define BCMA_BOARD_TYPE_BCM94313BU 0X050F 215 #define BCMA_BOARD_TYPE_BCM94313HM 0X0510 216 #define BCMA_BOARD_TYPE_BCM94313EPA 0X0511 217 #define BCMA_BOARD_TYPE_BCM94313HMG 0X051C 218 /* BCM4716 */ 219 #define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD 220 /* BCM43224 */ 221 #define BCMA_BOARD_TYPE_BCM943224X21 0X056E 222 #define BCMA_BOARD_TYPE_BCM943224X21_FCC 0X00D1 223 #define BCMA_BOARD_TYPE_BCM943224X21B 0X00E9 224 #define BCMA_BOARD_TYPE_BCM943224M93 0X008B 225 #define BCMA_BOARD_TYPE_BCM943224M93A 0X0090 226 #define BCMA_BOARD_TYPE_BCM943224X16 0X0093 227 #define BCMA_BOARD_TYPE_BCM94322X9 0X008D 228 #define BCMA_BOARD_TYPE_BCM94322M35E 0X008E 229 /* BCM43228 */ 230 #define BCMA_BOARD_TYPE_BCM943228BU8 0X0540 231 #define BCMA_BOARD_TYPE_BCM943228BU9 0X0541 232 #define BCMA_BOARD_TYPE_BCM943228BU 0X0542 233 #define BCMA_BOARD_TYPE_BCM943227HM4L 0X0543 234 #define BCMA_BOARD_TYPE_BCM943227HMB 0X0544 235 #define BCMA_BOARD_TYPE_BCM943228HM4L 0X0545 236 #define BCMA_BOARD_TYPE_BCM943228SD 0X0573 237 /* BCM4331 */ 238 #define BCMA_BOARD_TYPE_BCM94331X19 0X00D6 239 #define BCMA_BOARD_TYPE_BCM94331X28 0X00E4 240 #define BCMA_BOARD_TYPE_BCM94331X28B 0X010E 241 #define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX 0X00E4 242 #define BCMA_BOARD_TYPE_BCM94331X12_2G 0X00EC 243 #define BCMA_BOARD_TYPE_BCM94331X12_5G 0X00ED 244 #define BCMA_BOARD_TYPE_BCM94331X29B 0X00EF 245 #define BCMA_BOARD_TYPE_BCM94331CSAX 0X00EF 246 #define BCMA_BOARD_TYPE_BCM94331X19C 0X00F5 247 #define BCMA_BOARD_TYPE_BCM94331X33 0X00F4 248 #define BCMA_BOARD_TYPE_BCM94331BU 0X0523 249 #define BCMA_BOARD_TYPE_BCM94331S9BU 0X0524 250 #define BCMA_BOARD_TYPE_BCM94331MC 0X0525 251 #define BCMA_BOARD_TYPE_BCM94331MCI 0X0526 252 #define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527 253 #define BCMA_BOARD_TYPE_BCM94331HM 0X0574 254 #define BCMA_BOARD_TYPE_BCM94331PCIEDUAL 0X059B 255 #define BCMA_BOARD_TYPE_BCM94331MCH5 0X05A9 256 #define BCMA_BOARD_TYPE_BCM94331CS 0X05C6 257 #define BCMA_BOARD_TYPE_BCM94331CD 0X05DA 258 /* BCM53572 */ 259 #define BCMA_BOARD_TYPE_BCM953572BU 0X058D 260 #define BCMA_BOARD_TYPE_BCM953572NR2 0X058E 261 #define BCMA_BOARD_TYPE_BCM947188NR2 0X058F 262 #define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590 263 /* BCM43142 */ 264 #define BCMA_BOARD_TYPE_BCM943142HM 0X05E0 265 266 struct bcma_device { 267 struct bcma_bus *bus; 268 struct bcma_device_id id; 269 270 struct device dev; 271 struct device *dma_dev; 272 273 unsigned int irq; 274 bool dev_registered; 275 276 u8 core_index; 277 u8 core_unit; 278 279 u32 addr; 280 u32 addr_s[8]; 281 u32 wrap; 282 283 void __iomem *io_addr; 284 void __iomem *io_wrap; 285 286 void *drvdata; 287 struct list_head list; 288 }; 289 290 static inline void *bcma_get_drvdata(struct bcma_device *core) 291 { 292 return core->drvdata; 293 } 294 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata) 295 { 296 core->drvdata = drvdata; 297 } 298 299 struct bcma_driver { 300 const char *name; 301 const struct bcma_device_id *id_table; 302 303 int (*probe)(struct bcma_device *dev); 304 void (*remove)(struct bcma_device *dev); 305 int (*suspend)(struct bcma_device *dev); 306 int (*resume)(struct bcma_device *dev); 307 void (*shutdown)(struct bcma_device *dev); 308 309 struct device_driver drv; 310 }; 311 extern 312 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner); 313 #define bcma_driver_register(drv) \ 314 __bcma_driver_register(drv, THIS_MODULE) 315 316 extern void bcma_driver_unregister(struct bcma_driver *drv); 317 318 /* module_bcma_driver() - Helper macro for drivers that don't do 319 * anything special in module init/exit. This eliminates a lot of 320 * boilerplate. Each module may only use this macro once, and 321 * calling it replaces module_init() and module_exit() 322 */ 323 #define module_bcma_driver(__bcma_driver) \ 324 module_driver(__bcma_driver, bcma_driver_register, \ 325 bcma_driver_unregister) 326 327 /* Set a fallback SPROM. 328 * See kdoc at the function definition for complete documentation. */ 329 extern int bcma_arch_register_fallback_sprom( 330 int (*sprom_callback)(struct bcma_bus *bus, 331 struct ssb_sprom *out)); 332 333 struct bcma_bus { 334 /* The MMIO area. */ 335 void __iomem *mmio; 336 337 const struct bcma_host_ops *ops; 338 339 enum bcma_hosttype hosttype; 340 bool host_is_pcie2; /* Used for BCMA_HOSTTYPE_PCI only */ 341 union { 342 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */ 343 struct pci_dev *host_pci; 344 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */ 345 struct sdio_func *host_sdio; 346 /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */ 347 struct platform_device *host_pdev; 348 }; 349 350 struct bcma_chipinfo chipinfo; 351 352 struct bcma_boardinfo boardinfo; 353 354 struct bcma_device *mapped_core; 355 struct list_head cores; 356 u8 nr_cores; 357 u8 num; 358 359 struct bcma_drv_cc drv_cc; 360 struct bcma_drv_cc_b drv_cc_b; 361 struct bcma_drv_pci drv_pci[2]; 362 struct bcma_drv_pcie2 drv_pcie2; 363 struct bcma_drv_mips drv_mips; 364 struct bcma_drv_gmac_cmn drv_gmac_cmn; 365 366 /* We decided to share SPROM struct with SSB as long as we do not need 367 * any hacks for BCMA. This simplifies drivers code. */ 368 struct ssb_sprom sprom; 369 }; 370 371 static inline u32 bcma_read8(struct bcma_device *core, u16 offset) 372 { 373 return core->bus->ops->read8(core, offset); 374 } 375 static inline u32 bcma_read16(struct bcma_device *core, u16 offset) 376 { 377 return core->bus->ops->read16(core, offset); 378 } 379 static inline u32 bcma_read32(struct bcma_device *core, u16 offset) 380 { 381 return core->bus->ops->read32(core, offset); 382 } 383 static inline 384 void bcma_write8(struct bcma_device *core, u16 offset, u32 value) 385 { 386 core->bus->ops->write8(core, offset, value); 387 } 388 static inline 389 void bcma_write16(struct bcma_device *core, u16 offset, u32 value) 390 { 391 core->bus->ops->write16(core, offset, value); 392 } 393 static inline 394 void bcma_write32(struct bcma_device *core, u16 offset, u32 value) 395 { 396 core->bus->ops->write32(core, offset, value); 397 } 398 #ifdef CONFIG_BCMA_BLOCKIO 399 static inline void bcma_block_read(struct bcma_device *core, void *buffer, 400 size_t count, u16 offset, u8 reg_width) 401 { 402 core->bus->ops->block_read(core, buffer, count, offset, reg_width); 403 } 404 static inline void bcma_block_write(struct bcma_device *core, 405 const void *buffer, size_t count, 406 u16 offset, u8 reg_width) 407 { 408 core->bus->ops->block_write(core, buffer, count, offset, reg_width); 409 } 410 #endif 411 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset) 412 { 413 return core->bus->ops->aread32(core, offset); 414 } 415 static inline 416 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value) 417 { 418 core->bus->ops->awrite32(core, offset, value); 419 } 420 421 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask) 422 { 423 bcma_write32(cc, offset, bcma_read32(cc, offset) & mask); 424 } 425 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set) 426 { 427 bcma_write32(cc, offset, bcma_read32(cc, offset) | set); 428 } 429 static inline void bcma_maskset32(struct bcma_device *cc, 430 u16 offset, u32 mask, u32 set) 431 { 432 bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set); 433 } 434 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask) 435 { 436 bcma_write16(cc, offset, bcma_read16(cc, offset) & mask); 437 } 438 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set) 439 { 440 bcma_write16(cc, offset, bcma_read16(cc, offset) | set); 441 } 442 static inline void bcma_maskset16(struct bcma_device *cc, 443 u16 offset, u16 mask, u16 set) 444 { 445 bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set); 446 } 447 448 extern struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid, 449 u8 unit); 450 static inline struct bcma_device *bcma_find_core(struct bcma_bus *bus, 451 u16 coreid) 452 { 453 return bcma_find_core_unit(bus, coreid, 0); 454 } 455 456 #ifdef CONFIG_BCMA_HOST_PCI 457 extern void bcma_host_pci_up(struct bcma_bus *bus); 458 extern void bcma_host_pci_down(struct bcma_bus *bus); 459 extern int bcma_host_pci_irq_ctl(struct bcma_bus *bus, 460 struct bcma_device *core, bool enable); 461 #else 462 static inline void bcma_host_pci_up(struct bcma_bus *bus) 463 { 464 } 465 static inline void bcma_host_pci_down(struct bcma_bus *bus) 466 { 467 } 468 static inline int bcma_host_pci_irq_ctl(struct bcma_bus *bus, 469 struct bcma_device *core, bool enable) 470 { 471 if (bus->hosttype == BCMA_HOSTTYPE_PCI) 472 return -ENOTSUPP; 473 return 0; 474 } 475 #endif 476 477 extern bool bcma_core_is_enabled(struct bcma_device *core); 478 extern void bcma_core_disable(struct bcma_device *core, u32 flags); 479 extern int bcma_core_enable(struct bcma_device *core, u32 flags); 480 extern void bcma_core_set_clockmode(struct bcma_device *core, 481 enum bcma_clkmode clkmode); 482 extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, 483 bool on); 484 extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset); 485 #define BCMA_DMA_TRANSLATION_MASK 0xC0000000 486 #define BCMA_DMA_TRANSLATION_NONE 0x00000000 487 #define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */ 488 #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */ 489 extern u32 bcma_core_dma_translation(struct bcma_device *core); 490 491 extern unsigned int bcma_core_irq(struct bcma_device *core, int num); 492 493 #endif /* LINUX_BCMA_H_ */ 494