xref: /openbmc/linux/include/linux/amba/pl08x.h (revision 1804569d)
1 /*
2  * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
3  *
4  * Copyright (C) 2005 ARM Ltd
5  * Copyright (C) 2010 ST-Ericsson SA
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * pl08x information required by platform code
12  *
13  * Please credit ARM.com
14  * Documentation: ARM DDI 0196D
15  */
16 
17 #ifndef AMBA_PL08X_H
18 #define AMBA_PL08X_H
19 
20 /* We need sizes of structs from this header */
21 #include <linux/dmaengine.h>
22 #include <linux/interrupt.h>
23 
24 struct pl08x_driver_data;
25 struct pl08x_phy_chan;
26 struct pl08x_txd;
27 
28 /* Bitmasks for selecting AHB ports for DMA transfers */
29 enum {
30 	PL08X_AHB1 = (1 << 0),
31 	PL08X_AHB2 = (1 << 1)
32 };
33 
34 /**
35  * struct pl08x_channel_data - data structure to pass info between
36  * platform and PL08x driver regarding channel configuration
37  * @bus_id: name of this device channel, not just a device name since
38  * devices may have more than one channel e.g. "foo_tx"
39  * @min_signal: the minimum DMA signal number to be muxed in for this
40  * channel (for platforms supporting muxed signals). If you have
41  * static assignments, make sure this is set to the assigned signal
42  * number, PL08x have 16 possible signals in number 0 thru 15 so
43  * when these are not enough they often get muxed (in hardware)
44  * disabling simultaneous use of the same channel for two devices.
45  * @max_signal: the maximum DMA signal number to be muxed in for
46  * the channel. Set to the same as min_signal for
47  * devices with static assignments
48  * @muxval: a number usually used to poke into some mux regiser to
49  * mux in the signal to this channel
50  * @addr: source/target address in physical memory for this DMA channel,
51  * can be the address of a FIFO register for burst requests for example.
52  * This can be left undefined if the PrimeCell API is used for configuring
53  * this.
54  * @single: the device connected to this channel will request single DMA
55  * transfers, not bursts. (Bursts are default.)
56  * @periph_buses: the device connected to this channel is accessible via
57  * these buses (use PL08X_AHB1 | PL08X_AHB2).
58  */
59 struct pl08x_channel_data {
60 	const char *bus_id;
61 	int min_signal;
62 	int max_signal;
63 	u32 muxval;
64 	dma_addr_t addr;
65 	bool single;
66 	u8 periph_buses;
67 };
68 
69 enum pl08x_burst_size {
70 	PL08X_BURST_SZ_1,
71 	PL08X_BURST_SZ_4,
72 	PL08X_BURST_SZ_8,
73 	PL08X_BURST_SZ_16,
74 	PL08X_BURST_SZ_32,
75 	PL08X_BURST_SZ_64,
76 	PL08X_BURST_SZ_128,
77 	PL08X_BURST_SZ_256,
78 };
79 
80 enum pl08x_bus_width {
81 	PL08X_BUS_WIDTH_8_BITS,
82 	PL08X_BUS_WIDTH_16_BITS,
83 	PL08X_BUS_WIDTH_32_BITS,
84 };
85 
86 /**
87  * struct pl08x_platform_data - the platform configuration for the PL08x
88  * PrimeCells.
89  * @slave_channels: the channels defined for the different devices on the
90  * platform, all inclusive, including multiplexed channels. The available
91  * physical channels will be multiplexed around these signals as they are
92  * requested, just enumerate all possible channels.
93  * @num_slave_channels: number of elements in the slave channel array
94  * @memcpy_burst_size: the appropriate burst size for memcpy operations
95  * @memcpy_bus_width: memory bus width
96  * @memcpy_prot_buff: whether memcpy DMA is bufferable
97  * @memcpy_prot_cache: whether memcpy DMA is cacheable
98  * @get_xfer_signal: request a physical signal to be used for a DMA transfer
99  * immediately: if there is some multiplexing or similar blocking the use
100  * of the channel the transfer can be denied by returning less than zero,
101  * else it returns the allocated signal number
102  * @put_xfer_signal: indicate to the platform that this physical signal is not
103  * running any DMA transfer and multiplexing can be recycled
104  * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
105  * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
106  * @slave_map: DMA slave matching table
107  * @slave_map_len: number of elements in @slave_map
108  */
109 struct pl08x_platform_data {
110 	struct pl08x_channel_data *slave_channels;
111 	unsigned int num_slave_channels;
112 	enum pl08x_burst_size memcpy_burst_size;
113 	enum pl08x_bus_width memcpy_bus_width;
114 	bool memcpy_prot_buff;
115 	bool memcpy_prot_cache;
116 	int (*get_xfer_signal)(const struct pl08x_channel_data *);
117 	void (*put_xfer_signal)(const struct pl08x_channel_data *, int);
118 	u8 lli_buses;
119 	u8 mem_buses;
120 	const struct dma_slave_map *slave_map;
121 	int slave_map_len;
122 };
123 
124 #ifdef CONFIG_AMBA_PL08X
125 bool pl08x_filter_id(struct dma_chan *chan, void *chan_id);
126 #else
127 static inline bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
128 {
129 	return false;
130 }
131 #endif
132 
133 #endif	/* AMBA_PL08X_H */
134